diff --git a/fpga/hls/data_collection_fsm.cpp b/fpga/hls/data_collection_fsm.cpp index 87d59bf3..f3034444 100644 --- a/fpga/hls/data_collection_fsm.cpp +++ b/fpga/hls/data_collection_fsm.cpp @@ -5,8 +5,8 @@ void data_collection_fsm(AXI_STREAM ð_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, volatile ap_uint<1> &in_run, volatile ap_uint<1> &in_cancel, volatile ap_uint<1> &out_idle, @@ -37,7 +37,7 @@ void data_collection_fsm(AXI_STREAM ð_in, packet_512_t packet_in; packet_512_t packet_out; - ap_uint addr; + axis_addr addr; enum rcv_state_t {RCV_WAIT_FOR_START = 0, RCV_WAIT_FOR_START_LOW = 1, RCV_START = 2, RCV_INIT = 3, RCV_GOOD = 4, RCV_FLUSH = 5, RCV_LAST = 6, RCV_FLUSH_IDLE = 7, RCV_IGNORE = 8}; @@ -85,9 +85,7 @@ void data_collection_fsm(AXI_STREAM ð_in, packet_out.id = 1; data_out << packet_out; - addr = 0; - addr(63, 0) = mode; - addr(79,64) = nmodules; + addr.last = 0; addr_out << addr; if (mode & MODE_INTERNAL_PACKET_GEN) @@ -102,7 +100,7 @@ void data_collection_fsm(AXI_STREAM ð_in, else if (!addr_in.empty()) { addr_in >> addr; - if (addr_frame_number(addr) >= nframes + DELAY_FRAMES_STOP_AND_QUIT) + if (addr.frame_number >= nframes + DELAY_FRAMES_STOP_AND_QUIT) rcv_state = RCV_FLUSH; else { addr_out << addr; @@ -133,8 +131,7 @@ void data_collection_fsm(AXI_STREAM ð_in, break; case RCV_LAST: out_idle = 0; - addr = 0; - addr_last_flag(addr) = 1; + addr.last = 1; addr_out << addr; // Finish data collection diff --git a/fpga/hls/hls_jfjoch.h b/fpga/hls/hls_jfjoch.h index 2e83dfd8..cbcc47a6 100644 --- a/fpga/hls/hls_jfjoch.h +++ b/fpga/hls/hls_jfjoch.h @@ -22,8 +22,6 @@ // Number of modules that can be simultaneously handled by the FPGA #define MAX_MODULES_FPGA 16 -#define ADDR_STREAM_WIDTH 320 - typedef ap_ufixed<16,2, AP_RND_CONV> gainG0_t; typedef ap_ufixed<16,4, AP_RND_CONV> gainG1_t; typedef ap_ufixed<16,6, AP_RND_CONV> gainG2_t; @@ -50,15 +48,6 @@ typedef ap_axiu<512,1, 1, 1> packet_512_t; typedef hls::stream AXI_STREAM; typedef hls::stream STREAM_512; -#define addr_frame_number(x) x(63, 0) -#define addr_eth_packet(x) x(70, 64) -#define addr_module(x) x(76, 72) -#define addr_last_flag(x) x[79] -#define addr_jf_debug(x) x(127, 96) -#define addr_timestamp(x) x(191,128) -#define addr_bunch_id(x) x(255,192) -#define addr_exptime(x) x(256+63, 256) - #define ACT_REG_MODE(x) ((x)(32 , 0)) // 32 bit #define ACT_REG_ONE_OVER_ENERGY(x) ((x)(63 , 32)) // 32 bit #define ACT_REG_NFRAMES(x) ((x)(95 , 64)) // 32 bit @@ -70,6 +59,17 @@ struct axis_datamover_ctrl { ap_uint<40+64> data; }; +struct axis_addr { + ap_uint<64> frame_number; + ap_uint<64> exptime; + ap_uint<64> timestamp; + ap_uint<64> bunchid; + ap_uint<32> debug; + ap_uint<5> module; + ap_uint<7> eth_packet; + ap_uint<1> last; +}; + struct axis_completion { ap_uint<128> packet_mask; ap_uint<64> frame_number; @@ -88,8 +88,8 @@ void setup_datamover (hls::stream &datamover_cmd_stream, ui void data_collection_fsm(AXI_STREAM ð_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, volatile ap_uint<1> &in_run, volatile ap_uint<1> &in_cancel, volatile ap_uint<1> &out_idle, @@ -106,8 +106,8 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t in_mem_location[LOAD_CALIBRATION_BRAM_SIZE]); void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, hls::burst_maxi d_hbm_p4, hls::burst_maxi d_hbm_p5, @@ -116,7 +116,7 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, hls::burst_maxi d_hbm_p10, hls::burst_maxi d_hbm_p11); void host_writer(STREAM_512 &data_in, - hls::stream > &addr_in, + hls::stream &addr_in, hls::stream > &host_memory_out, hls::stream &datamover_out_cmd, hls::stream > &s_axis_work_request, @@ -131,18 +131,18 @@ void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter); void writer_split(STREAM_512 &data_in, STREAM_512 &data_out_1, STREAM_512 &data_out_2, - hls::stream > &addr_in, - hls::stream > &addr_out_1, - hls::stream > &addr_out_2); + hls::stream &addr_in, + hls::stream &addr_out_1, + hls::stream &addr_out_2); void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, ap_uint<512> module_cache[RAW_MODULE_SIZE * sizeof(uint16_t) / 512 * 8], volatile ap_uint<1> &in_cancel); void save_to_hbm(STREAM_512 &data_in, - hls::stream > &addr_in, + hls::stream &addr_in, hls::stream &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, volatile uint64_t &packets_processed, @@ -177,25 +177,6 @@ inline void setup_datamover (hls::stream &datamover_cmd_str datamover_cmd_stream << msg; } -inline ap_uint addr_packet(ap_uint<8> eth_packet, - ap_uint<5> module_number, - ap_uint<64> frame, - ap_uint<32> jf_debug, - ap_uint<64> timestamp, - ap_uint<64> bunchid, - ap_uint<32> expttime) { -#pragma HLS INLINE - ap_uint retval = 0; - addr_eth_packet(retval) = eth_packet; - addr_module(retval) = module_number; - addr_frame_number(retval) = frame; - addr_jf_debug(retval) = jf_debug; - addr_timestamp(retval) = timestamp; - addr_bunch_id(retval) = bunchid; - addr_exptime(retval) = expttime; - return retval; -} - inline ap_uint<16> get_header_field_16(ap_uint<512> data, size_t position) { ap_uint<16> tmp = data(position+15, position); ap_uint<16> retval; @@ -264,7 +245,7 @@ void udp(AXI_STREAM ð_in, void sls_detector(AXI_STREAM &udp_payload_in, hls::stream > &udp_metadata_in, AXI_STREAM &data_out, - hls::stream > &addr_out, + hls::stream &addr_out, uint64_t& counter, uint32_t& counter_eth_error, uint32_t& counter_len_error, diff --git a/fpga/hls/host_writer.cpp b/fpga/hls/host_writer.cpp index 7ef49687..dd96d634 100644 --- a/fpga/hls/host_writer.cpp +++ b/fpga/hls/host_writer.cpp @@ -78,7 +78,7 @@ inline ap_uint<1> read_request(hls::stream > &s_axis_work_request, } void host_writer(STREAM_512 &data_in, - hls::stream > &addr_in, + hls::stream &addr_in, hls::stream > &host_memory_out, hls::stream &datamover_out_cmd, hls::stream > &s_axis_work_request, @@ -140,7 +140,7 @@ void host_writer(STREAM_512 &data_in, read_request(s_axis_work_request, req_handle, req_host_offset); } - ap_uint addr; + axis_addr addr; addr_in >> addr; packet_512_t packet_in; @@ -169,12 +169,12 @@ void host_writer(STREAM_512 &data_in, packet_out.user = 0; Loop_good_packet: - while (!addr_last_flag(addr)) { + while (!addr.last) { // Process one UDP packet per iteration #pragma HLS PIPELINE II=128 - ap_uint<64> frame_number = addr_frame_number(addr); - ap_uint<4> module_number = addr_module(addr); - ap_uint<7> eth_packet = addr_eth_packet(addr); + ap_uint<64> frame_number = addr.frame_number; + ap_uint<4> module_number = addr.module; + ap_uint<7> eth_packet = addr.eth_packet; ap_uint<5> id = module_number * 2 + (frame_number % 2); if (curr_frame[id] != frame_number) { @@ -215,10 +215,10 @@ void host_writer(STREAM_512 &data_in, curr_frame[id] = frame_number; curr_offset[id] = req_host_offset; - debug[id] = addr_jf_debug(addr); - timestamp[id] = addr_timestamp(addr); - jf_bunchid[id] = addr_bunch_id(addr); - exptime[id] = addr_exptime(addr); + debug[id] = addr.debug; + timestamp[id] = addr.timestamp; + jf_bunchid[id] = addr.bunchid; + exptime[id] = addr.exptime; packet_mask[id] = ap_uint<128>(1) << eth_packet; packet_count[id] = 1; diff --git a/fpga/hls/internal_packet_generator.cpp b/fpga/hls/internal_packet_generator.cpp index b3040e5f..8e6a0c11 100644 --- a/fpga/hls/internal_packet_generator.cpp +++ b/fpga/hls/internal_packet_generator.cpp @@ -4,8 +4,8 @@ #include "hls_jfjoch.h" void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, ap_uint<512> *frame, volatile ap_uint<1> &in_cancel) { #pragma HLS INTERFACE ap_ctrl_none port=return @@ -31,7 +31,7 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<1> conversion = (mode & MODE_CONV) ? 1 : 0; data_out << packet_in; - ap_uint addr; + axis_addr addr; addr_in >> addr; addr_out << addr; @@ -54,9 +54,18 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, #pragma HLS PIPELINE II=1 uint32_t eth_packet = i / 128; uint32_t axis_packet = i % 128; - if (axis_packet == 0) - addr_out << addr_packet(eth_packet, module_number, frame_number, INT_PKT_GEN_DEBUG, - INT_PKT_GEN_TIMESTAMP, INT_PKT_GEN_BUNCHID, INT_PKT_GEN_EXPTTIME); + if (axis_packet == 0) { + axis_addr addr_x; + addr_x.eth_packet = eth_packet; + addr_x.module = module_number; + addr_x.frame_number = frame_number; + addr_x.debug = INT_PKT_GEN_DEBUG; + addr_x.timestamp = INT_PKT_GEN_TIMESTAMP; + addr_x.bunchid = INT_PKT_GEN_BUNCHID; + addr_x.exptime = INT_PKT_GEN_EXPTTIME; + addr_x.last = 0; + addr_out << addr_x; + } packet_out.user = 0; packet_out.id = 0; packet_out.last = (axis_packet == 127) ? 1 : 0; @@ -74,7 +83,7 @@ void internal_packet_generator(STREAM_512 &data_in, STREAM_512 &data_out, addr_in >> addr; forward_packets: - while (!addr_last_flag(addr)) { + while (!addr.last) { #pragma HLS PIPELINE II=1 data_in >> packet_in; data_out << packet_in; diff --git a/fpga/hls/jf_conversion.cpp b/fpga/hls/jf_conversion.cpp index 1cff39df..259acd2e 100644 --- a/fpga/hls/jf_conversion.cpp +++ b/fpga/hls/jf_conversion.cpp @@ -100,8 +100,8 @@ ap_uint<512> convert(ap_uint<512> data_in, } void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, - hls::stream > &addr_in, - hls::stream > &addr_out, + hls::stream &addr_in, + hls::stream &addr_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, hls::burst_maxi d_hbm_p2, hls::burst_maxi d_hbm_p3, hls::burst_maxi d_hbm_p4, hls::burst_maxi d_hbm_p5, @@ -142,7 +142,7 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, packet_512_t packet_in; - ap_uint addr; + axis_addr addr; addr_in >> addr; addr_out << addr; @@ -273,19 +273,19 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, ap_uint<7> counter = 0; addr_in >> addr; pixel_conversion: - while (!addr_last_flag(addr)) { + while (!addr.last) { #pragma HLS PIPELINE II=1 //ap_uint<17> offset = packet_in.user(16,0); if (counter % 16 == 0) { - ap_uint<17> gain_offset = (addr_module(addr), addr_eth_packet(addr), counter); - ap_uint<12> pedestal_location = addr_module(addr); + ap_uint<19> gain_offset = (addr.module, addr.eth_packet, counter); + ap_uint<12> pedestal_location = addr.module; if (storage_cells > 1) { - ap_uint<4> storage_cell_id = (addr_frame_number(addr) - 1) % storage_cells; + ap_uint<4> storage_cell_id = (addr.frame_number - 1) % storage_cells; pedestal_location += modules * storage_cell_id; } - ap_uint<26> pedestal_offset = (pedestal_location, addr_eth_packet(addr), counter); + ap_uint<26> pedestal_offset = (pedestal_location, addr.eth_packet, counter); d_hbm_p0.read_request(offset_hbm_0 + gain_offset, 16); d_hbm_p1.read_request(offset_hbm_1 + gain_offset, 16); @@ -334,7 +334,7 @@ void jf_conversion(STREAM_512 &data_in, STREAM_512 &data_out, } else { addr_in >> addr; forward_packets: - while (!addr_last_flag(addr)) { + while (!addr.last) { #pragma HLS PIPELINE II=1 data_in >> packet_in; data_out << packet_in; diff --git a/fpga/hls/save_to_hbm.cpp b/fpga/hls/save_to_hbm.cpp index f2c5460c..31a9902a 100644 --- a/fpga/hls/save_to_hbm.cpp +++ b/fpga/hls/save_to_hbm.cpp @@ -37,7 +37,7 @@ inline void write_completion(hls::stream &m_axis_completion, } void save_to_hbm(STREAM_512 &data_in, - hls::stream > &addr_in, + hls::stream &addr_in, hls::stream &completion_out, hls::burst_maxi d_hbm_p0, hls::burst_maxi d_hbm_p1, volatile uint64_t &packets_processed, @@ -89,7 +89,7 @@ void save_to_hbm(STREAM_512 &data_in, uint32_t handle_val = 0; - ap_uint addr; + axis_addr addr; addr_in >> addr; packet_512_t packet_in; @@ -114,12 +114,12 @@ void save_to_hbm(STREAM_512 &data_in, addr_in >> addr; Loop_good_packet: - while (!addr_last_flag(addr)) { + while (!addr.last) { // Process one UDP packet per iteration #pragma HLS PIPELINE II=128 - ap_uint<64> frame_number = addr_frame_number(addr); - ap_uint<4> module_number = addr_module(addr); - ap_uint<7> eth_packet = addr_eth_packet(addr); + ap_uint<64> frame_number = addr.frame_number; + ap_uint<4> module_number = addr.module; + ap_uint<7> eth_packet = addr.eth_packet; ap_uint<5> id = module_number * 2 + (frame_number % 2); if (curr_frame[id] != frame_number) { @@ -142,10 +142,10 @@ void save_to_hbm(STREAM_512 &data_in, handle[id] = handle_val; curr_frame[id] = frame_number; - debug[id] = addr_jf_debug(addr); - timestamp[id] = addr_timestamp(addr); - jf_bunchid[id] = addr_bunch_id(addr); - exptime[id] = addr_exptime(addr); + debug[id] = addr.debug; + timestamp[id] = addr.timestamp; + jf_bunchid[id] = addr.bunchid; + exptime[id] = addr.exptime; packet_mask[id] = ap_uint<128>(1) << eth_packet; packet_count[id] = 1; diff --git a/fpga/hls/sls_detector.cpp b/fpga/hls/sls_detector.cpp index 74783036..14a1e5f7 100644 --- a/fpga/hls/sls_detector.cpp +++ b/fpga/hls/sls_detector.cpp @@ -6,7 +6,7 @@ void sls_detector(AXI_STREAM &udp_payload_in, hls::stream > &udp_metadata_in, AXI_STREAM &data_out, - hls::stream > &addr_out, + hls::stream &addr_out, uint64_t& counter, uint32_t& counter_eth_error, uint32_t& counter_len_error, @@ -65,19 +65,22 @@ void sls_detector(AXI_STREAM &udp_payload_in, && (udp_metadata_len_err(udp_metadata) == 0)) { ap_uint<16> column = packet_in.data(4 * 64 + 31, 4 * 64 + 16); - - ap_uint<64> frame_number = packet_in.data(63, 0); - ap_uint<32> jf_debug = packet_in.data(5 * 64 + 31, 5 * 64); - ap_uint<64> timestamp = packet_in.data(3 * 64 + 63, 3 * 64); - ap_uint<64> bunchid = packet_in.data(2 * 64 + 63, 2 * 64); - ap_uint<5> module = (column % 32) / 2; ap_uint<1> module_part = column[0]; - ap_uint<7> eth_packet = (packet_in.data(127, 96) % 128) | (module_part * 64); - ap_uint<32> exptime = packet_in.data(95, 64); + beat_counter = 0; reminder = packet_in.data(511, 384); - addr_out << addr_packet(eth_packet, module, frame_number, jf_debug, timestamp, bunchid,exptime); + axis_addr addr; + addr.frame_number = packet_in.data(63, 0); + addr.debug = packet_in.data(5 * 64 + 31, 5 * 64); + addr.timestamp = packet_in.data(3 * 64 + 63, 3 * 64); + addr.bunchid = packet_in.data(2 * 64 + 63, 2 * 64); + addr.module = (column % 32) / 2; + addr.eth_packet = (packet_in.data(127, 96) % 128) | (module_part * 64); + addr.exptime = packet_in.data(95, 64); + addr.last = 0; + addr_out << addr; + state = FORWARD; internal_counter++; } else { diff --git a/fpga/hls/writer_split.cpp b/fpga/hls/writer_split.cpp index b6a705f3..f16e3f87 100644 --- a/fpga/hls/writer_split.cpp +++ b/fpga/hls/writer_split.cpp @@ -6,9 +6,9 @@ void writer_split(STREAM_512 &data_in, STREAM_512 &data_out_1, STREAM_512 &data_out_2, - hls::stream > &addr_in, - hls::stream > &addr_out_1, - hls::stream > &addr_out_2) { + hls::stream &addr_in, + hls::stream &addr_out_1, + hls::stream &addr_out_2) { #pragma HLS INTERFACE register both axis port=data_in #pragma HLS INTERFACE register both axis port=data_out_1 #pragma HLS INTERFACE register both axis port=data_out_2 @@ -19,7 +19,7 @@ void writer_split(STREAM_512 &data_in, #pragma HLS INTERFACE ap_ctrl_none port=return packet_512_t packet; - ap_uint addr; + axis_addr addr; addr_in >> addr; addr_out_1 << addr; @@ -34,7 +34,7 @@ void writer_split(STREAM_512 &data_in, addr_out_2 << addr; Loop_good_packet: - while (!addr_last_flag(addr)) { + while (!addr.last) { #pragma HLS PIPELINE II=128 for (int i = 0; i < 128; i++) { data_in >> packet; diff --git a/receiver/HLSSimulatedDevice.cpp b/receiver/HLSSimulatedDevice.cpp index 53e2db80..9333020b 100644 --- a/receiver/HLSSimulatedDevice.cpp +++ b/receiver/HLSSimulatedDevice.cpp @@ -216,13 +216,13 @@ void HLSSimulatedDevice::HLSMainThread() { STREAM_512 converted_4; STREAM_512 converted_5; - hls::stream > addr0; - hls::stream > addr1; - hls::stream > addr2; - hls::stream > addr3; - hls::stream > addr4; - hls::stream > addr5; - hls::stream > addr6; + hls::stream addr0; + hls::stream addr1; + hls::stream addr2; + hls::stream addr3; + hls::stream addr4; + hls::stream addr5; + hls::stream addr6; hls::stream > udp_metadata; ap_uint<1> idle_data_collection; diff --git a/tests/FPGAIntegrationTest.cpp b/tests/FPGAIntegrationTest.cpp index b8517d76..609186e1 100644 --- a/tests/FPGAIntegrationTest.cpp +++ b/tests/FPGAIntegrationTest.cpp @@ -669,8 +669,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { STREAM_512 raw0; STREAM_512 raw1; - hls::stream > addr0; - hls::stream > addr1; + hls::stream addr0; + hls::stream addr1; ap_uint<1> run_data_collection = 0; ap_uint<1> cancel_data_collection = 0; @@ -849,7 +849,7 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") { auto addr = addr1.read(); addr = addr1.read(); - REQUIRE(addr_last_flag(addr)); + REQUIRE(addr.last); } diff --git a/tests/FPGANetworkTest.cpp b/tests/FPGANetworkTest.cpp index 65575f9e..2c701ec2 100644 --- a/tests/FPGANetworkTest.cpp +++ b/tests/FPGANetworkTest.cpp @@ -205,7 +205,7 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_1") { hls::stream > udp_metadata; STREAM_512 raw_out; - hls::stream > addr0; + hls::stream addr0; uint64_t packet_counter; uint64_t sls_packet_counter; @@ -239,9 +239,9 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_1") { } auto addr = addr0.read(); - REQUIRE(addr_frame_number(addr) == jf_packet->jf.framenum); - REQUIRE(addr_module(addr) == 5 / 2); - REQUIRE(addr_eth_packet(addr) == (jf_packet->jf.packetnum | 64)); + REQUIRE(addr.frame_number == jf_packet->jf.framenum); + REQUIRE(addr.module == 5 / 2); + REQUIRE(addr.eth_packet == (jf_packet->jf.packetnum | 64)); } TEST_CASE("HLS_Network_UDP_SLS_detector_2") { @@ -264,7 +264,7 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_2") { hls::stream > udp_metadata; STREAM_512 raw_out; - hls::stream > addr0; + hls::stream addr0; auto jf_packet_axi = (ap_uint<512> *) packet; @@ -298,9 +298,9 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_2") { } auto addr = addr0.read(); - REQUIRE(addr_frame_number(addr) == jf_packet->jf.framenum); - REQUIRE(addr_module(addr) == 2); - REQUIRE(addr_eth_packet(addr) == jf_packet->jf.packetnum); + REQUIRE(addr.frame_number == jf_packet->jf.framenum); + REQUIRE(addr.module == 2); + REQUIRE(addr.eth_packet == jf_packet->jf.packetnum); } TEST_CASE("HLS_Network_UDP_SLS_detector_2_packets") { @@ -323,7 +323,7 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_2_packets") { hls::stream > udp_metadata; STREAM_512 raw_out; - hls::stream > addr0; + hls::stream addr0; auto jf_packet_axi = (ap_uint<512> *) packet; @@ -368,9 +368,9 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_2_packets") { } auto addr = addr0.read(); - REQUIRE(addr_frame_number(addr) == jf_packet->jf.framenum); - REQUIRE(addr_module(addr) == 1); - REQUIRE(addr_eth_packet(addr) == jf_packet->jf.packetnum); + REQUIRE(addr.frame_number == jf_packet->jf.framenum); + REQUIRE(addr.module == 1); + REQUIRE(addr.eth_packet == jf_packet->jf.packetnum); } } @@ -394,7 +394,7 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_packets_err") { hls::stream > udp_metadata; STREAM_512 raw_out; - hls::stream > addr0; + hls::stream addr0; auto jf_packet_axi = (ap_uint<512> *) packet; @@ -460,9 +460,9 @@ TEST_CASE("HLS_Network_UDP_SLS_detector_packets_err") { } auto addr = addr0.read(); - REQUIRE(addr_frame_number(addr) == jf_packet->jf.framenum); - REQUIRE(addr_module(addr) == 2); - REQUIRE(addr_eth_packet(addr) == jf_packet->jf.packetnum); + REQUIRE(addr.frame_number == jf_packet->jf.framenum); + REQUIRE(addr.module == 2); + REQUIRE(addr.eth_packet == jf_packet->jf.packetnum); REQUIRE(udp_packet_counter == 4); REQUIRE(sls_packet_counter == 1);