From 2b29381f87858d6f8a54d7ee348e53ec2d124e75 Mon Sep 17 00:00:00 2001
From: Filip Leonarski <filip.leonarski@psi.ch>
Date: Tue, 12 Sep 2023 08:16:44 +0200
Subject: [PATCH] FPGA: update in timer code

---
 fpga/hls/timer.cpp | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/fpga/hls/timer.cpp b/fpga/hls/timer.cpp
index 78ea1d97..8973c2e2 100644
--- a/fpga/hls/timer.cpp
+++ b/fpga/hls/timer.cpp
@@ -16,17 +16,16 @@ void timer_host(STREAM_512 &data_in, STREAM_512 &data_out, uint64_t &counter) {
     data_out << packet_in;
 
     data_in >> packet_in;
-
     while (!packet_in.user) {
-#pragma HLS PIPELINE
+#pragma HLS PIPELINE II=1
         if (data_out.full()) {
             if (counter_internal < UINT64_MAX)
                 counter_internal++;
-            counter = counter_internal;
         } else {
             data_out << packet_in;
             data_in >> packet_in;
         }
+        counter = counter_internal;
     }
     data_out << packet_in;
 }