From 1333ce9b294de237b843753333de024af6f7a31a Mon Sep 17 00:00:00 2001
From: Filip Leonarski <filip.leonarski@psi.ch>
Date: Wed, 6 Sep 2023 12:36:14 +0200
Subject: [PATCH] FPGA: trigger synthesis

---
 fpga/hls/load_calibration.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fpga/hls/load_calibration.cpp b/fpga/hls/load_calibration.cpp
index 5fda39a6..40598361 100644
--- a/fpga/hls/load_calibration.cpp
+++ b/fpga/hls/load_calibration.cpp
@@ -80,4 +80,4 @@ void load_calibration(STREAM_512 &data_in, STREAM_512 &data_out,
         data_in >> packet_in;
     }
     data_out << packet_in;
-}
\ No newline at end of file
+}