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Detector Geometry customization

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This commit is contained in:
leonarski_f
2023-04-12 19:22:13 +00:00
parent 94ba13b3a1
commit 0973f3725d
52 changed files with 1335 additions and 973 deletions
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62
tests/FPGAIntegrationTest.cpp
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@@ -14,7 +14,7 @@ using namespace std::literals::chrono_literals;
TEST_CASE("HLS_C_Simulation_internal_packet_generator", "[FPGA][Full]") {
const uint16_t nmodules = 4;
DiffractionExperiment x(1, {nmodules});
DiffractionExperiment x((DetectorGeometry(nmodules)));
x.Mode(DetectorMode::Raw);
x.UseInternalPacketGenerator(true).ImagesPerTrigger(4).PedestalG0Frames(0);
@@ -53,7 +53,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator", "[FPGA][Full]") {
TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Full]") {
const uint16_t nmodules = 4;
DiffractionExperiment x(1, {nmodules});
DiffractionExperiment x((DetectorGeometry(nmodules)));
std::vector<uint16_t> test_frame(RAW_MODULE_SIZE);
@@ -95,7 +95,8 @@ TEST_CASE("HLS_C_Simulation_check_raw", "[FPGA][Full]") {
LoadBinaryFile("../../tests/test_data/mod5_raw" + std::to_string(i)+".bin", raw_frames.data() + i * RAW_MODULE_SIZE, RAW_MODULE_SIZE);
}
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
x.Mode(DetectorMode::Raw);
@@ -135,7 +136,10 @@ TEST_CASE("HLS_C_Simulation_check_raw", "[FPGA][Full]") {
}
TEST_CASE("HLS_C_Simulation_check_cancel", "[FPGA][Full]") {
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
x.Mode(DetectorMode::Raw);
@@ -158,7 +162,9 @@ TEST_CASE("HLS_C_Simulation_check_cancel", "[FPGA][Full]") {
TEST_CASE("HLS_C_Simulation_check_cancel_conversion", "[FPGA][Full]") {
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
x.Mode(DetectorMode::Conversion);
@@ -183,7 +189,10 @@ TEST_CASE("HLS_C_Simulation_check_delay", "[FPGA][Full]") {
std::vector<uint16_t> raw_frames(RAW_MODULE_SIZE*20);
Completion c;
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
x.Mode(DetectorMode::Raw);
@@ -223,7 +232,9 @@ TEST_CASE("HLS_C_Simulation_check_delay", "[FPGA][Full]") {
TEST_CASE("HLS_C_Simulation_check_lost_frame_raw", "[FPGA][Full]") {
std::vector<uint16_t> raw_frames(RAW_MODULE_SIZE*20);
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
for (int i = 0; i < 4096; i++) data[i] = i;
@@ -253,7 +264,9 @@ TEST_CASE("HLS_C_Simulation_check_lost_frame_raw", "[FPGA][Full]") {
TEST_CASE("HLS_C_Simulation_check_lost_frame_conversion", "[FPGA][Full]") {
std::vector<uint16_t> raw_frames(RAW_MODULE_SIZE*20);
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
for (int i = 0; i < 4096; i++) data[i] = i;
@@ -282,7 +295,9 @@ TEST_CASE("HLS_C_Simulation_check_lost_frame_conversion", "[FPGA][Full]") {
TEST_CASE("HLS_C_Simulation_check_single_packet", "[FPGA][Full]") {
std::vector<uint16_t> raw_frames(RAW_MODULE_SIZE*20);
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
x.Mode(DetectorMode::Raw);
@@ -358,7 +373,9 @@ TEST_CASE("HLS_C_Simulation_check_convert_full_range", "[FPGA][Full]") {
std::vector<double> energy_values = {6.0, 12.4, 17.7, 5, 4.5, 3.7};
DiffractionExperiment x(1, {1});
const uint16_t nmodules = 1;
DiffractionExperiment x((DetectorGeometry(nmodules)));
x.Mode(DetectorMode::Conversion);
HLSSimulatedDevice test(0, 64);
@@ -397,7 +414,9 @@ TEST_CASE("HLS_C_Simulation_check_convert_full_range", "[FPGA][Full]") {
TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPGA][Full]") {
double energy = 6.0;
DiffractionExperiment x(1, {1});
const uint16_t nmodules = 1;
DiffractionExperiment x((DetectorGeometry(nmodules)));
std::vector<uint16_t> data(RAW_MODULE_SIZE);
JFModulePedestal pedestal_g0, pedestal_g1, pedestal_g2;
std::vector<double> gain(3 * RAW_MODULE_SIZE);
@@ -445,7 +464,8 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPG
TEST_CASE("HLS_C_Simulation_internal_packet_generator_apply_pixel_mask", "[FPGA][Full]") {
double energy = 6.0;
DiffractionExperiment x(1, {1});
const uint16_t nmodules = 1;
DiffractionExperiment x((DetectorGeometry(nmodules)));
JFModulePedestal pedestal_g0, pedestal_g1, pedestal_g2;
std::vector<double> gain(3 * RAW_MODULE_SIZE);
@@ -526,7 +546,9 @@ TEST_CASE("HLS_C_Simulation_check_2_trigger_convert", "[FPGA][Full]") {
LoadBinaryFile("../../tests/test_data/mod5_conv" + std::to_string(i)+".bin", conv_frames.data() + i * RAW_MODULE_SIZE, RAW_MODULE_SIZE);
}
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
x.Mode(DetectorMode::Conversion);
@@ -598,7 +620,9 @@ TEST_CASE("HLS_C_Simulation_check_2_trigger_convert", "[FPGA][Full]") {
TEST_CASE("HLS_C_Simulation_check_detect_last_frame", "[FPGA][Full]") {
DiffractionExperiment x(1,{4});
const uint16_t nmodules = 4;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[4096];
x.Mode(DetectorMode::Conversion);
@@ -619,7 +643,9 @@ TEST_CASE("HLS_C_Simulation_check_detect_last_frame", "[FPGA][Full]") {
}
TEST_CASE("HLS_C_Simulation_check_wrong_packet_size", "[FPGA][Full]") {
DiffractionExperiment x(1,{1});
const uint16_t nmodules = 1;
DiffractionExperiment x((DetectorGeometry(nmodules)));
uint16_t data[8192];
x.Mode(DetectorMode::Conversion);
@@ -838,7 +864,8 @@ TEST_CASE("HLS_DataCollectionFSM","[OpenCAPI]") {
}
TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G0", "[FPGA][Full]") {
DiffractionExperiment x(1, {2});
const uint16_t nmodules = 2;
DiffractionExperiment x((DetectorGeometry(nmodules)));
x.Mode(DetectorMode::Conversion);
x.PedestalG0Frames(0).NumTriggers(1).ImagesPerTrigger(16).UseInternalPacketGenerator(true)
@@ -880,7 +907,8 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G0",
}
TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G1", "[FPGA][Full]") {
DiffractionExperiment x(1, {2});
const uint16_t nmodules = 2;
DiffractionExperiment x((DetectorGeometry(nmodules)));
x.Mode(DetectorMode::Conversion);
x.PedestalG0Frames(0).NumTriggers(1).ImagesPerTrigger(16).UseInternalPacketGenerator(true)