064ec37e9a
- Refactored site specific stuff into a site module - PSI specific stuff is now in the PSI directory. - The old version has been tagged with pre-ansto
308 lines
9.5 KiB
C
Executable File
308 lines
9.5 KiB
C
Executable File
#define ident "1A01"
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/*
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** +--------------------------------------------------------------+
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** | Paul Scherrer Institute |
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** | Computing Section |
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** | |
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** | This software may be used freely by non-profit organizations.|
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** | It may be copied provided that the name of P.S.I. and of the |
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** | author is included. Neither P.S.I. nor the author assume any |
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** | responsibility for the use of this software outside of P.S.I.|
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** +--------------------------------------------------------------+
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**
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** Module Name . . . . . . . . : [...SINQHM]VMIO_UTILITY.C
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**
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** Author . . . . . . . . . . : D. Maden
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** Date of creation . . . . . . : Mar 1997
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**
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** Updates:
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** 1A01 14-Mar-1997 DM Initial version.
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**---------------------------------------------------------------------------
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** VMIO_UTILITY.C is a set of routines for setting up and using a VMIO10.
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**
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** To compile this program for VxWorks on PSS123, use:
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**
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ccvx vmio_utility.c
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** where
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ccvx = ccppc -O0 \
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-mcpu=603 \
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-I${WIND_BASE}/target/h \
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-fno-builtin \
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-fno-for-scope \
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-nostdinc \
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-DCPU=PPC603 \
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-D_GNU_TOOL \
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-gdwarf -c -Wimplicit
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** and, on the target,
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**
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** -> ld < vmio_utility.o
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**====================================================================
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*/
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#include <vxWorks.h>
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#include <taskLib.h>
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#include <sysLib.h>
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#include <vme.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <signal.h>
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#include <setjmp.h>
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#include "vmio10_def.h"
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/*
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**==================== Global Definitions =====================================
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*/
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#define NIL 0x00
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#define DFLT_BASE_ADDR 0x1900
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/*
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**==================== Global Variables =====================================
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*/
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char *VmioBase;
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char Vme_dummy[256]; /* Dummy array - used only when VME access ..
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** .. is disabled. */
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char Null = 0x00;
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char Bit8 = 0x10;
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int My_errno;
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int Go_on;
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int Signal_has_happened;
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jmp_buf Trap_env;
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/*
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**=============================================================================
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** Local routines.
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** Forward references ...
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*/
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void vmio_byte_send (char bit8, char lobits);
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void vmio_enable (int ab_enbl, int bc_enbl);
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void vmio_pol_dir (int a_pol, int a_dir,
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int b_pol, int b_dir,
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int c_pol, int c_dir,
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int d_pol, int d_dir);
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void vmio_reset ();
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void vmio_send (char nbytes, char *buff);
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void vmio_transp_init ();
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/*
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**-----------------------------------------------------------------*/
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void Signal_Handler (int sigint) {
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/* ==============
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*/
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Signal_has_happened = 1;
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printf ("Got into Signal_Handler\n");
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longjmp (Trap_env, 1);
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}
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/*
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**-----------------------------------------------------------------*/
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void vmio_byte_send (char bit8, char lobits) {
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/* ==============
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** Send a byte (well, 9 bits really) via the VMIO10.
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*/
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char aux;
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do { /* Wait for Output Reg. empty */
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VmioBase[VMIO_AB_CNTL] = 0X09; /* Select Port B status reg .. */
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aux = VmioBase[VMIO_AB_CNTL]; /* .. and read it. */
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} while ((aux & 0x08) == 0); /* Test its "empty" bit */
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VmioBase[VMIO_PORT_C] = bit8; /* Send Bit-8 */
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VmioBase[VMIO_PORT_B] = lobits; /* Output the other bits */
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}
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/*
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**-----------------------------------------------------------------*/
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void vmio_enable (int ab_enbl, int bc_enbl) {
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/* ===========
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** output/input enable for IC6 ,IC7
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*/
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VmioBase[VMIO_AB_CNTL] = Z8536_MCCR; /* Select Master Config Control Reg */
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VmioBase[VMIO_AB_CNTL] = ab_enbl;
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VmioBase[VMIO_CD_CNTL] = Z8536_MCCR;
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VmioBase[VMIO_CD_CNTL] = bc_enbl;
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}
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/*
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**-----------------------------------------------------------------*/
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void vmio_pol_dir (
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/* ============ Set Polarity and Direction of VMIO10 Module
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** A, B, C and D registers.
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** Polarity bit = 0 for non-inverting.
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** Direction bit = 0 for output.
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*/ int a_pol,
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int a_dir,
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int b_pol,
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int b_dir,
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int c_pol,
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int c_dir,
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int d_pol,
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int d_dir) {
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VmioBase[VMIO_AB_CNTL] = Z8536_DPPR_A; /* Port A %10'0010, Data Path Pol */
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VmioBase[VMIO_AB_CNTL] = a_pol;
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VmioBase[VMIO_AB_CNTL] = Z8536_DDR_A; /* Port A %10'0011, Data Direction */
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VmioBase[VMIO_AB_CNTL] = a_dir;
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VmioBase[VMIO_AB_CNTL] = Z8536_DPPR_B; /* Port B %10'1010, Data Path Pol */
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VmioBase[VMIO_AB_CNTL] = b_pol;
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VmioBase[VMIO_AB_CNTL] = Z8536_DDR_B; /* Port B %10'1011, Data Direction */
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VmioBase[VMIO_AB_CNTL] = b_dir;
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VmioBase[VMIO_CD_CNTL] = Z8536_DPPR_A; /* Port C %10'0010, Data Path Pol */
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VmioBase[VMIO_CD_CNTL] = c_pol;
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VmioBase[VMIO_CD_CNTL] = Z8536_DDR_A; /* Port C %10'0011, Data Direction */
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VmioBase[VMIO_CD_CNTL] = c_dir;
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VmioBase[VMIO_CD_CNTL] = Z8536_DPPR_B; /* Port D %10'1010, Data Path Pol */
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VmioBase[VMIO_CD_CNTL] = d_pol;
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VmioBase[VMIO_CD_CNTL] = Z8536_DDR_B; /* Port D %10'0011, Data Direction */
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VmioBase[VMIO_CD_CNTL] = d_dir;
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}
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/*
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**-----------------------------------------------------------------*/
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void vmio_reset () {
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/* ==========
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** Software reset for VMIO10 module
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*/
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char aux;
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/*
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** Start by forcing the state machine into State 0
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*/
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aux = VmioBase[VMIO_AB_CNTL]; /* Read Cntrl to ensure not State 1 */
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VmioBase[VMIO_AB_CNTL] = NIL; /* Write zero to Cntrl to ensure not in ..
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** .. "Reset State" */
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aux = VmioBase[VMIO_AB_CNTL]; /* Read Cntrl to ensure State 0 */
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VmioBase[VMIO_AB_CNTL] = Z8536_MICR; /* Select the Master Int Ctrl Reg */
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VmioBase[VMIO_AB_CNTL] = 0x01; /* Set the reset bit */
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VmioBase[VMIO_AB_CNTL] = NIL; /* Then clear it to complete reset */
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/*
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** Repeat for the other Z8536-CIO
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*/
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aux = VmioBase[VMIO_CD_CNTL];
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VmioBase[VMIO_CD_CNTL] = NIL;
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aux = VmioBase[VMIO_CD_CNTL];
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VmioBase[VMIO_CD_CNTL] = Z8536_MICR;
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VmioBase[VMIO_CD_CNTL] = 0x01;
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VmioBase[VMIO_CD_CNTL] = NIL;
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}
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/*
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**-----------------------------------------------------------------*/
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void vmio_send (
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/* ========= Send bytes to the LWL.
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*/ char nbytes,
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char *buff) {
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/*
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** The bytes are buff[0] to buff[nbytes-1]. buff[0] gives the
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** headerbit for buff[1]. The remainder are sent with the 9th
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** bit clear.
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*/
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int i;
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char aux;
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/*
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** ---------- loop sending the bytes ---------------
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*/
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VmioBase[VMIO_PORT_C] = 0; /* Mode = 0 */
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if (nbytes < 2) return;
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vmio_byte_send (buff[0], buff[1]); /* 2 bytes define the first "LWL-byte" */
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if (nbytes < 3) return;
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for (i = 2; i < nbytes; i++) { /* The remaining bytes have Bit-8 = 0 */
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vmio_byte_send (NIL, buff[i]);
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}
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}
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/*
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**-----------------------------------------------------------------*/
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void vmio_transp_init () {
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/* ================
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** Initialise VMIO10 ready for transparent
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** transmission of data.
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*/
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/*
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** ---------- initialize i/o ---------------
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*/
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VmioBase[VMIO_AB_CNTL] = 0x28; /* Port B output port-Mode Spec. Reg */
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VmioBase[VMIO_AB_CNTL] = 0x80;
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VmioBase[VMIO_AB_CNTL] = 0x29; /* Port B handshake interlock */
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VmioBase[VMIO_AB_CNTL] = 0x00;
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}
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/*==============================================================================
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** Main line program
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** ------------------
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**============================================================================*/
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int vmio_utility (char *base_addr) {
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/*============================================================================*/
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STATUS status;
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int i;
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char aux;
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void (* sig_status) (int);
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/*============================================================================
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** Perform the initialisation of global variables ...
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*/
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/*============================================================================
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** Get the VME base address of the Test Generator Module.
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** If the argument "base_addr" is zero, use DFLT_BASE_ADDR.
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*/
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if (base_addr == NULL) base_addr = (char *) DFLT_BASE_ADDR;
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#ifdef _NO_VME
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printf ("VMIO_UTILITY: Warning, VME access disabled.\n");
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VmioBase = &Vme_dummy[0];
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#else
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status = sysBusToLocalAdrs (VME_AM_USR_SHORT_IO, base_addr, &VmioBase);
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if (status != OK) {
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printf ("Error status from sysBusToLocalAdrs\n");
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return ERROR;
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}
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#endif
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/*
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** See if the module is present
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*/
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Signal_has_happened = 0;
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sig_status = signal (SIGBUS, Signal_Handler); /* Catch machine checks */
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if (sig_status == SIG_ERR) {
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printf (" Problem setting up a signal handler!\n");
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return ERROR;
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}
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i = setjmp (Trap_env);
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if (i == 0) aux = VmioBase[VMIO_AB_CNTL];
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if (Signal_has_happened != 0) {
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printf ("VMIO10 Module not present -- exiting!\n");
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return ERROR;
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}
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/*
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** Reset the VMIO10 Module.
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*/
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vmio_reset ();
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/*
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** Set Ports A, B, C and D to non-inverting and output
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*/
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vmio_pol_dir (NIL, NIL, /* Port A */
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NIL, NIL, /* Port B */
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NIL, NIL, /* Port C */
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NIL, NIL); /* Port D */
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/*
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** Enable Ports A, B, C and D.
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*/
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vmio_enable (0x84, 0x84);
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Go_on = 0;
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for (;;) {
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for (i=0; i<1000; i++) {}
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if (Go_on != 0) break;
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VmioBase[VMIO_PORT_A] = 0xff;
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VmioBase[VMIO_PORT_A] = 0x00;
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VmioBase[VMIO_PORT_A] = 0xff;
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VmioBase[VMIO_PORT_A] = 0x00;
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VmioBase[VMIO_PORT_A] = 0xff;
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VmioBase[VMIO_PORT_A] = 0x00;
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}
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printf ("Vmio_Utility exiting\n");
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return OK;
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}
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/*===================================== End of VMIO_UTILITY.C =============*/
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