- Added a new magnet driver for the SLS-VME setup using a
little program on an onboard computer
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62
vmemaggi.h
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62
vmemaggi.h
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/**
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* This file contaisn some data structure definitions and constants
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* for the VME-MAGII program. For more information see vmemaggi.c
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*
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* copyright: GPL
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*
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* Mark Koennecke, March 2008
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*/
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#ifndef VMEMAGGI
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#define VMEMAGGI
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#define SLOTBASE 0x1000 /* change when Hitec in different VME slot */
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#define MAPREG 0x424
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/**
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* VME has several completely different address ranges:
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* one 16 bit wide accessed through device node vme4l_a16d16
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* one 24 bit wide accessed through device node vme4l_a24d16
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* The sharc lives in the address range of the 24 bit bus.
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*/
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#define VMEDEV "/dev/vme4l_a16d16"
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#define MODSIZE 0x100
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typedef volatile unsigned char REG8BIT;
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typedef volatile unsigned short REG16BIT;
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struct PSCreg {
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REG16BIT stat_and_addr;
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REG16BIT data_hi;
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REG16BIT data_lo;
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REG16BIT not_used;
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} ;
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/* Bits of return status of the stat_and_addr word */
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#define PSC_REPLY_ERROR 0x20000
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#define PSC_STATUS_REPLY_READFLAG 0x8000
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#define PSC_STATUS_REPLY_FLAG_MISMATCH 0x4000
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#define PSC_STATUS_REPLY_BUFFERFULL 0x2000
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#define PSC_STATUS_REPLY_DSP_STOPPED 0x1000 /* disabled */
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#define PSC_STATUS_REPLY_PS_LOCAL 0x0800
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#define PSC_STATUS_REPLY_LINK_DOWN 0x0400
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#define PSC_STATUS_REPLY_ADDR_MISMATCH 0x0080
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#define PSC_STATUS_REPLY_DATA_MISMATCH 0x0040
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#define PSC_STATUS_REPLY_SOFTTIMEOUT 0x0020
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#define PSC_STATUS_REPLY_FPGATIMEOUT 0x0010
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#define PSC_STATUS_REPLY_STRLEN 256
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/* error codes */
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#define BADSLOT 70
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#define BADMAP 71
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#define DSPSTOP 72
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#define LINKDWN 73
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#define SOFTTIM 74
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#define FPGATIM 75
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#define ADDRMIS 76
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#define MISPS 77
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#define PSRNG 78
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#define NOPAR 79
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#define NOVAL 80
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#define BADPAR 81
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#define SETRNG 82
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#endif
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