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The timing chopper isn't necessarily the same as the master chopper.

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This commit is contained in:
Ferdi Franceschini
2014-06-17 07:20:27 +10:00
parent c00c317b69
commit 2996889ea5
1 changed files with 12 additions and 8 deletions
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20
site_ansto/instrument/bilby/config/chopper/chopper.tcl
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@ -1,20 +1,20 @@
namespace eval chopper {
variable sim_mode [SplitReply [chopper_simulation]]
set master_chopper_id_simvar 1
set t0_chopper_id_simvar 1
}
if {$sim_mode == false} {
MakeAsyncProtocol std
MakeAsyncQueue chopsel std chopsel1-bilby 30000
}
::utility::macro::getset int master_chopper_id {args} {
::utility::macro::getset int t0_chopper_id {args} {
variable sim_mode [SplitReply [chopper_simulation]]
if {$sim_mode == false} {
if {$args == ""} {
chopsel send {get master chopper}
return "master_chopper_id = [SplitReply [chopsel send {get master chopper}]]"
return "t0_chopper_id = [SplitReply [chopsel send {get master chopper}]]"
} else {
chopsel send "get master chopper"
chopsel send "enable chopper selection"
@ -23,12 +23,16 @@ if {$sim_mode == false} {
}
} else {
if {$args == ""} {
return master_chopper_id = $::chopper::master_chopper_id_simvar
if {$::chopper::t0_chopper_id_simvar < 1 || $::chopper::t0_chopper_id_simvar > 4} {
return -code error "Your simulated chopper returned an error"
} else {
set ::chopper::master_chopper_id_simvar $args
return t0_chopper_id = $::chopper::t0_chopper_id_simvar
}
} else {
set ::chopper::t0_chopper_id_simvar $args
}
}
}
sicslist setatt master_chopper_id klass NXdisk_chopper
sicslist setatt master_chopper_id long_name master_chopper_id
sicslist setatt master_chopper_id mutable false
sicslist setatt t0_chopper_id klass NXdisk_chopper
sicslist setatt t0_chopper_id long_name t0_chopper_id
sicslist setatt t0_chopper_id mutable false