fs (and other furnaces): fixes on interlock

- try to make interlock right
- merge status where ever possbile
This commit is contained in:
2025-07-07 16:05:27 +02:00
parent 1e73440149
commit cf151dd324
5 changed files with 143 additions and 57 deletions

View File

@@ -61,7 +61,7 @@ example cfg:
import time
import math
from frappy.core import Readable, Writable, Parameter, Attached, IDLE, Property
from frappy.lib import clamp
from frappy.lib import clamp, merge_status
from frappy.datatypes import LimitsType, EnumType, BoolType, FloatRange
from frappy.ctrlby import HasOutputModule
from frappy_psi.convergence import HasConvergence
@@ -94,7 +94,6 @@ class PImixin(HasOutputModule, Writable):
if not self.control_active:
return
out = self.output_module
self.status = IDLE, 'controlling'
now = time.time()
deltat = clamp(0, now-self._lasttime, 10)
self._lasttime = now
@@ -115,6 +114,12 @@ class PImixin(HasOutputModule, Writable):
self._overflow = 0
out.update_target(self.name, self._cvt2ext(output))
def read_status(self):
status = IDLE, 'controlling' if self.control_active else 'inactive'
if hasattr(super(), 'read_status'):
status = merge_status(super().read_status(), status)
return status
def cvt2int_square(self, output):
return (math.sqrt(max(0, clamp(x, *self._get_range()))) for x in (output, self.output_min, self.output_max))
@@ -146,10 +151,12 @@ class PImixin(HasOutputModule, Writable):
self._cvt2int = getattr(self, f'cvt2int_{self.output_func.name}')
self._cvt2ext = getattr(self, f'cvt2ext_{self.output_func.name}')
def write_control_active(self, value):
super().write_control_active(value)
if not value:
self.output_module.write_target(0)
# not needed, done by HasOutputModule.write_control_active
# def write_control_active(self, value):
# super().write_control_active(value)
# out = self.output_module
# if not value:
# out.write_target(out.parameters['target'].datatype.default)
def set_target(self, value):
if not self.control_active: