frappy_psi.drums: changes after test

when trying with Marcel, we needed these fixes
This commit is contained in:
l_samenv 2025-03-14 09:02:50 +01:00
parent 907a52ccdb
commit 7e2ccd214e
2 changed files with 27 additions and 4 deletions

View File

@ -56,7 +56,7 @@ class Drums(Writable):
self._pos = 0
for i, action in enumerate(self.pattern[self._pos:]):
upper = action.upper()
relais = self.actions.get(action.upper())
relais = self.actions.get(upper)
if relais:
relais.write_target(upper == action) # True when capital letter
else:

View File

@ -18,16 +18,39 @@
# Jael Celia Lorenzana <jael-celia.lorenzana@psi.ch>
# *****************************************************************************
import os
from glob import glob
from frappy.core import Readable, Writable, Parameter, BoolType, StringType,\
FloatRange, Property, TupleOf, ERROR, IDLE
from frappy.errors import ConfigError
from math import log
basepaths = '/sys/class/ionopimax', '/sys/class/ionopi'
class Base:
addr = Property('address', StringType())
_devpath = None
devclass = None
def initModule(self):
super().initModule()
# candidates = glob(f'/sys/class/iono*/*/{self.addr}')
# if not candidates:
# raise ConfigError(f'can not find path for {self.addr}')
for basepath in basepaths:
for devclass in ([self.devclass] if isinstance(self.devclass, str) else self.devclass):
devpath = f'{basepath}/{devclass}'
if os.path.exists(devpath):
self._devpath = devpath
return
else:
self.log.info('%s does not exist', devpath)
else:
raise ConfigError(f'device path for {self.devclass} not found {devpath}')
def read(self, addr, scale=None):
with open(f'/sys/class/ionopimax/{self.devclass}/{addr}') as f:
with open(f'{self._devpath}/{addr}') as f:
result = f.read()
if scale:
return float(result) / scale
@ -35,7 +58,7 @@ class Base:
def write(self, addr, value, scale=None):
value = str(round(value * scale)) if scale else str(value)
with open(f'/sys/class/ionopimax/{self.devclass}/{addr}', 'w') as f:
with open(f'{self._devpath}/{addr}', 'w') as f:
f.write(value)
@ -49,7 +72,7 @@ class DigitalInput(Base, Readable):
class DigitalOutput(DigitalInput, Writable):
target = Parameter('output state', BoolType(), readonly=False)
devclass = 'digital_out'
devclass = 'digital_out', 'relay'
def write_target(self, value):
self.write(self.addr, value, 1)