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Merge pull request 'Simulate more correct counter resetting' (#2) from fix_counter_reset into master
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Reviewed-on: #2
This commit was merged in pull request #2.
This commit is contained in:
soederqvist_a
2025-09-10 15:28:58 +02:00
parent eefb8c2053 5f86266fc0
commit b26704d061
1 changed files with 6 additions and 2 deletions
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8
sim/daq_sim.py
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@@ -50,7 +50,7 @@ class DAQ:
] ]
def clearCount(self, counter): def clearCount(self, counter):
self.counts[counter-1] = 0 self.counts[counter] = 0
def clearCounts(self): def clearCounts(self):
self.counts = [0] * self.total_channels self.counts = [0] * self.total_channels
@@ -260,7 +260,11 @@ with socket.socket(socket.AF_INET, socket.SOCK_STREAM) as s:
elif re.fullmatch(r'CC (\d+)', data): elif re.fullmatch(r'CC (\d+)', data):
counter = int(re.fullmatch(r'CC (\d+)', data).group(1)) counter = int(re.fullmatch(r'CC (\d+)', data).group(1))
daq.clearCount(counter) num_bits = daq.total_channels
bits = [(counter >> bit) & 1 for bit in range(num_bits - 1, -1, -1)]
for ch, bit in enumerate(bits):
if bit:
daq.clearCount(ch)
send('') send('')
elif re.fullmatch(r'TP (\d+(\.\d+)?)', data): elif re.fullmatch(r'TP (\d+(\.\d+)?)', data):