656 lines
15 KiB
C
656 lines
15 KiB
C
/* devVxiTDM.c */
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/* base/src/dev $Id$ */
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/* Device Support Routines for Custom Vxi Time Delay Module */
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/*
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* Author: Jim Kowalkowski
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* Date: 8/20/92
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*
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* Experimental Physics and Industrial Control System (EPICS)
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*
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* Copyright 1991, the Regents of the University of California,
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* and the University of Chicago Board of Governors.
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*
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* This software was produced under U.S. Government contracts:
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* (W-7405-ENG-36) at the Los Alamos National Laboratory,
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* and (W-31-109-ENG-38) at Argonne National Laboratory.
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*
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* Initial development by:
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* The Controls and Automation Group (AT-8)
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* Ground Test Accelerator
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* Accelerator Technology Division
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* Los Alamos National Laboratory
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*
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* Co-developed with
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* The Controls and Computing Group
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* Accelerator Systems Division
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* Advanced Photon Source
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* Argonne National Laboratory
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*
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* Modification Log:
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* -----------------
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* .01 08-20-92 jbk Initial Implementation
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* .02 09-18-92 jbk frame/slot addressing added
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* .03 08-31-93 joh updated for changed epvxi
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* status format
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* ...
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*/
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/* Since this is a custom module, there is no user manual. The
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information supplied here summorizing the usage.
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Simplified diagram of board:
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input 1 ---->|
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| (delay module section)
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input 2 ---->|
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|---->4:1Mux---->8-bit digital delay line--->gate--+--->
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input 3 ---->| 0-1.275us in 5ns steps |
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| V
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input 4 ---->| last
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value
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Ten delay module sections exist for the four inputs. Each one has an
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associated vxi register. So altogether there are ten of the
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following registers.
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_________________________________________________________________
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bits |15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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|---------------+---+---+-------+-------------------------------|
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write | unused | |TE | TS | delay setting in ns |
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|---------------+---+---+-------+-------------------------------|
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read | unused |TD |TE | TS | delay setting in ns |
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+---------------+---+---+-------+-------------------------------+
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where TE = trigger enable/disable
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TS = trigger select (input 1-4)
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TD = trigger detect (trigger detected/not detected)
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*/
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#include <vxWorks.h>
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#include <vme.h>
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#include <types.h>
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#include <ctype.h>
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#include <stdioLib.h>
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#include <string.h>
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#include <iv.h>
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#include <drvEpvxi.h>
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#include <alarm.h>
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#include <dbDefs.h>
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#include <dbAccess.h>
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#include <dbCommon.h>
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#include <fast_lock.h>
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#include <recSup.h>
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#include <devSup.h>
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#include <dbScan.h>
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#include <special.h>
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#include <module_types.h>
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#include <eventRecord.h>
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#include <pulseDelayRecord.h>
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/* Create the dsets for devVxiTDM */
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static long report();
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static long init();
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static long init_pd();
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static long get_ioint_info();
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static long write_pd();
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static long get_enum();
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typedef struct {
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long number;
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DEVSUPFUN report;
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DEVSUPFUN init;
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DEVSUPFUN init_record;
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DEVSUPFUN get_ioint_info;
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DEVSUPFUN write;
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DEVSUPFUN get_enum;
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} TDM_DSET;
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/*It doesnt matter who honors report or init thus let 1st devSup do it*/
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TDM_DSET devPdVxiTDM = { 6, report, init, init_pd, NULL, write_pd, get_enum };
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volatile int VxiTDMDebug=0;
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#define Debug(f,v) { if(VxiTDMDebug) printf(f,v); }
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/* definitions related to fields of records*/
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/* defs for gtyp and ctyp fields */
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#define ACTIVE 1
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#define INACTIVE 0
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/* Trigger Source Selection - all macros require short for reg */
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#define TRGS_CLEAR(reg) (reg&0xfcff)
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#define TRGS_SET(trgs,reg) (TRGS_CLEAR(reg)|trgs<<8)
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#define TRGS_VALUE(reg) ((reg&0x0300)>>8)
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#define TRGS1 0x0000
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#define TRGS2 0x0100
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#define TRGS3 0x0200
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#define TRGS4 0x0300
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#define TRIG_ENABLE(reg) (reg|0x0400)
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#define TRIG_DISABLE(reg) (reg&(~0x400))
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#define TRIG_VALUE(reg) ((reg&0x0400)?1:0)
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#define DELAY_CLEAR(reg) (reg&0xff00)
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#define DELAY_SET(delay,reg) (DELAY_CLEAR(reg)|delay)
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#define DELAY_VALUE(reg) (reg&0x00ff)
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#define TRIG_DETECT(reg) (0x0800®)
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#define REG_OFFSET 0x0020
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/* EPICS_VXI_LA_COUNT is a global variable that must be present in the IOC */
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#define MAXCARDS EPICS_VXI_LA_COUNT
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#define MAXSIG 9
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#define MAX_NANOSEC 1275e1
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#define MAX_DELAY 255e1
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#define TIME_FACT MAX_DELAY/MAX_NANOSEC
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#define TIME_FACT_TO MAX_NANOSEC/MAX_DELAY
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#define VXI_MAKE_TDM 0xee4 /* official is 3812 */
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#define VXI_MODEL_TDM 0xf01 /* test one 0xf01 */
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unsigned long VxiTDM_make = VXI_MAKE_TDM;
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unsigned long VxiTDM_model = VXI_MODEL_TDM;
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static unsigned long tdmDriverID;
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/* config area for each card */
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/* for stat-> bit per channel 1=used/valid, 0=unused/invalid, bit-0=channel-0 */
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struct tdm_config {
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FAST_LOCK lock;
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unsigned short stat;
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};
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/* time unit conversion constants - want in nanoseconds
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seconds,milliseconds,microseconds,nanoseconds,picoseconds */
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static double cons[] = {
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1e9,1e6,1e3,1,1e-3 };
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static void tdmInitLA();
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static void tdm_stat();
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static void tdm_report();
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/***************************************************************/
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/*
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report for device - just uses the vxi report
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*/
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static long report(int interest)
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{
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unsigned short la,signal;
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struct vxi_csr *pcsr;
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struct tdm_config *tc;
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epvxiDeviceSearchPattern dsp;
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printf("Report for Vxi Time Delay Module\n");
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dsp.flags=VXI_DSP_make|VXI_DSP_model;
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dsp.make=VxiTDM_make; /* VXI_MAKE_TDM; */
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dsp.model=VxiTDM_model; /* VXI_MODEL_TDM; */
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if( epvxiLookupLA(&dsp,tdm_report,(void *)&interest)!=VXI_SUCCESS)
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return ERROR;
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return OK;
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}
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static void tdm_report(unsigned la,void *interest)
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{
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tdm_stat(la,(int)*(int *)interest);
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return;
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}
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/***************************************************************/
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/*
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Initialize all the TDM cards
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*/
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static long init(int after)
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{
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epvxiDeviceSearchPattern dsp;
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if(after) return(0);
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tdmDriverID=epvxiUniqueDriverID();
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dsp.flags=VXI_DSP_make|VXI_DSP_model;
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dsp.make=VxiTDM_make; /* VXI_MAKE_TDM; */
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dsp.model=VxiTDM_model; /* VXI_MODEL_TDM; */
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if( epvxiLookupLA(&dsp,tdmInitLA,(void *)NULL)!=VXI_SUCCESS)
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{
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logMsg("No ANL Time Delay Modules found\n");
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return ERROR;
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}
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if(epvxiRegisterMakeName(VxiTDM_make,"ANL")!=VXI_SUCCESS) /* VXI_MAKE_TDM */
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logMsg("%s: unable to register MAKE\n",__FILE__);
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if(epvxiRegisterModelName(VxiTDM_make,VxiTDM_model,
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"Time Delay Module")!=VXI_SUCCESS) /* VXI_MAKE_TDM VXI_MODEL_TDM */
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logMsg("%s: unable to register MODEL\n",__FILE__);
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return OK;
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}
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/***************************************************************/
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/*
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Initialize one TDM card
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*/
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static void tdmInitLA(unsigned la)
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{
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int status;
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struct vxi_csr *pcsr;
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struct tdm_config *tc;
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Debug("tdmInitLA() la=%d \n",la);
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status=epvxiOpen(la,tdmDriverID,sizeof(struct tdm_config),tdm_stat);
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if(status!=VXI_SUCCESS)
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{
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logMsg("%s:Device Open Failed (stat=%d)(LA=0x%02X)\n",
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__FILE__,status,la);
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return;
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}
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pcsr=VXIBASE(la);
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tc=epvxiPConfig(la,tdmDriverID,struct tdm_config *);
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if(!tc)
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{
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epvxiClose(la,tdmDriverID);
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return;
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}
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FASTLOCKINIT(&tc->lock);
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tc->stat=0;
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return;
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}
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/***************************************************************/
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/*
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Initialize a pulse delay record channel (signal)
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*/
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static long init_pd(struct pulseDelayRecord *pd)
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{
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struct vxiio *pvxiio = (struct vxiio *)&(pd->out.value);
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unsigned short dummy;
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short la,signal;
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unsigned short *channel_reg;
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static unsigned epvxiGetLa();
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struct vxi_csr *pcsr;
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struct tdm_config *tc;
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long status;
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/* out must be an VXI_IO */
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switch (pd->out.type)
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{
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case (VXI_IO):
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break;
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default :
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recGblRecordError(S_dev_badBus,(void *)pd,
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"devVxiTDM (init_record) Illegal OUT Bus Type");
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return(S_dev_badBus);
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}
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/* initialize to null indicating no address found */
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if((la=epvxiGetLa(pvxiio))<0)
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{
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recGblRecordError(S_dev_badSignal,(void *)pd,
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"devVxiTDM (init_record) Illegal frame/slot");
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return(S_dev_badSignal);
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}
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Debug("got la = %d\n",la);
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if(isdigit(pvxiio->parm[0]))
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signal=pvxiio->parm[0]-'0';
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else
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{
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recGblRecordError(S_dev_badSignal,(void *)pd,
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"devVxiTDM (init_record) Illegal SIGNAL field");
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return(S_dev_badSignal);
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}
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Debug("frame = %d \n",pvxiio->frame);
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Debug("slot = %d \n",pvxiio->slot);
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Debug("la = %d \n",pvxiio->la);
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Debug("flag = %d \n",pvxiio->flag);
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Debug("signal = %d \n",signal);
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Debug("parm = (%s) \n",pvxiio->parm);
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if(la>=MAXCARDS)
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{
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recGblRecordError(S_dev_badCard,(void *)pd,
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"devVxiTDM (init_record) exceeded maximum supported cards");
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return(S_dev_badCard);
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}
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if(signal>MAXSIG)
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{
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recGblRecordError(S_dev_badSignal,(void *)pd,
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"devVxiTDM (init_record) Illegal SIGNAL field");
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return(S_dev_badSignal);
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}
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/* get the address of the register for this la and signal */
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status = epvxiFetchPConfig(la,tdmDriverID,tc);
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if(status)
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{
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recGblRecordError(status,(void *)pd,
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"devVxiTDM (init_record) No card at address");
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return(status);
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}
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pcsr=VXIBASE(la);
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(char *)channel_reg=(char *)pcsr+REG_OFFSET;
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Debug("channel_reg = %08.8X \n",channel_reg);
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Debug("tc->stat = %x \n",tc->stat);
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if( tc->stat&(1<<signal) )
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{
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recGblRecordError(S_dev_badSignal,(void *)pd,
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"devVxiTDM (init_record) signal/la already in use");
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return(S_dev_badSignal);
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}
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FASTLOCK(&tc->lock);
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/* check if register readable */
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if(vxMemProbe((char*)(&channel_reg[signal]),READ,
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sizeof(unsigned short),(char*)&dummy)!=OK)
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{
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recGblRecordError(S_dev_badSignal,(void *)pd,
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"devVxiTDM (init_record) vxMemProbe failed for signal/la");
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return(S_dev_badSignal);
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}
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/* enable/disable gate */
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switch(pd->gate)
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{
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default:
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case ACTIVE:
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channel_reg[signal]=TRIG_ENABLE(channel_reg[signal]);
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break;
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case INACTIVE:
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channel_reg[signal]=TRIG_DISABLE(channel_reg[signal]);
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break;
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}
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FASTUNLOCK(&tc->lock);
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tc->stat|=(1<<signal);
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/*
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This field is used to indicate the address of the field
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which caused processing of the record which is none now.
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*/
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pd->dpvt=(void *)pd;
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return(0);
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}
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/***************************************************************/
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/*
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Set/read the values for a channel
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*/
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static long write_pd(struct pulseDelayRecord *pr)
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{
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unsigned short *channel_reg;
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unsigned short la,signal;
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unsigned short delay_time,channel_value,channel_read;
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struct vxiio *pvxiio;
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struct vxi_csr *pcsr;
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struct tdm_config *tc;
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long status;
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Debug("Entering write_pd for pulseDelay\n",0);
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/* will be null if init failed */
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if(!pr->dpvt) return(S_dev_NoInit);
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pvxiio = (struct vxiio *)&(pr->out.value);
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la = pvxiio->la;
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if(isdigit(pvxiio->parm[0]))
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signal=pvxiio->parm[0]-'0';
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else
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{
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recGblRecordError(S_dev_badSignal,(void *)pr,
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"devVxiTDM (init_record) Illegal SIGNAL field");
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return(S_dev_badSignal);
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}
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/* get address of register for this card and signal */
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status=epvxiFetchPConfig(la,tdmDriverID,tc);
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if(status){
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return status;
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}
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pcsr=VXIBASE(la);
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(char *)channel_reg=(char *)pcsr+REG_OFFSET;
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Debug("Channel base address = 0x%08.8X \n",channel_reg);
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Debug("Channel register address = 0x%08.8X \n",&channel_reg[signal]);
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FASTLOCK(&tc->lock);
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/* set val to active if trigger detect on and a periodic scan
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caused processing, special processing will set pfld */
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/* only lower 2 bytes used in pfld - kludge to be removed later */
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if(!(pr->pfld&0x00ff))
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{
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channel_read=channel_reg[signal];
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if(TRIG_DETECT(channel_read))
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pr->val=ACTIVE;
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else
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pr->val=INACTIVE;
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pr->udf=FALSE;
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pr->dly=(double)DELAY_VALUE(channel_read)*TIME_FACT_TO;
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pr->hts=TRGS_VALUE(channel_read);
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pr->gate=TRIG_VALUE(channel_read);
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Debug("trigger detect read - value = %d\n",pr->val);
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}
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else
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{
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/* initialize new channel value */
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channel_value=0x0000;
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/* compute delay time */
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delay_time=(unsigned short)(cons[pr->unit]*pr->dly*TIME_FACT);
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Debug("delay time = %d\n",delay_time);
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Debug("units = %d \n",pr->unit);
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if(delay_time > 255)
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{
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recGblSetSevr(pr,WRITE_ALARM,INVALID_ALARM);
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recGblRecordError(S_db_badField,(void *)pr,
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"invalid delay value - set to max");
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delay_time=255;
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}
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channel_value=DELAY_SET(delay_time,channel_value);
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/* enable/disable gate */
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switch(pr->gate)
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{
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default:
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case ACTIVE:
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channel_value=TRIG_ENABLE(channel_value);
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break;
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case INACTIVE:
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channel_value=TRIG_DISABLE(channel_value);
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break;
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}
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/* trigger selection set */
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if(pr->hts > 3)
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{
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recGblSetSevr(pr,WRITE_ALARM,INVALID_ALARM);
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recGblRecordError(S_db_badField,(void *)pr,
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"invalid trigger value");
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return(0);
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}
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channel_value=TRGS_SET(pr->hts,channel_value);
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/* write to register */
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channel_reg[signal]=channel_value;
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Debug("Ending channel value = %04.4X\n",channel_value);
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}
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FASTUNLOCK(&tc->lock);
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return(0);
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}
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/***************************************************************/
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/*
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report for vxi routines
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*/
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static void tdm_stat(unsigned la,int level)
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{
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struct tdm_config *tc;
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struct vxi_csr *pcsr;
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int i;
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long status;
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status = epvxiFetchPConfig(la,tdmDriverID,tc);
|
||
if(status){
|
||
errMessage(status,NULL);
|
||
return;
|
||
}
|
||
pcsr=VXIBASE(la);
|
||
|
||
Debug("Report level = %d\n",level);
|
||
|
||
printf("Report for Vxi Time Delay module %d:\n",la);
|
||
printf(" Signals in use:");
|
||
|
||
for(i=0;i<=MAXSIG;i++) if(tc->stat&(1<<i)) printf("%d ",i);
|
||
|
||
printf("\n");
|
||
}
|
||
|
||
/***************************************************************/
|
||
/*
|
||
Routines to fill vxiio stucture -
|
||
always returns la
|
||
calculates la from frame/slot or figures out frame/slot
|
||
from la
|
||
*/
|
||
|
||
#define MAX_VXI_SLOTS 12
|
||
#define MAX_VXI_FRAMES 255
|
||
|
||
static void epvxiGetLA_one(unsigned la,void *pvxiio)
|
||
{
|
||
struct vxiio *pvxi=(struct vxiio *)pvxiio;
|
||
|
||
Debug("epvxiGetLA_one() la = %x \n",la);
|
||
pvxi->la=(short)la;
|
||
|
||
return;
|
||
}
|
||
|
||
static unsigned epvxiGetLa(struct vxiio *pvxiio,unsigned long vxiDriverID)
|
||
{
|
||
epvxiDeviceSearchPattern dsp;
|
||
long status;
|
||
|
||
if(pvxiio->flag==0) /* frame */
|
||
{
|
||
dsp.flags=VXI_DSP_slot|VXI_DSP_slot_zero_la;
|
||
|
||
if(pvxiio->slot > MAX_VXI_SLOTS || pvxiio->slot < 0 ||
|
||
pvxiio->frame > MAX_VXI_FRAMES || pvxiio->frame < 0)
|
||
return ERROR;
|
||
|
||
dsp.slot=(unsigned char)pvxiio->slot;
|
||
dsp.slot_zero_la=(unsigned char)pvxiio->frame;
|
||
|
||
Debug("epvxiGetLa() dsp.slot=%d\n",dsp.slot);
|
||
Debug("epvxiGetLa() dsp.slotzero_la=%d\n",dsp.slot_zero_la);
|
||
|
||
status = epvxiLookupLA(&dsp,epvxiGetLA_one,(void *)pvxiio);
|
||
if(status)
|
||
return ERROR;
|
||
}
|
||
else /* SA - static address (la) */
|
||
{
|
||
pvxiio->frame=PVXIDI(pvxiio->la)->slot_zero_la;
|
||
pvxiio->slot=PVXIDI(pvxiio->la)->slot;
|
||
}
|
||
|
||
return(pvxiio->la);
|
||
}
|
||
|
||
#define LOW_HTS 0
|
||
#define HIGH_HTS 3
|
||
|
||
static long get_enum(struct dbAddr *paddr,struct dbr_enumStrs *p)
|
||
{
|
||
struct pulseDelayRecord *ppd=(struct pulseDelayRecord *)paddr->precord;
|
||
int i,j;
|
||
|
||
Debug("Getting values for hts\n",0);
|
||
|
||
if(paddr->pfield==(void *)&ppd->hts)
|
||
{
|
||
for(j=0,i=LOW_HTS;i<=HIGH_HTS&&j<DB_MAX_CHOICES;i++,j++)
|
||
{
|
||
Debug(" strs=(%d)\n",i);
|
||
sprintf(p->strs[j],"%d",i);
|
||
}
|
||
|
||
p->no_str=j;
|
||
}
|
||
else
|
||
{
|
||
p->no_str=0;
|
||
}
|
||
|
||
return(0);
|
||
}
|
||
|