220 lines
8.0 KiB
C
220 lines
8.0 KiB
C
/* drvBitBusInterface.h */
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/* share/src/drv $Id$ */
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/*
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* Author: John Winans
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* Date: 09-10-91
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* XVME-402 BitBus driver
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*
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* Experimental Physics and Industrial Control System (EPICS)
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*
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* Copyright 1991, the Regents of the University of California,
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* and the University of Chicago Board of Governors.
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*
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* This software was produced under U.S. Government contracts:
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* (W-7405-ENG-36) at the Los Alamos National Laboratory,
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* and (W-31-109-ENG-38) at Argonne National Laboratory.
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*
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* Initial development by:
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* The Controls and Automation Group (AT-8)
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* Ground Test Accelerator
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* Accelerator Technology Division
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* Los Alamos National Laboratory
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*
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* Co-developed with
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* The Controls and Computing Group
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* Accelerator Systems Division
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* Advanced Photon Source
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* Argonne National Laboratory
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*
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* Modification Log:
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* -----------------
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* .01 09-30-91 jrw Written
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*/
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/******************************************************************************
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*
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* Possible states the receiver message handling system can be in.
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*
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******************************************************************************/
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#define BB_RXWAIT 0 /* waiting for a new message */
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#define BB_RXGOT1 1 /* receiving header bytes */
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#define BB_RXREST 2 /* finished with header, reading message */
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#define BB_RXIGN 3 /* unsolicited message??? ignoreing rest */
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#define BB_RXGOT3 4 /* got 3 bytes of the header so far */
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/******************************************************************************
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* Memory Map of XVME-402 BITBUS CARD
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*
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* This board is rather stupid in that it wastes a whole Kilo of space
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* for its 5 1-byte regs. So the dm* fields in the structure below are
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* for those filler locations.
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*
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*****************************************************************************/
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struct xvmeRegs {
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unsigned char dm0;
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unsigned char stat_ctl;
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unsigned char dm2;
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unsigned char int_vec;
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unsigned char dm4;
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unsigned char data;
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unsigned char dm6;
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unsigned char cmnd;
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unsigned char dm8;
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unsigned char fifo_stat;
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unsigned char dmA[1014]; /* Board occupies 1024 bytes in memory*/
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};
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#define BB_APERLINK 256 /* node 255 is the master */
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#define BB_SEND_CMD 0x0 /* command to initiate sending of msg */
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#define BB_MAX_MSG_LENGTH 20 /* currently max node configuration */
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#define XVME_ENABLE_INT 0x08 /* Allow xvme interupts */
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#define XVME_TX_INT 0x20 /* int enable TX only */
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#define XVME_RX_INT 0x80 /* int exable RX only */
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#define XVME_NO_INT 0 /* disable all interrupts */
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/******************************************************************************
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*
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* Fifo status register format
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*
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* +----+----+----+----+----+----+----+----+
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* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Bits
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* +----+----+----+----+----+----+----+----+
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* "1" "1" RCMD RFNE "1" "1" "1" TFNF data
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*
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* RCMD = "1"= command received ( end of message )
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* "0"= No command
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*
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* RFNE = "1" = Receive Fifo Not Empty
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* "0" = Receive Fifo empty
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*
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* TFNF = "1" = Transmit Fifo Not Full
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* "0" = transmit fifo full
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*
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* NOTE:
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* A write to bit 7 of the Fifo status register can be used to reset the
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* xvme board.
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*
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*****************************************************************************/
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#define XVME_RCMD 0x20 /* Command has been received */
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#define XVME_RFNE 0x10 /* Receive Fifo is Not Empty */
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#define XVME_TFNF 0x01 /* Transmit FIFO is Not Full */
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#define XVME_FSVALID 0x31 /* these are the only valid status bits */
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#define XVME_FSIDLE 0x01 /* fifo_stat & FSVALID = 0x1 when it is idle */
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#define XVME_RESET 0x80 /* Write this and you reset the XVME card */
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/* BitBus Transaction Message Structure */
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typedef struct bitBusMsg {
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unsigned short link; /* account for this in length only! */
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unsigned char length;
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unsigned char route;
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unsigned char node;
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unsigned char tasks;
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unsigned char cmd;
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unsigned char parm[BB_MAX_MSG_LENGTH - 7 + 1]; /* save room for \0 */
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};
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/* Partial List of RAC Command Definitions (defined in BitBus Specification) */
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#define RAC_RESET_SLAVE 0x00
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#define RAC_CREATE_TASK 0x01
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#define RAC_DELETE_TASK 0x02
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#define RAC_GET_FUNC_IDS 0x03
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#define RAC_PROTECT 0x04
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#define RAC_READ_IO 0x05
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#define RAC_WRITE_IO 0x06
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#define RAC_UPDATE_IO 0x07
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#define RAC_UPLOAD_MEM 0x08
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#define RAC_DOWNLOAD_MEM 0x09
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#define RAC_OR_IO 0x0A
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#define RAC_AND_IO 0x0B
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#define RAC_XOR_IO 0x0C
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#define RAC_STATUS_READ 0x0D
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#define RAC_STATUS_WRITE 0x0E
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#define RAC_NODE_INFO 0x0F
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#define RAC_OFFLINE 0x10
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#define RAC_UPLOAD_CODE 0x11
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#define RAC_DOWNLOAD_CODE 0x12
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/* Reply message Command Byte Definitions */
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#define BB_NO_ERROR 0x00
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/* 0x01 thru 0x7F are user defined */
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#define BB_SEND_TMO 0x70
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/* 0x80 thru 0xFF are defined by BitBus */
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#define BB_NO_DEST_TASK 0x80
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#define BB_TASK_OVERFLOW 0x81
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#define BB_REG_BANK_OVERFLOW 0x82
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#define BB_DUP_FUNC_ID 0x83
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#define BB_NO_BUFFERS 0x84
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#define BB_PROTOCOL_ERR 0x91
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#define BB_NO_DEST_DEV 0x93
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#define BB_RAC_PROTECTED 0x95
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#define BB_UNKNOWN_RAC_CMND 0x96
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/******************************************************************************
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*
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* The BUSY/IDLE notion is used to count the number of outstanding
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* messages for a specific node. The idea is that up to BUSY messages
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* can be sent to a node before waiting before deciding not to send any more.
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* According to the BitBus specs, this value is 7. However, it also
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* states that responses can come back out of order. If this is even true
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* for messages sent to the SAME TASK ON THE SAME NODE, the received messages
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* CAN NOT be routed back to their initiators properly. Because the node#
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* and task# is all we have to identify what a response message is for,
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* I am limiting the per-node maximum to 1.
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*
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******************************************************************************/
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#define BUSY 1 /* deviceStatus value if device is currently busy */
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#define IDLE 0 /* deviceStatus value if device is currently idle */
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/******************************************************************************
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*
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* The bbLink structure holds all the required link-specific queueing
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* information.
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*
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******************************************************************************/
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struct bbLink {
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int linkType; /* the type of link (defined in link.h) */
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int linkId; /* the link number of this structure */
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FAST_LOCK linkEventSem; /* given when this link requires service */
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LIST hiPriList; /* list head for high priority queue */
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FAST_LOCK hiPriSem; /* semaphore for high priority queue */
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LIST loPriList; /* list head for low priority queue */
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FAST_LOCK loPriSem; /* semaphore for low priority queue */
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LIST busyList; /* messages waiting on a response */
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unsigned char deviceStatus[BB_APERLINK];/* mark a device as idle or busy */
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};
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/******************************************************************************
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*
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* The xvmeLink structure holds all the xvme-card specific data required
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* for the operation of the link.
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*
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******************************************************************************/
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struct xvmeLink {
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WDOG_ID watchDogId; /* watchdog for timeouts */
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int watchDogFlag; /* set by the watch dog int handler */
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struct xvmeRegs *bbRegs;/* pointer to board registers */
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int rxStatus; /* current state of the message receiver */
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char rxHead[5]; /* room to keep part of the current message's he
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ader information */
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unsigned char *rxMsg; /* where to place next message byte (after heade
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r transfer!!!) */
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int cHead; /* byte counter for data in rxHead */
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struct dpvtHead *rxDpvtHead; /* for message currently receiving */
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int txCount; /* number of bytes sent in current message */
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struct dpvtHead *txDpvtHead; /* for message currently transmitting */
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unsigned char *txMsg; /* next byte to transmit in current msg */
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};
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