If fastReceiver() took more than 0.01 seconds to exit,
sleepySender() might have pushed a second message onto
the queue after setting recvExit, so there would be an
extra message in the queue for the next test, which I
was seeing on Appveyor. That's my current theory...
The internal mySend() and myReceive() routines do expect a timeout
of -1 to mean wait forever, see the epicsMessageQueueSend() and
epicsMessageQueueReceive() API routines.
Move the code that wakes up the next sending task to after we've
added our threadNode to the receiveQueue. He still has to wait for
us to release the Mutex though, so this might make no difference.
This commit also changes when we decrement the number of waiting
senders so it always happens immediately after a threadNode gets
taken off the sendQueue by the code that removed it.
When sending a message, if the queue is full so we have to wait, we
create a threadNode with an eventNode in it and stick it on the
sendQueue, then wait for a receiver to signal that event, waking us.
If we awoke due to a timeout but a receiver was actually waking us
up anyway (i.e. eventSent was set), we shouldn't give up.
Introduced freeEventNode() which ensures eventNodes don't have a
signalled event in them before returning the node to the freeList.
Callers pass the status from epicsEventWaitWithTimeout() to indicate
whether it was signalled or not. If it timed out we must trigger it
and Wait to clear the event state.
It appears that previously a negative timeout actually implemented a
'wait forever', but the VxWorks and RTEMS implementations both check
for (timeout <= 0) and return immediately if nothing can be done
without waiting.
Also improve behavior in case signals are delivered to the sleeping
thread. This fixes a potential security weakness reported by codacy
(interaction of usleep with SIGALRM and other timer functions such
as sleep(), alarm(), setitimer(), and nanosleep() is unspecified).
Working with Dirk Zimoch @dirk.zimoch, fixed various issues
with bit operations on VS2019 32bit. These seem to relate to
handling bit 31 of a 32 bit number.
As EPICS << is an arithmetic bit shift, following Java we
have added <<< and >>> operators for logical shifts
Though it is on a different architecture, this looks like
a similar issue to LP: #1838792
GNU libstdc++ prior to GCC 6.1.0, the overlay math.h always
includes math.h from glibc, which defines isinf() and friends.
GCC 6.1.0 includes a change (6c8ced3f4f867b72a623fe2f23efa204c5786a28)
so that the overlay math.h never includes the glibc math.h
when compiling c++.
The overlay math.h sometimes includes "using std::isinf"
Determined by inspecting libc math.h when building gcc.
Andrew Johnson
zimoch