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https://github.com/slsdetectorgroup/slsDetectorPackage.git
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142 lines
5.0 KiB
C
Executable File
142 lines
5.0 KiB
C
Executable File
#ifndef AD9257_H
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#define AD9257_H
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#include "ansi.h"
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#include "commonServerFunctions.h"
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#include <stdio.h>
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/* AD9257 ADC DEFINES */
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#define AD9257_ADC_NUMBITS (24)
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#define AD9257_DEV_IND_2_REG (0x04)
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#define AD9257_CHAN_H_OFST (0)
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#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
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#define AD9257_CHAN_G_OFST (1)
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#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST)
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#define AD9257_CHAN_F_OFST (2)
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#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST)
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#define AD9257_CHAN_E_OFST (3)
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#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
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#define AD9257_DEV_IND_1_REG (0x05)
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#define AD9257_CHAN_D_OFST (0)
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#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
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#define AD9257_CHAN_C_OFST (1)
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#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST)
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#define AD9257_CHAN_B_OFST (2)
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#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST)
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#define AD9257_CHAN_A_OFST (3)
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#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST)
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#define AD9257_CLK_CH_DCO_OFST (4)
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#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST)
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#define AD9257_CLK_CH_IFCO_OFST (5)
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#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
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#define AD9257_POWER_MODE_REG (0x08)
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#define AD9257_POWER_INTERNAL_OFST (0)
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#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
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#define AD9257_INT_RESET_VAL (0x3)
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#define AD9257_INT_CHIP_RUN_VAL (0x0)
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#define AD9257_POWER_EXTERNAL_OFST (5)
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#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
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#define AD9257_EXT_FULL_POWER_VAL (0x0)
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#define AD9257_EXT_STANDBY_VAL (0x1)
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#define AD9257_OUT_MODE_REG (0x14)
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#define AD9257_OUT_FORMAT_OFST (0)
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#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
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#define AD9257_OUT_BINARY_OFST_VAL (0)
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#define AD9257_OUT_TWOS_COMPL_VAL (1)
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#define AD9257_OUT_LVDS_OPT_OFST (6)
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#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
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#define AD9257_OUT_LVDS_ANSI_VAL (0)
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#define AD9257_OUT_LVDS_IEEE_VAL (1)
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#define AD9257_OUT_PHASE_REG (0x16)
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#define AD9257_OUT_CLK_OFST (0)
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#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
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#define AD9257_OUT_CLK_60_VAL (0x1)
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#define AD9257_IN_CLK_OFST (4)
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#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
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#define AD9257_IN_CLK_0_VAL (0x0)
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#define AD9257_VREF_REG (0x18)
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#define AD9257_VREF_OFST (0)
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#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST)
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#define AD9257_VREF_1_33_VAL (0x2)
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#define AD9257_TEST_MODE_REG (0x0D)
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#define AD9257_OUT_TEST_OFST (0)
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#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
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#define AD9257_NONE_VAL (0x0)
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#define AD9257_MIXED_BIT_FREQ_VAL (0xC)
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#define AD9257_TEST_RESET_SHORT_GEN (4)
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#define AD9257_TEST_RESET_LONG_GEN (5)
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#define AD9257_USER_IN_MODE_OFST (6)
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#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
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void setAdc(int addr, int val) {
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u_int32_t codata;
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codata = val + (addr << 8);
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printf(" Setting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr);
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serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS,
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ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST);
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}
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void prepareADC(){
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printf("\n\nPreparing ADC ... \n");
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//power mode reset
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printf("power mode reset:\n");
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setAdc(AD9257_POWER_MODE_REG,
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(AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
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//power mode chip run
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printf("power mode chip run:\n");
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setAdc(AD9257_POWER_MODE_REG,
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(AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
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//output clock phase
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printf("output clock phase:\n");
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setAdc(AD9257_OUT_PHASE_REG,
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(AD9257_OUT_CLK_60_VAL << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK);
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// lvds-iee reduced , binary offset
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printf("lvds-iee reduced, binary offset:\n");
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setAdc(AD9257_OUT_MODE_REG,
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(AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK);
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// all devices on chip to receive next command
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printf("all devices on chip to receive next command:\n");
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setAdc(AD9257_DEV_IND_2_REG,
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AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
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setAdc(AD9257_DEV_IND_1_REG,
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AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
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AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK);
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// vref 1.33
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printf("vref 1.33:\n");
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setAdc(AD9257_VREF_REG,
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(AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK);
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// no test mode
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printf("no test mode:\n");
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setAdc(AD9257_TEST_MODE_REG,
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(AD9257_NONE_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
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#ifdef TESTADC
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printf("***************************************** *******\n");
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printf("******* PUTTING ADC IN TEST MODE!!!!!!!!! *******\n");
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printf("***************************************** *******\n");
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// mixed bit frequency test mode
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printf("mixed bit frequency test mode:\n");
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setAdc(AD9257_TEST_MODE_REG,
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(AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
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#endif
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}
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#endif //AD9257_H
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