mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-27 00:30:03 +02:00
320 lines
14 KiB
C
320 lines
14 KiB
C
#include "AD9257.h"
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#include "blackfin.h"
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#include "clogger.h"
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#include "commonServerFunctions.h" // blackfin.h, ansi.h
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#include "sls_detector_defs.h"
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/* AD9257 ADC DEFINES */
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#define AD9257_ADC_NUMBITS (24)
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// default value is 0xF
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#define AD9257_DEV_IND_2_REG (0x04)
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#define AD9257_CHAN_H_OFST (0)
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#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
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#define AD9257_CHAN_G_OFST (1)
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#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST)
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#define AD9257_CHAN_F_OFST (2)
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#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST)
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#define AD9257_CHAN_E_OFST (3)
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#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
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// default value is 0x3F
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#define AD9257_DEV_IND_1_REG (0x05)
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#define AD9257_CHAN_D_OFST (0)
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#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
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#define AD9257_CHAN_C_OFST (1)
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#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST)
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#define AD9257_CHAN_B_OFST (2)
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#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST)
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#define AD9257_CHAN_A_OFST (3)
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#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST)
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#define AD9257_CLK_CH_DCO_OFST (4)
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#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST)
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#define AD9257_CLK_CH_IFCO_OFST (5)
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#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
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// default value is 0x00
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#define AD9257_POWER_MODE_REG (0x08)
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#define AD9257_POWER_INTERNAL_OFST (0)
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#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
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#define AD9257_INT_CHIP_RUN_VAL \
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((0x0 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
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#define AD9257_INT_FULL_PWR_DWN_VAL \
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((0x1 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
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#define AD9257_INT_STANDBY_VAL \
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((0x2 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
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#define AD9257_INT_RESET_VAL \
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((0x3 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
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#define AD9257_POWER_EXTERNAL_OFST (5)
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#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
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#define AD9257_EXT_FULL_POWER_VAL \
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((0x0 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
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#define AD9257_EXT_STANDBY_VAL \
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((0x1 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
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// default value is 0x0
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#define AD9257_TEST_MODE_REG (0x0D)
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#define AD9257_OUT_TEST_OFST (0)
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#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
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#define AD9257_TST_OFF_VAL ((0x0 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_MDSCL_SHRT_VAL \
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((0x1 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_PSTV_FS_VAL \
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((0x2 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_NGTV_FS_VAL \
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((0x3 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_ALTRNTNG_CHKRBRD_VAL \
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((0x4 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_PN_23_SQNC_VAL \
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((0x5 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_PN_9_SQNC__VAL \
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((0x6 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_1_0_WRD_TGGL_VAL \
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((0x7 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_USR_INPT_VAL \
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((0x8 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_1_0_BT_TGGL_VAL \
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((0x9 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_1_x_SYNC_VAL \
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((0xa << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_1_BIT_HGH_VAL \
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((0xb << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_MXD_BT_FRQ_VAL \
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((0xc << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_RST_SHRT_GN_OFST (4)
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#define AD9257_TST_RST_SHRT_GN_MSK (0x00000001 << AD9257_TST_RST_SHRT_GN_OFST)
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#define AD9257_TST_RST_LNG_GN_OFST (5)
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#define AD9257_TST_RST_LNG_GN_MSK (0x00000001 << AD9257_TST_RST_LNG_GN_OFST)
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#define AD9257_USER_IN_MODE_OFST (6)
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#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
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#define AD9257_USR_IN_SNGL_VAL \
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((0x0 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
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#define AD9257_USR_IN_ALTRNT_VAL \
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((0x1 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
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#define AD9257_USR_IN_SNGL_ONC_VAL \
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((0x2 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
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#define AD9257_USR_IN_ALTRNT_ONC_VAL \
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((0x3 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
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// default value is 0x01
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#define AD9257_OUT_MODE_REG (0x14)
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#define AD9257_OUT_FORMAT_OFST (0)
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#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
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#define AD9257_OUT_BINARY_OFST_VAL \
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((0x0 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
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#define AD9257_OUT_TWOS_COMPL_VAL \
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((0x1 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
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#define AD9257_OUT_OTPT_INVRT_OFST (2)
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#define AD9257_OUT_OTPT_INVRT_MSK (0x00000001 << AD9257_OUT_OTPT_INVRT_OFST)
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#define AD9257_OUT_LVDS_OPT_OFST (6)
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#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
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#define AD9257_OUT_LVDS_ANSI_VAL \
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((0x0 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
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#define AD9257_OUT_LVDS_IEEE_VAL \
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((0x1 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
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// default value is 0x3
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#define AD9257_OUT_PHASE_REG (0x16)
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#define AD9257_OUT_CLK_OFST (0)
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#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
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#define AD9257_OUT_CLK_0_VAL ((0x0 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_60_VAL \
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((0x1 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_120_VAL \
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((0x2 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_180_VAL \
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((0x3 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_240_VAL \
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((0x4 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_300_VAL \
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((0x5 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_360_VAL \
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((0x6 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_420_VAL \
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((0x7 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_480_VAL \
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((0x8 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_540_VAL \
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((0x9 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_600_VAL \
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((0xa << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_OUT_CLK_660_VAL \
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((0xb << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
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#define AD9257_IN_CLK_OFST (4)
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#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
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#define AD9257_IN_CLK_0_VAL ((0x0 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
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#define AD9257_IN_CLK_1_VAL ((0x1 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
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#define AD9257_IN_CLK_2_VAL ((0x2 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
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#define AD9257_IN_CLK_3_VAL ((0x3 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
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#define AD9257_IN_CLK_4_VAL ((0x4 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
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#define AD9257_IN_CLK_5_VAL ((0x5 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
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#define AD9257_IN_CLK_6_VAL ((0x6 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
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#define AD9257_IN_CLK_7_VAL ((0x7 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
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// default value is 0x4
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#define AD9257_VREF_REG (0x18)
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#define AD9257_VREF_OFST (0)
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#define AD9257_VREF_MSK (0x00000007 << AD9257_VREF_OFST)
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#define AD9257_VREF_DEFAULT_VAL (AD9257_VREF_2_0_VAL)
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#define AD9257_VREF_1_0_VAL ((0x0 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
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#define AD9257_VREF_1_14_VAL ((0x1 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
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#define AD9257_VREF_1_33_VAL ((0x2 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
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#define AD9257_VREF_1_6_VAL ((0x3 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
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#define AD9257_VREF_2_0_VAL ((0x4 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
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// defines from the fpga
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uint32_t AD9257_Reg = 0x0;
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uint32_t AD9257_CsMask = 0x0;
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uint32_t AD9257_ClkMask = 0x0;
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uint32_t AD9257_DigMask = 0x0;
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int AD9257_DigOffset = 0x0;
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int AD9257_VrefVoltage = 0;
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void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk,
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uint32_t dmsk, int dofst) {
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AD9257_Reg = reg;
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AD9257_CsMask = cmsk;
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AD9257_ClkMask = clkmsk;
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AD9257_DigMask = dmsk;
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AD9257_DigOffset = dofst;
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}
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void AD9257_Disable() {
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bus_w(AD9257_Reg, (bus_r(AD9257_Reg) | AD9257_CsMask | AD9257_ClkMask) &
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~(AD9257_DigMask));
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}
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int AD9257_GetVrefVoltage(int mV) {
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if (mV == 0)
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return AD9257_VrefVoltage;
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switch (AD9257_VrefVoltage) {
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case 0:
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return 1000;
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case 1:
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return 1140;
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case 2:
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return 1330;
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case 3:
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return 1600;
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case 4:
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return 2000;
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default:
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LOG(logERROR, ("Could not convert Adc Vpp from mode to mV\n"));
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return -1;
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}
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}
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int AD9257_SetVrefVoltage(int val, int mV) {
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int mode = val;
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// convert to mode
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if (mV) {
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switch (val) {
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case 1000:
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mode = 0;
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break;
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case 1140:
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mode = 1;
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break;
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case 1330:
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mode = 2;
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break;
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case 1600:
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mode = 3;
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break;
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case 2000:
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mode = 4;
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break;
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// validation for mV
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default:
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LOG(logERROR, ("mv:%d doesnt exist\n", val));
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return FAIL;
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}
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}
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// validation for mode
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switch (mode) {
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case 0:
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LOG(logINFO, ("Setting ADC Vref to 1.0 V (Mode:%d)\n", mode));
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break;
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case 1:
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LOG(logINFO, ("Setting ADC Vref to 1.14 V (Mode:%d)\n", mode));
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break;
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case 2:
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LOG(logINFO, ("Setting ADC Vref to 1.33 V (Mode:%d)\n", mode));
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break;
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case 3:
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LOG(logINFO, ("Setting ADC Vref to 1.6 V (Mode:%d)\n", mode));
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break;
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case 4:
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LOG(logINFO, ("Setting ADC Vref to 2.0 V (Mode:%d)\n", mode));
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break;
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default:
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return FAIL;
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}
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// set vref voltage
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AD9257_Set(AD9257_VREF_REG, mode);
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AD9257_VrefVoltage = mode;
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return OK;
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}
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void AD9257_Set(int addr, int val) {
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u_int32_t codata;
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codata = val + (addr << 8);
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LOG(logINFO,
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("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
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serializeToSPI(AD9257_Reg, codata, AD9257_CsMask, AD9257_ADC_NUMBITS,
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AD9257_ClkMask, AD9257_DigMask, AD9257_DigOffset, 0);
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}
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void AD9257_Configure() {
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LOG(logINFOBLUE, ("Configuring ADC9257:\n"));
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// power mode reset
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LOG(logINFO, ("\tPower mode reset\n"));
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AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_RESET_VAL);
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// power mode chip run
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LOG(logINFO, ("\tPower mode chip run\n"));
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AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_CHIP_RUN_VAL);
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// binary offset, lvds-iee reduced
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LOG(logINFO, ("\tBinary offset, Lvds-ieee reduced\n"));
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AD9257_Set(AD9257_OUT_MODE_REG,
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AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL);
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// output clock phase
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LOG(logINFO, ("\tOutput clock phase: 180\n"));
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AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL);
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// all devices on chip to receive next command
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LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
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AD9257_Set(AD9257_DEV_IND_2_REG, AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK |
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AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
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AD9257_Set(AD9257_DEV_IND_1_REG, AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK |
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AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
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AD9257_CLK_CH_DCO_MSK |
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AD9257_CLK_CH_IFCO_MSK);
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// vref
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#ifdef GOTTHARDD
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LOG(logINFO, ("\tVref default at 2.0\n"));
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AD9257_SetVrefVoltage(AD9257_VREF_DEFAULT_VAL, 0);
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#else
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LOG(logINFO, ("\tVref 1.33\n"));
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AD9257_SetVrefVoltage(AD9257_VREF_1_33_VAL, 0);
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#endif
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// no test mode
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LOG(logINFO, ("\tNo test mode\n"));
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AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_OFF_VAL);
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#ifdef TESTADC
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LOG(logINFOBLUE, ("Putting ADC in Test Mode!\n");
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// mixed bit frequency test mode
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LOG(logINFO, ("\tMixed bit frequency test mode\n"));
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AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_MXD_BT_FRQ_VAL);
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#endif
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}
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