Dhanya Thattil d72b6c3659 eiger server: quad, interrupt subframe, reg left and right (#45) ...

* eiger server: quad, interrupt subframe, reg left and right

*  eiger server: beb can fail in setting up quad, quad and gap pixels

2019-08-06 10:12:34 +02:00

..

BinaryFile.h

New filename structure (#38)

2019-07-22 15:52:21 +02:00

BinaryFileStatic.h

New filename structure (#38)

2019-07-22 15:52:21 +02:00

circularFifo.h

merging refactor (replacing)

2019-04-12 10:53:09 +02:00

DataProcessor.h

eiger server: quad, interrupt subframe, reg left and right (#45)

2019-08-06 10:12:34 +02:00

DataStreamer.h

Quad (#39)

2019-07-22 16:41:03 +02:00

Fifo.h

merging refactor (replacing)

2019-04-12 10:53:09 +02:00

File.h

New filename structure (#38)

2019-07-22 15:52:21 +02:00

GeneralData.h

eiger server: quad, interrupt subframe, reg left and right (#45)

2019-08-06 10:12:34 +02:00

HDF5File.h

New filename structure (#38)

2019-07-22 15:52:21 +02:00

HDF5FileStatic.h

New filename structure (#38)

2019-07-22 15:52:21 +02:00

Listener.h

merging refactor (replacing)

2019-04-12 10:53:09 +02:00

receiver_defs.h

receiver memory alignment: all data and header is a multiple of 64 bit, just the fifo header size needed to be 8

2019-04-18 11:35:08 +02:00

slsReceiver.h

slsReceiver: removed special receiver config, added rx_dbitlist, rx_dbitoffset to put bits together in file, connected adcinvert, extsamplingsrc and extsampling properly to the detector, added tests

2019-05-03 20:37:40 +02:00

slsReceiverImplementation.h

eiger server: quad, interrupt subframe, reg left and right (#45)

2019-08-06 10:12:34 +02:00

slsReceiverTCPIPInterface.h

Quad (#39)

2019-07-22 16:41:03 +02:00

slsReceiverUsers.h

slsReceiver: removed special receiver config, added rx_dbitlist, rx_dbitoffset to put bits together in file, connected adcinvert, extsamplingsrc and extsampling properly to the detector, added tests

2019-05-03 20:37:40 +02:00

ThreadObject.h

merging refactor (replacing)

2019-04-12 10:53:09 +02:00