Dhanya Thattil 65b8c9c5c1

Moench rw3 (#745) ...

* moench, removed chip version, filter resistor, filter cells, currentsoures, gain mode, setttings(modes), dbitphase, maxdbitphase, autocompdisable, comparatordisabletime, made acq start and stop a pulse, removed unused registers

* added parallel command

* remove gain plot for moench

* moench: updated adc invert val

* moench: update adcoffset to 0xf and adcphase to 140 degrees

* removed sync clock in moench

* updated min fw version

* removing config file in moench server

2023-05-25 11:00:23 +02:00

..

bin

Moench rw3 (#745)

2023-05-25 11:00:23 +02:00

CMakeLists.txt

server side fixed

2021-11-08 17:24:51 +01:00

DefaultPattern_mythen3.txt

Pattern 6 levels (#493)

2022-07-14 12:00:07 +02:00

detid_mythen3.txt

moduleid made into dec not hex

2021-10-05 13:23:09 +02:00

Makefile

Versioning (#568)

2022-11-09 11:13:09 +01:00

mythen3.c

M3 deserialize (#618)

2023-01-17 09:39:58 +01:00

mythen3.h

M3badchannels (#526)

2022-09-01 15:30:04 +02:00

RegisterDefs.h

g2 and m3 round robin (#559)

2022-10-18 15:51:23 +02:00

slsDetectorFunctionList.c

Fix tests (#698)

2023-03-28 15:22:36 +02:00

slsDetectorServer_defs.h

m3:changed str_clk (clkdiv 3) default to 166MHz (6) (#643)

2023-01-30 17:05:42 +01:00