mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-22 22:40:02 +02:00
aeade907d0
git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@11 951219d9-93cf-4727-9268-0efd64621fa3
957 lines
19 KiB
C
Executable File
957 lines
19 KiB
C
Executable File
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#include "server_defs.h"
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#include "firmware_funcs.h"
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#include "mcb_funcs.h"
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#include "registers.h"
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#ifdef SHAREDMEMORY
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#include "sharedmemory.h"
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#endif
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#include <sys/ipc.h>
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#include <sys/shm.h>
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#include <sys/stat.h>
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//for memory mapping
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u_int32_t CSP0BASE;
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FILE *debugfp, *datafp;
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int fr;
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int wait_time;
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int *fifocntrl;
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int *values;
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int *statusreg;
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const int nModY=1;
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int nModBoard;
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int nModX=NMAXMOD;
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int dynamicRange=32;
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int dataBytes=NMAXMOD*NCHIP*NCHAN*4;
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int storeInRAM=0;
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int *ram_values=NULL;
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char *now_ptr=NULL;
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int ram_size=0;
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int ififostart, ififostop, ififostep, ififo;
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#ifdef MCB_FUNCS
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extern const int nChans;
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extern const int nChips;
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extern const int nDacs;
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extern const int nAdcs;
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#endif
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#ifndef MCB_FUNCS
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const int nChans=NCHAN;
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const int nChips=NCHIP;
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const int nDacs=NDAC;
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const int nAdcs=NADC;
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#endif
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//int mybyte;
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//int mysize=dataBytes/8;
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int mapCSP0(void) {
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printf("Mapping memory\n");
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#ifndef VIRTUAL
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int fd;
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fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
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if (fd == -1) {
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printf("\nCan't find /dev/mem!\n");
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return FAIL;
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}
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printf("/dev/mem opened\n");
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CSP0BASE = (u_int32_t)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0);
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if (CSP0BASE == (u_int32_t)MAP_FAILED) {
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printf("\nCan't map memmory area!!\n");
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return FAIL;
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}
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printf("CSP0 mapped\n");
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#endif
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#ifdef VIRTUAL
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CSP0BASE = (u_int32_t)malloc(MEM_SIZE);
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printf("memory allocated\n");
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#endif
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#ifdef SHAREDMEMORY
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if ( (res=inism(SMSV))<0) {
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printf("error attaching shared memory! %i",res);
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return FAIL;
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}
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#endif
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printf("CSPOBASE=from %08x to %x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
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values=(u_int32_t*)(CSP0BASE+FIFO_DATA_REG_OFF);
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printf("values=%08x\n",values);
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fifocntrl=(u_int32_t*)(CSP0BASE+FIFO_CNTRL_REG_OFF);
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printf("fifcntrl=%08x\n",fifocntrl);
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statusreg=(u_int32_t*)(CSP0BASE+STATUS_REG);
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printf("statusreg=%08x\n",statusreg);
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return OK;
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}
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u_int32_t bus_w(u_int32_t offset, u_int32_t data) {
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u_int32_t *ptr1;
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ptr1=(u_int32_t*)(CSP0BASE+offset);
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*ptr1=data;
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return OK;
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}
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u_int32_t bus_r(u_int32_t offset) {
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u_int32_t *ptr1;
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ptr1=(u_int32_t*)(CSP0BASE+offset);
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return *ptr1;
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}
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// direct pattern output
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u_int32_t putout(char *s, int modnum) {
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int i;
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u_int32_t pat;
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int addr;
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if (strlen(s)<16) {
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fprintf(stdout," *** putout error: incorrect pattern length ***\n");
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fprintf(stdout," %s \n",s);
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return FAIL;
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}
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pat=0;
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for (i=0;i<16;i++) {
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if (s[i]=='1') pat=pat+(1<<i);
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}
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//addr=MCB_CNTRL_REG_OFF+(modnum<<4);
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addr=MCB_CNTRL_REG_OFF+(modnum<<SHIFTMOD);
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bus_w(addr, pat);
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return OK;
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}
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// read direct input
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u_int32_t readin(int modnum) {
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int addr;
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u_int32_t val;
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//addr=MCB_DOUT_REG_OFF+(modnum<<4);
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addr=MCB_DOUT_REG_OFF+(modnum<<SHIFTMOD);
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val=bus_r(addr) & 0x3ff;
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// printf("reading 0x%08x, value 0x%08x\n",addr,val);
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return val;
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}
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u_int32_t setClockDivider(int d) {
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u_int32_t c;
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c=bus_r(SPEED_REG);
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bus_w(SPEED_REG,(d<<CLK_DIVIDER_OFFSET)|(c&~(CLK_DIVIDER_MASK)));
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return ((bus_r(SPEED_REG)& CLK_DIVIDER_MASK)>>CLK_DIVIDER_OFFSET);
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}
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u_int32_t getClockDivider() {
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u_int32_t clk_div;
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clk_div=((bus_r(SPEED_REG)&CLK_DIVIDER_MASK)>>CLK_DIVIDER_OFFSET);
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return clk_div;
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}
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u_int32_t setSetLength(int d) {
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u_int32_t c;
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c=bus_r(SPEED_REG);
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bus_w(SPEED_REG,(d<<SET_LENGTH_OFFSET)|(c&~(SET_LENGTH_MASK)));
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return ((bus_r(SPEED_REG)& SET_LENGTH_MASK)>>SET_LENGTH_OFFSET);
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}
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u_int32_t getSetLength() {
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u_int32_t clk_div;
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clk_div=((bus_r(SPEED_REG)& SET_LENGTH_MASK)>>SET_LENGTH_OFFSET);
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return clk_div;
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}
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u_int32_t setWaitStates(int d1) {
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u_int32_t c;
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int d=d1-2;
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char cmd[100];
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sprintf(cmd,"bus -a 0xb0000000 -w 0x%x0008",d1);
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c=bus_r(SPEED_REG);
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bus_w(SPEED_REG,(d<<WAIT_STATES_OFFSET)|(c&~(WAIT_STATES_MASK)));
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system(cmd);
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return ((bus_r(SPEED_REG)& WAIT_STATES_MASK)>>WAIT_STATES_OFFSET);
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}
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u_int32_t getWaitStates() {
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u_int32_t clk_div;
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clk_div=((bus_r(SPEED_REG)& WAIT_STATES_MASK)>>WAIT_STATES_OFFSET);
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return clk_div;
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}
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u_int32_t setTotClockDivider(int d) {
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u_int32_t c;
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c=bus_r(SPEED_REG);
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bus_w(SPEED_REG,(d<<TOTCLK_DIVIDER_OFFSET)|(c&~(TOTCLK_DIVIDER_MASK)));
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return ((bus_r(SPEED_REG)& TOTCLK_DIVIDER_MASK)>>TOTCLK_DIVIDER_OFFSET);
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}
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u_int32_t getTotClockDivider() {
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u_int32_t clk_div;
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clk_div=((bus_r(SPEED_REG)&TOTCLK_DIVIDER_MASK)>>TOTCLK_DIVIDER_OFFSET);
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return clk_div;
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}
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u_int32_t setExtSignal(int d, enum externalSignalFlag mode) {
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int modes[]={-1,EXT_SIG_OFF, EXT_GATE_IN_ACTIVEHIGH, EXT_GATE_IN_ACTIVELOW,EXT_TRIG_IN_RISING,EXT_TRIG_IN_FALLING,EXT_RO_TRIG_IN_RISING, EXT_RO_TRIG_IN_FALLING,EXT_GATE_OUT_ACTIVEHIGH, EXT_GATE_OUT_ACTIVELOW, EXT_TRIG_OUT_RISING, EXT_TRIG_OUT_FALLING, EXT_RO_TRIG_OUT_RISING, EXT_RO_TRIG_OUT_FALLING};
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u_int32_t c;
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int off=d*SIGNAL_OFFSET;
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c=bus_r(EXT_SIGNAL_REG);
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if (mode<=RO_TRIGGER_OUT_FALLING_EDGE)
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bus_w(EXT_SIGNAL_REG,((modes[mode])<<off)|(c&~(SIGNAL_MASK<<off)));
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return getExtSignal(d);
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}
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int getExtSignal(int d) {
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int modes[]={SIGNAL_OFF, GATE_IN_ACTIVE_HIGH, GATE_IN_ACTIVE_LOW,TRIGGER_IN_RISING_EDGE, TRIGGER_IN_FALLING_EDGE,RO_TRIGGER_IN_RISING_EDGE, RO_TRIGGER_IN_FALLING_EDGE, GATE_OUT_ACTIVE_HIGH, GATE_OUT_ACTIVE_LOW, TRIGGER_OUT_RISING_EDGE, TRIGGER_OUT_FALLING_EDGE, RO_TRIGGER_OUT_RISING_EDGE,RO_TRIGGER_OUT_FALLING_EDGE};
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int off=d*SIGNAL_OFFSET;
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int mode=((bus_r(EXT_SIGNAL_REG)&(SIGNAL_MASK<<off))>>off);
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if (mode<RO_TRIGGER_OUT_FALLING_EDGE)
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return modes[mode];
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else
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return -1;
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}
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u_int64_t getMcsNumber() {
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FILE *fp=NULL;
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u_int64_t res;
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char line[150];
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int a[6];
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int n=0, i;
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//u_int64_t a0,a1,a2,a3,a4,a5,n=0;
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fp=fopen("/etc/conf.d/mac","r");
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if (fp==NULL) {
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printf("could not ope MAC file\n");;
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return -1;
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}
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while (fgets(line,150,fp)) {
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//MAC="00:40:8C:CD:00:00"
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printf(line);
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if (strstr(line,"MAC="))
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n=sscanf(line,"MAC=\"%x:%x:%x:%x:%x:%x\"",a+5,a+4,a+3,a+2,a+1,a);
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}
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fclose(fp);
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if (n!=6){
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printf("could not scan MAC address\n");;
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return -1;
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}
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res=0;
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for (i=0; i<n; i++) {
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res=(res<<8)+a[n-1-i];
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}
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return res;
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}
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u_int32_t getMcsVersion() {
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return bus_r(FPGA_VERSION_REG);
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//return MCSVERSION;
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}
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// for fpga test
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u_int32_t testFpga(void) {
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u_int32_t val;
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int result=OK;
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//while (1) {
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//fixed pattern
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val=bus_r(FIX_PATT_REG);
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if (val==FIXED_PATT_VAL) {
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printf("fixed pattern ok!! %x\n",val);
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} else {
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printf("fixed pattern wrong!! %x\n",val);
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result=FAIL;
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// return FAIL;
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}
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//FPGA code version
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val=bus_r(FPGA_VERSION_REG)&0x00ffffff;
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if (val>=(FPGA_VERSION_VAL&0x00ffffff)) {
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printf("FPGA version ok!! %x\n",val);
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} else {
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printf("FPGA version too old! %x\n",val);
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return FAIL;
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}
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//dummy register
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val=0xF0F0F0F0;
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bus_w(DUMMY_REG, val);
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val=bus_r(DUMMY_REG);
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if (val==0xF0F0F0F0) {
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printf("FPGA dummy register ok!! %x\n",val);
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} else {
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printf("FPGA dummy register wrong!! %x\n",val);
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result=FAIL;
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// return FAIL;
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}
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//dummy register
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val=0x0F0F0F0F;
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bus_w(DUMMY_REG, val);
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val=bus_r(DUMMY_REG);
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if (val==0x0F0F0F0F) {
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printf("FPGA dummy register ok!! %x\n",val);
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} else {
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printf("FPGA dummy register wrong!! %x\n",val);
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result=FAIL;
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// return FAIL;
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}
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// }
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return result;
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}
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// for fpga test
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u_int32_t testRAM(void) {
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int result=OK;
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int i=0;
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allocateRAM();
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// while(i<100000) {
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memcpy(ram_values, values, dataBytes);
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printf ("%d: copied fifo %x to memory %x size %d\n",i++, values, ram_values, dataBytes);
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// }
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return result;
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}
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int getNModBoard() {
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int nmodboard;
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u_int32_t val;
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val=bus_r(FPGA_VERSION_REG)&0xff000000;
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nmodboard=val >> 24;
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#ifdef VERY_VERBOSE
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printf("The board hosts %d modules\n",nmodboard);
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#endif
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nModBoard=nmodboard;
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//getNModBoard()=nmodboard;
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return nmodboard;
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}
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int setNMod(int n) {
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int fifo;
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int ifsta, ifsto, ifste;
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if (n>0 && n<=getNModBoard()) {
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nModX=n;
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dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
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allocateRAM();
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}
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/* should enable all fifos*/
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bus_w(FIFO_CNTRL_REG_OFF+(ALLFIFO<<SHIFTMOD), FIFO_RESET_BIT | FIFO_DISABLE_TOGGLE_BIT);
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/*d isable the fifos relative to the unused modules */
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ifste=NCHAN*dynamicRange/32;
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ifsta=nModX*NCHIP*ifste;
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ifsto=nModBoard*NCHIP*ifste;
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for (ififo=ifsta; ififo<ifsto; ififo+=ifste) {
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//fifocntrl[ififo]=FIFO_DISABLE_TOGGLE_BIT;
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bus_w(FIFO_CNTRL_REG_OFF+(ififo<<SHIFTMOD), FIFO_DISABLE_TOGGLE_BIT);
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printf("Disabling fifo %d\n",ififo);
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}
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return nModX;
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}
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// fifo test
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u_int32_t testFifos(void) {
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printf("Fifo test not implemented!\n");
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bus_w(CONTROL_REG, START_FIFOTEST_BIT);
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return OK;
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}
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// program dacq settings
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int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
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int64_t v64;
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u_int32_t vLSB,vMSB;
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if (value!=-1) {
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vLSB=value&(0xffffffff);
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bus_w(aLSB,vLSB);
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v64=value>> 32;
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vMSB=v64&(0xffffffff);
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bus_w(aMSB,vMSB);
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}
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return get64BitReg(aLSB, aMSB);
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}
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int64_t get64BitReg(int aLSB, int aMSB){
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int64_t v64;
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u_int32_t vLSB,vMSB;
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vLSB=bus_r(aLSB);
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vMSB=bus_r(aMSB);
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v64=vMSB;
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v64=(v64<<32) | vLSB;
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return v64;
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}
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int64_t setFrames(int64_t value){
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return set64BitReg(value, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
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}
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int64_t getFrames(){
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return get64BitReg(GET_FRAMES_LSB_REG, GET_FRAMES_MSB_REG);
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}
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int64_t setExposureTime(int64_t value){
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/* time is in ns */
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if (value!=-1) {
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value*=(1E-9*CLK_FREQ);
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}
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return set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-9*CLK_FREQ);
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}
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int64_t getExposureTime(){
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return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG)/(1E-9*CLK_FREQ);
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}
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int64_t setGates(int64_t value){
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return set64BitReg(value, SET_GATES_LSB_REG, SET_GATES_MSB_REG);
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}
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int64_t getGates(){
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return get64BitReg(GET_GATES_LSB_REG, GET_GATES_MSB_REG);
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}
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int64_t setPeriod(int64_t value){
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/* time is in ns */
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if (value!=-1) {
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value*=(1E-9*CLK_FREQ);
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}
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return set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-9*CLK_FREQ);
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}
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int64_t getPeriod(){
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return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG)/(1E-9*CLK_FREQ);
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}
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int64_t setDelay(int64_t value){
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/* time is in ns */
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if (value!=-1) {
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value*=(1E-9*CLK_FREQ);
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}
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return set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-9*CLK_FREQ);
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}
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int64_t getDelay(){
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return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-9*CLK_FREQ);
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}
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int64_t setTrains(int64_t value){
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return set64BitReg(value, SET_TRAINS_LSB_REG, SET_TRAINS_MSB_REG);
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}
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int64_t getTrains(){
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return get64BitReg(GET_TRAINS_LSB_REG, GET_TRAINS_MSB_REG);
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}
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int64_t setProbes(int64_t value){
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int ow;
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switch (getDynamicRange()) {
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case 32:
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ow=1;
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break;
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case 16:
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ow=2;
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break;
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case 8:
|
|
ow=4;
|
|
break;
|
|
case 4:
|
|
ow=8;
|
|
break;
|
|
case 1:
|
|
ow=5;
|
|
default:
|
|
ow=1;
|
|
}
|
|
|
|
if (value>=0) {
|
|
setCSregister(ALLMOD);
|
|
initChipWithProbes(0, ow,value, ALLMOD);
|
|
putout("0000000000000000",ALLMOD);
|
|
}
|
|
return getProbes();
|
|
}
|
|
|
|
int64_t getProbes(){
|
|
u_int32_t shiftin=bus_r(GET_SHIFT_IN_REG);
|
|
u_int32_t np=(shiftin >>PROBES_OFF) & PROBES_MASK;
|
|
#ifdef VERYVERBOSE
|
|
printf("%08x ",shiftin);
|
|
printf("probes==%01x\n",np);
|
|
#endif
|
|
|
|
return np;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
u_int32_t runBusy(void) {
|
|
return bus_r(STATUS_REG)&RUN_BUSY_BIT;
|
|
}
|
|
|
|
u_int32_t dataPresent(void) {
|
|
return bus_r(LOOK_AT_ME_REG);
|
|
}
|
|
|
|
u_int32_t runState(void) {
|
|
int s=bus_r(STATUS_REG);
|
|
#ifdef SHAREDMEMORY
|
|
if (s&RUN_BUSY_BIT)
|
|
write_status_sm("Running");
|
|
else
|
|
write_status_sm("Stopped");
|
|
#endif
|
|
return s;
|
|
}
|
|
|
|
|
|
// State Machine
|
|
|
|
u_int32_t startStateMachine(){
|
|
#ifdef VERBOSE
|
|
printf("Starting State Machine\n");
|
|
#endif
|
|
fifoReset();
|
|
now_ptr=(char*)ram_values;
|
|
#ifdef SHAREDMEMORY
|
|
write_stop_sm(0);
|
|
write_status_sm("Started");
|
|
#endif
|
|
#ifdef MCB_FUNCS
|
|
setCSregister(ALLMOD);
|
|
clearSSregister(ALLMOD);
|
|
#endif
|
|
putout("0000000000000000",ALLMOD);
|
|
bus_w(CONTROL_REG, START_ACQ_BIT | START_EXPOSURE_BIT);
|
|
return OK;
|
|
}
|
|
|
|
|
|
|
|
|
|
u_int32_t stopStateMachine(){
|
|
|
|
#ifdef VERBOSE
|
|
printf("Stopping State Machine\n");
|
|
#endif
|
|
#ifdef SHAREDMEMORY
|
|
write_stop_sm(1);
|
|
write_status_sm("Stopped");
|
|
#endif
|
|
bus_w(CONTROL_REG, STOP_ACQ_BIT);
|
|
usleep(500);
|
|
if (!runBusy())
|
|
return OK;
|
|
else
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
u_int32_t startReadOut(){
|
|
u_int32_t status;
|
|
#ifdef VERBOSE
|
|
printf("Starting State Machine Readout\n");
|
|
#endif
|
|
status=bus_r(STATUS_REG)&RUN_BUSY_BIT;
|
|
#ifdef DEBUG
|
|
printf("State machine status is %08x\n",bus_r(STATUS_REG));
|
|
#endif
|
|
bus_w(CONTROL_REG, START_ACQ_BIT |START_READOUT_BIT); // start readout
|
|
return OK;
|
|
}
|
|
|
|
|
|
// fifo routines
|
|
|
|
u_int32_t fifoReset(void) {
|
|
#ifdef DEBUG
|
|
printf("resetting fifo\n");
|
|
#endif
|
|
bus_w(FIFO_CNTRL_REG_OFF+(ALLFIFO<<SHIFTMOD), FIFO_RESET_BIT);
|
|
return OK;
|
|
}
|
|
|
|
|
|
u_int32_t setNBits(u_int32_t n) {
|
|
u_int32_t rval=0;
|
|
rval=bus_w(SET_NBITS_REG, n);
|
|
return bus_r(SET_NBITS_REG);
|
|
}
|
|
|
|
u_int32_t getNBits()
|
|
{
|
|
return bus_r(SET_NBITS_REG);
|
|
}
|
|
|
|
|
|
u_int32_t fifoReadCounter(int fifonum)
|
|
{
|
|
int rval=0;
|
|
rval=bus_r(FIFO_COUNTR_REG_OFF+(fifonum<<SHIFTFIFO));
|
|
#ifdef VERBOSE
|
|
printf("FIFO %d countains %x words\n",fifonum, rval);
|
|
#endif
|
|
return rval;
|
|
}
|
|
|
|
u_int32_t fifoReadStatus()
|
|
{
|
|
// reads from the global status register
|
|
|
|
return bus_r(STATUS_REG)&(SOME_FIFO_FULL_BIT | ALL_FIFO_EMPTY_BIT);
|
|
}
|
|
|
|
u_int32_t fifo_full(void)
|
|
{
|
|
// checks fifo empty flag returns 1 if fifo is empty
|
|
// otherwise 0
|
|
return bus_r(STATUS_REG)&SOME_FIFO_FULL_BIT;
|
|
}
|
|
|
|
|
|
u_int32_t* fifo_read_event()
|
|
{
|
|
|
|
#ifdef VERBOSE
|
|
int ichip;
|
|
#endif
|
|
#ifdef VIRTUAL
|
|
return NULL;
|
|
#endif
|
|
while (bus_r(LOOK_AT_ME_REG)==0) {
|
|
#ifdef VERYVERBOSE
|
|
printf("Waiting for data\n");
|
|
#endif
|
|
if (runBusy()==0) {
|
|
if (bus_r(LOOK_AT_ME_REG)==0) {
|
|
#ifdef VERYVERBOSE
|
|
printf("no frame found\n");
|
|
for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
|
|
fifoReadCounter(ichip);
|
|
}
|
|
#endif
|
|
return NULL;
|
|
} else {
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
#ifdef VERYVERBOSE
|
|
printf("before readout\n");
|
|
for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
|
|
fifoReadCounter(ichip);
|
|
}
|
|
#endif
|
|
memcpy(now_ptr, values, dataBytes);
|
|
#ifdef VERBOSE
|
|
printf("Copying to ptr %x %d\n",now_ptr, dataBytes);
|
|
#endif
|
|
#ifdef VERYVERBOSE
|
|
printf("after readout\n");
|
|
for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
|
|
fifoReadCounter(ichip);
|
|
}
|
|
#endif
|
|
if (storeInRAM>0) {
|
|
now_ptr+=dataBytes;
|
|
}
|
|
return ram_values;
|
|
|
|
}
|
|
|
|
|
|
|
|
u_int32_t* decode_data(int *datain)
|
|
{
|
|
u_int32_t *dataout;
|
|
const char one=1;
|
|
const int bytesize=8;
|
|
char *ptr=(char*)datain;
|
|
//int nbits=dynamicRange;
|
|
int ipos=0, ichan=0;;
|
|
//int nch, boff=0;
|
|
int ibyte, ibit;
|
|
char iptr;
|
|
|
|
dataout=malloc(nChans*nChips*nModX*4);
|
|
ichan=0;
|
|
switch (dynamicRange) {
|
|
case 1:
|
|
for (ibyte=0; ibyte<dataBytes; ibyte++) {
|
|
iptr=ptr[ibyte];
|
|
for (ipos=0; ipos<bytesize; ipos++) {
|
|
dataout[ichan]=(iptr>>(ipos))&0x1;
|
|
ichan++;
|
|
}
|
|
}
|
|
break;
|
|
case 4:
|
|
for (ibyte=0; ibyte<dataBytes; ibyte++) {
|
|
iptr=ptr[ibyte]&0xff;
|
|
for (ipos=0; ipos<2; ipos++) {
|
|
dataout[ichan]=(iptr>>(ipos*4))&0xf;
|
|
ichan++;
|
|
}
|
|
}
|
|
break;
|
|
case 8:
|
|
for (ichan=0; ichan<dataBytes; ichan++) {
|
|
dataout[ichan]=ptr[ichan]&0xff;
|
|
}
|
|
break;
|
|
case 16:
|
|
for (ichan=0; ichan<nChans*nChips*nModX; ichan++) {
|
|
dataout[ichan]=0;
|
|
for (ibyte=0; ibyte<2; ibyte++) {
|
|
iptr=ptr[ichan*2+ibyte];
|
|
dataout[ichan]|=((iptr<<(ibyte*bytesize))&(0xff<<(ibyte*bytesize)));
|
|
}
|
|
}
|
|
break;
|
|
default:
|
|
for (ichan=0; ichan<nChans*nChips*nModX; ichan++)
|
|
dataout[ichan]=datain[ichan]&0xffffff;
|
|
}
|
|
|
|
#ifdef VERBOSE
|
|
printf("decoded %d channels\n",ichan);
|
|
#endif
|
|
return dataout;
|
|
}
|
|
|
|
|
|
|
|
int setDynamicRange(int dr) {
|
|
int ow;
|
|
u_int32_t np=getProbes();
|
|
#ifdef VERYVERBOSE
|
|
printf("probes==%02x\n",np);
|
|
#endif
|
|
if (dr>0) {
|
|
if (dr<=1) {
|
|
dynamicRange=1;
|
|
ow=5;
|
|
} else if (dr<=4) {
|
|
dynamicRange=4;
|
|
ow=4;
|
|
} else if (dr<=8) {
|
|
dynamicRange=8;
|
|
ow=3;
|
|
} else if (dr<=16) {
|
|
dynamicRange=16;
|
|
ow=2;
|
|
} else {
|
|
dynamicRange=32;
|
|
ow=0; //or 1?
|
|
}
|
|
setCSregister(ALLMOD);
|
|
initChipWithProbes(0, ow,np, ALLMOD);
|
|
putout("0000000000000000",ALLMOD);
|
|
|
|
}
|
|
|
|
|
|
return getDynamicRange();
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
int getDynamicRange() {
|
|
int dr;
|
|
u_int32_t shiftin=bus_r(GET_SHIFT_IN_REG);
|
|
u_int32_t outmux=(shiftin >> OUTMUX_OFF) & OUTMUX_MASK;
|
|
#ifdef VERYVERBOSE
|
|
printf("%08x ",shiftin);
|
|
printf("outmux==%02x\n",outmux);
|
|
#endif
|
|
|
|
switch (outmux) {
|
|
case 2:
|
|
dr=16;
|
|
break;
|
|
case 4:
|
|
dr=8;
|
|
break;
|
|
case 8:
|
|
dr=4;
|
|
break;
|
|
case 16:
|
|
dr=1;
|
|
break;
|
|
default:
|
|
dr=32;
|
|
}
|
|
dynamicRange=dr;
|
|
dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
|
|
if (allocateRAM()==OK) {
|
|
;
|
|
} else
|
|
printf("ram not allocated\n");
|
|
|
|
return dynamicRange;
|
|
|
|
}
|
|
|
|
int testBus() {
|
|
u_int32_t j, i;
|
|
char cmd[100];
|
|
u_int32_t val=0x0;
|
|
// printf("%s\n",cmd);
|
|
// system(cmd);
|
|
i=0;
|
|
printf("testing bus\n");
|
|
while (i<10000000) {
|
|
// val=bus_r(FIX_PATT_REG);
|
|
bus_w(DUMMY_REG,val);
|
|
bus_w(FIX_PATT_REG,0x0);
|
|
j=bus_r(DUMMY_REG);
|
|
if (i%10000==1)
|
|
printf("value 0x%x\n",j);
|
|
if (j!=val){
|
|
printf("read wrong value %x instead of %x\n",j, val);
|
|
return FAIL;
|
|
}
|
|
val+=0xbbbbb;
|
|
i++;
|
|
}
|
|
return OK;
|
|
}
|
|
|
|
|
|
int setStoreInRAM(int b) {
|
|
if (b>0)
|
|
storeInRAM=1;
|
|
else
|
|
storeInRAM=0;
|
|
return allocateRAM();
|
|
}
|
|
|
|
|
|
int allocateRAM() {
|
|
size_t size;
|
|
u_int32_t nt, nf;
|
|
nt=setTrains(-1);
|
|
nf=setFrames(-1);
|
|
if (nt==0) nt=1;
|
|
if (nf==0) nf=1;
|
|
// ret=clearRAM();
|
|
if (storeInRAM) {
|
|
size=dataBytes*nf*nt;
|
|
if (size<dataBytes)
|
|
size=dataBytes;
|
|
} else
|
|
size=dataBytes;
|
|
|
|
#ifdef VERBOSE
|
|
printf("nmodx=%d nmody=%d dynamicRange=%d dataBytes=%d nFrames=%d nTrains, size=%d\n",nModX,nModY,dynamicRange,dataBytes,nf,nt,size );
|
|
#endif
|
|
|
|
if (size==ram_size) {
|
|
|
|
#ifdef VERBOSE
|
|
printf("RAM of size %d already allocated: nothing to be done\n", size);
|
|
#endif
|
|
|
|
return OK;
|
|
}
|
|
|
|
|
|
|
|
#ifdef VERBOSE
|
|
printf("reallocating ram %x\n",ram_values);
|
|
#endif
|
|
// clearRAM();
|
|
// ram_values=malloc(size);
|
|
ram_values=realloc(ram_values,size);
|
|
|
|
if (ram_values) {
|
|
now_ptr=(char*)ram_values;
|
|
#ifdef VERBOSE
|
|
printf("ram allocated 0x%x of size %d to %x\n",now_ptr, size, now_ptr+size);
|
|
#endif
|
|
ram_size=size;
|
|
return OK;
|
|
} else {
|
|
printf("could not allocate %d bytes\n",size);
|
|
if (storeInRAM==1) {
|
|
printf("retrying\n");
|
|
storeInRAM=0;
|
|
size=dataBytes;
|
|
ram_values=realloc(ram_values,size);
|
|
if (ram_values==NULL)
|
|
printf("Fatal error: there must be a memory leak somewhere! You can't allocate even one frame!\n");
|
|
else {
|
|
now_ptr=(char*)ram_values;
|
|
ram_size=size;
|
|
#ifdef VERBOSE
|
|
printf("ram allocated 0x%x of size %d to %x\n",now_ptr, size, now_ptr+size);
|
|
#endif
|
|
}
|
|
} else {
|
|
printf("Fatal error: there must be a memory leak somewhere! You can't allocate even one frame!\n");
|
|
}
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
int clearRAM() {
|
|
if (ram_values) {
|
|
//#ifdef VERBOSE
|
|
//printf("clearing RAM 0x%x\n", ram_values);
|
|
//#endif
|
|
free(ram_values);
|
|
ram_values=NULL;
|
|
now_ptr=NULL;
|
|
}
|
|
//#ifdef VERBOSE
|
|
//printf("done 0x%x\n", ram_values);
|
|
//#endif
|
|
return OK;
|
|
}
|