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slsDetectorPackage/python/tests/test_freq.py
T
maliakal_d 8ff128b062
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Dev/ctb clocks fix (#1434)
* introduced new type Hz, typetraits, String conversions, command generation (not yet generated)

* incorrect unit typo

* cmd generation and compiles

* default to MHz, removed space between units for consistency with timers, min and max checks for clks

* in python, but need to change the default to Hz again for clean code and intuition

* allow ints, doubles, implicit conversions

* dont allow raw ints, doubles and implicit conversions

* fixed tests

* added operators for Hz in python

* fix test for min clk for xilinx ctb

* fix test

* fix python tests

* fixed xilinx period and default clks

* test fix

* removed the 3 clock cycle check for ctb and implemented properly the max adc clk frq for altera ctb

* removing 3 clock cycle code from xilinx as well

* formatting

* loadpattern before 3 clk cycles code

* actualtime and measurement time to be implemented in 100ns already in fw

* fix tests

* pyzmq dependency forthe tests

* fixed pyctbgui for freq
2026-04-23 17:27:13 +02:00

48 lines
939 B
Python

from slsdet import Hz, MHz, kHz
def test_Hz():
f = Hz(1)
assert f.value == 1
f = Hz(1 * 1000)
assert f.value == 1000
f = MHz(5)
assert f.value == 5_000_000
f = MHz(0.5)
assert f.value == 500_000
f = kHz(2.5)
assert f.value == 2500
f = kHz(5000)
assert f.value == 5_000_000
def test_rounding_exact():
f = MHz(1.234)
assert f.value == round(1.234 * 1_000_000)
def test_mul():
c = MHz(1)
assert (c * 2).value == 2_000_000
assert (c * 4).value == 4_000_000
def test_rmul():
c = MHz(1)
assert (2 * c).value == 2_000_000
assert (4 * c).value == 4_000_000
c = c * 2
assert c.value == 2_000_000
for rc in [1, 2, 4, 8]:
c = rc * c
assert c.value == 128_000_000
def test_div():
c = MHz(1)
assert (c / 2).value == 500_000
def test_eq():
assert MHz(1) == MHz(1)
assert MHz(1) != MHz(2)
assert MHz(1) == kHz(1000)