Dhanya Thattil 8ada7b6e37
802: jungfrau HW 1.0: adc output clock phase to 120 (#951)
* jungfrau: change adc output clock phase from 180 to 120 for v1.0 boards for reliable readout of adc #2

* formatting
2024-08-22 14:27:16 +02:00
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2022-11-23 12:01:22 +01:00
2021-07-22 16:49:38 +02:00
2022-11-23 12:01:22 +01:00
2022-11-23 12:01:22 +01:00