mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-24 07:20:01 +02:00
1202 lines
28 KiB
C
1202 lines
28 KiB
C
#ifdef SLS_DETECTOR_FUNCTION_LIST
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#include "mythen3FunctionList.h"
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#include "mythen3RegisterDefs.h"
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#include "mythen3Server_defs.h"
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#include "blackfin.h"
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// #include "AD9257.h"
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#include <stdio.h>
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#include <string.h>
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const int nChans=NCHAN;
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const int nChips=NCHIP;
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const int nDacs=NDAC;
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const int nAdcs=NADC;
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const int allSelected=-2;
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const int noneSelected=-1;
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sls_detector_module *detectorModules=NULL;
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int *detectorChips=NULL;
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int *detectorChans=NULL;
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dacs_t *detectorDacs=NULL;
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dacs_t *detectorAdcs=NULL;
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int nModY = NMAXMOD;
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int nModX = NMAXMOD;
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int dynamicRange= DYNAMIC_RANGE;
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// int dataBytes = NMAXMOD*NCHIP*NCHAN*2;
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int masterMode = NO_MASTER;
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int syncMode = NO_SYNCHRONIZATION;
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int timingMode = AUTO_TIMING;
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int vLimit=-100;
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enum detectorSettings thisSettings;
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int sChan, sChip, sMod, sDac, sAdc;
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int nModBoard;
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extern int dataBytes;
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extern enum detectorType myDetectorType;
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extern int N_DAC;
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int initializeDetectorStructure(){
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int imod;
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int n=getNModBoard(X)*getNModBoard(Y);
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#ifdef VERBOSE
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printf("Board is for %d modules\n",n);
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#endif
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detectorModules=malloc(n*sizeof(sls_detector_module));
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detectorChips=malloc(n*NCHIP*sizeof(int));
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detectorChans=malloc(n*NCHIP*NCHAN*sizeof(int));
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detectorDacs=malloc(n*NDAC*sizeof(int));
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detectorAdcs=malloc(n*NADC*sizeof(int));
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#ifdef VERBOSE
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printf("modules from 0x%x to 0x%x\n",(unsigned int)(detectorModules), (unsigned int)(detectorModules+n));
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printf("chips from 0x%x to 0x%x\n",(unsigned int)(detectorChips), (unsigned int)(detectorChips+n*NCHIP));
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printf("chans from 0x%x to 0x%x\n",(unsigned int)(detectorChans), (unsigned int)(detectorChans+n*NCHIP*NCHAN));
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printf("dacs from 0x%x to 0x%x\n",(unsigned int)(detectorDacs), (unsigned int)(detectorDacs+n*NDAC));
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printf("adcs from 0x%x to 0x%x\n",(unsigned int)(detectorAdcs), (unsigned int)(detectorAdcs+n*NADC));
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#endif
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for (imod=0; imod<n; imod++) {
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(detectorModules+imod)->dacs=detectorDacs+imod*NDAC;
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(detectorModules+imod)->adcs=detectorAdcs+imod*NADC;
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(detectorModules+imod)->chipregs=detectorChips+imod*NCHIP;
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(detectorModules+imod)->chanregs=detectorChans+imod*NCHIP*NCHAN;
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(detectorModules+imod)->ndac=NDAC;
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(detectorModules+imod)->nadc=NADC;
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(detectorModules+imod)->nchip=NCHIP;
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(detectorModules+imod)->nchan=NCHIP*NCHAN;
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(detectorModules+imod)->module=imod;
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(detectorModules+imod)->gain=0;
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(detectorModules+imod)->offset=0;
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(detectorModules+imod)->reg=0;
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/* initialize registers, dacs, retrieve sn, adc values etc */
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}
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thisSettings=UNINITIALIZED;
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sChan=noneSelected;
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sChip=noneSelected;
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sMod=noneSelected;
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sDac=noneSelected;
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sAdc=noneSelected;
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return OK;
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}
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int setupDetector(){
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//testFpga();
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//testRAM();
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//setSettings(GET_SETTINGS,-1);
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//setFrames(1);
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//setTrains(1);
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//setExposureTime(1e6);
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//setPeriod(1e9);
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//setDelay(0);
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//setGates(0);
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//setTiming(GET_EXTERNAL_COMMUNICATION_MODE);
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//setMaster(GET_MASTER);
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//setSynchronization(GET_SYNCHRONIZATION_MODE);
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return OK;
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}
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int setNMod(int nm, enum dimension dim){
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return 1;
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}
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int getNModBoard(enum dimension arg){
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return 1;
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}
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int64_t getModuleId(enum idMode arg, int imod){
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//DETECTOR_SERIAL_NUMBER
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//DETECTOR_FIRMWARE_VERSION
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return 0;
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}
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int64_t getDetectorId(enum idMode arg){
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//DETECTOR_SOFTWARE_VERSION defined in slsDetector_defs.h?
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return 0;
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}
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int moduleTest( enum digitalTestMode arg, int imod){
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//template testShiftIn from mcb_funcs.c
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//CHIP_TEST
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//testShiftIn
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//testShiftOut
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//testShiftStSel
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//testDataInOutMux
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//testExtPulseMux
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//testOutMux
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//testFpgaMux
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return OK;
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}
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int detectorTest( enum digitalTestMode arg){
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//templates from firmware_funcs.c
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//DETECTOR_FIRMWARE_TEST:testFpga()
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//DETECTOR_MEMORY_TEST:testRAM()
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//DETECTOR_BUS_TEST:testBus()
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//DETECTOR_SOFTWARE_TEST:testFpga()
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return OK;
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}
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int getDacRegister(int dacnum) {
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bus_w(DAC_NUM_REG, dacnum);
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printf("READ dac register value %d address %d\n",(int16_t)bus_r(DAC_VAL_REG),bus_r(DAC_NUM_REG)) ;
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return (int16_t)bus_r(DAC_VAL_REG);
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}
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int setDacRegister(int dacnum,int dacvalue) {
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bus_w(DAC_NUM_REG, dacnum);
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bus_w(DAC_VAL_REG, dacvalue);
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bus_w(DAC_NUM_REG, dacnum | (1<<16));
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bus_w(DAC_NUM_REG, dacnum);
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printf("Wrote dac register value %d address %d\n",bus_r(DAC_VAL_REG),bus_r(DAC_NUM_REG)) ;
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return getDacRegister(dacnum);
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}
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int dacSPI(int codata) {
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u_int32_t offw;
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int valw, vv;
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int i, ddx,cdx;
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ddx=0; cdx=1;
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offw=DAC_REG;
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valw=bus_r(offw);
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// codata=((cmd&0xf)<<DAC_CMD_OFF)|((val<<4)&0xfff0);
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printf("%08x\n",codata);
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valw=bus_r(offw);
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for (i=1;i<33;i++) {
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if ((codata&(1<<(32-i)))) {
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vv=valw|(0x1<<ddx);
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} else {
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vv=valw&(~(0x1<<ddx));
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}
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printf("%x",vv&0x1);
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bus_w16(offw,vv);//data
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bus_w16(offw,vv|(0x1<<cdx));//clkup
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bus_w16(offw,vv&(~(0x1<<cdx))); //cldwn
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}
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printf("\n");
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return 1;
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}
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int nextDac(){
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return dacSPI(0xf<<DAC_CMD_OFF);
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}
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int setThisDac(int dacnum, int dacvalue){
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u_int32_t codata, cmd;
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int dacch;
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dacch=dacnum%8;
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if (dacvalue>=0) {
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cmd=0x3;
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}
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else if (dacvalue==-100) {
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cmd=0x4;
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}
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codata=cmd<<DAC_CMD_OFF;
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codata|=(dacch&0xf)<<16;
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codata|=(dacvalue&0xfff)<<4;
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return dacSPI(codata);
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}
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double setDAC(enum DACINDEX ind, double val, int imod, int mV){
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// if mV==1: retval1 is returned in mV
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// val must be DACu !!!
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//template initDACbyIndexDACU from mcb_funcs.c
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//check that slsDetectorServer_funcs.c set_dac() has all the specific dac enums
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//set dac and write to a register in fpga to remember dac value when server restarts
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//find out which dac is on the board (convert dacIndex into something else) -> conversion done in slsDetectorServer_funcs.c-> set_dac()
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//if normal dac:
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int dacval = val; // in DAC
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u_int32_t offw;
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u_int32_t ichip; // DAC-chip (3 chips with each 8 DACs)
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u_int16_t valw;
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int i,ddx,csdx,cdx; // ddx=data, cdx=clk, csdx=chipselect
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//select dac-chip:
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if (myDetectorType==JUNGFRAUCTB || myDetectorType==MYTHEN3){
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ichip=2-ind/8;
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printf("This is a CTB (or mythen3)\n");
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}
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else {
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ichip=ind/8;
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printf("This is not a CTB\n");
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}
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// if(val>0 && mV){ // convert to DACu, if val is given in mV
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// dacval = val * 4095 / 2500; // convert to DAC
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if (val == -1){
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return getDacRegister(ind);
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}
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else if(dacval<0 || dacval>4095){
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dacval = -1;
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printf("The DAC is out of range! Error!\n");
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return getDacRegister(ind);
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}
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// }
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else if(dacval>=0 && dacval<=4095){
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printf("\nSetting of DAC %d to %d DACunits\n",ind,dacval);
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ddx=0; // data is first bit in DAC_REG
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cdx=1; // clk is 2nd bit in DAC_REG
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if (myDetectorType==JUNGFRAUCTB || myDetectorType==MYTHEN3)
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csdx=2;
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else
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csdx=ichip+2;
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//setting int reference
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offw=DAC_REG;
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valw=bus_r(offw)|0xff; // alles (ddx,cdx,csdx) auf 1 setzen (for START)
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bus_w(offw,(valw)); // start point
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//chip select down:
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valw=((valw&(~(0x1<<csdx))));
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bus_w(offw,valw);
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// clk down:
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valw=(valw&(~(0x1<<cdx)));
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bus_w(offw,valw); //clk dwn
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// change DAC only in the required dac-chip, skip all others:
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if (myDetectorType==JUNGFRAUCTB || myDetectorType==MYTHEN3) {
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for (i=0; i<ichip; i++) { // skip first part
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nextDac();
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printf("next DAC\n");
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}
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}
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// now you are at the dac-chip you want to change:
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setThisDac(ind,dacval);
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// skip the rest of the dac-chips to arrive at the end:
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if (myDetectorType==JUNGFRAUCTB || myDetectorType==MYTHEN3) {
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for (i=ichip+1; i<N_DAC/8; i++) {
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nextDac();
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printf("next DAC\n");
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}
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}
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//nextdac, setthisdac, nextdac: done
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//chipselect up:
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valw=bus_r(offw);
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valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //clk down
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valw=(valw|(0x1<<csdx));
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bus_w(offw,valw); //csdx up
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valw=bus_r(offw)|0xff; // set all to 1 (up)
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bus_w(offw,(valw)); // stop point =start point of course */
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//write dacvalreg:
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setDacRegister(ind,dacval);
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}
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//convert return value into mV if necessary
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int retval = getDacRegister(ind);
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double retval1; // only to return
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if(mV){ // return the DACvalue in mV
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retval1 = retval * 2500. / 4095.;
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}
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else{ // return the DACvalue in DACu
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retval1 = retval;
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}
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return retval1;
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}
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int setPower(int ind, int val) {
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// val in mV
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// check dacindex!
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int dacindex=-1;
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int dacval=-1;
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int pwrindex=-1;
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int retval=-1;
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int retval1=-1;
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u_int32_t preg;
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int vchip=2700-(getDacRegister(19)*1000)/4095;
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int vmax=vchip-200;
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int vmin=600;
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printf("---------------------------------------------Current V_Chip is %d mV\n",vchip);
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switch (ind) {
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case V_POWER_CHIP:
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dacindex=19;
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pwrindex=-1;
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break;
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case V_POWER_A:
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dacindex=22;
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pwrindex=1;
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break;
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case V_POWER_B:
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dacindex=21;
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pwrindex=2;
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break;
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case V_POWER_C:
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dacindex=20;
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pwrindex=3;
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break;
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case V_POWER_D:
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dacindex=18;
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pwrindex=4;
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break;
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case V_POWER_IO:
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dacindex=23;
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pwrindex=0;
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break;
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case V_LIMIT:
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dacindex=-1;
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pwrindex=-1;
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break;
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default:
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pwrindex=-1;
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dacindex=-1;
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}
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if (val==-1) {
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printf("get\n");
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dacval=-1;
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} else {
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if (pwrindex>=0) { // v_a, v_b, v_c, v_d, v_io
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printf("vpower\n");
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dacval=((vmax-val)*4095)/(vmax-vmin);
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if (dacval<0)
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dacval=0;
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if (dacval>4095)
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dacval=-100;
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if (val==-100)
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dacval=-100;
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} else if (dacindex>=0) {// v_chip
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printf("vchip\n");
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dacval=((2700-val)*4095)/1000;
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if (dacval<0)
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dacval=0;
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if (dacval>4095)
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dacval=4095;
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} else { // v_limit
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vLimit=val;
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printf("vlimit %d\n",vLimit );
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}
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}
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if (pwrindex>=0 && val!=-1) {// v_a, v_b, v_c, v_d, v_io
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preg=bus_r(POWER_ON_REG);
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printf("power reg is %08x\n",bus_r(POWER_ON_REG));
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printf("Switching off power %d\n", pwrindex);
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bus_w(POWER_ON_REG,preg&(~(1<<(16+pwrindex))));
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setDAC(dacindex,-100,-1,1);
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printf("power reg is %08x\n",bus_r(POWER_ON_REG));
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retval=0;
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}
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if (dacindex>0 && dacval!=-100) {// v_a, v_b, v_c, v_d, v_io, v_chip
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printf("Setting power %d to %d mV\n",ind,val);
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printf("Setting DAC %d to value %d\n",dacindex,dacval);
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retval=setDAC(dacindex,dacval,-1,1);// in mV
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if (pwrindex>=0 && dacval>=0 ) {// v_a, v_b, v_c, v_d, v_io
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preg=bus_r(POWER_ON_REG);
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printf("power reg is %08x\n",bus_r(POWER_ON_REG));
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printf("Switching on power %d\n", pwrindex);
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bus_w(POWER_ON_REG,preg|((1<<(16+pwrindex))));
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printf("power reg is %08x\n",bus_r(POWER_ON_REG));
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}
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}
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if (pwrindex>=0) {// v_a, v_b, v_c, v_d, v_io
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if (bus_r(POWER_ON_REG)&(1<<(16+pwrindex))){
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vmax=2700-(getDacRegister(19)*1000)/4095-200; // 19=v_chip
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printf("Vchip id %d mV\n",vmax+200);
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// retval1=vmax-(retval*(vmax-vmin))/4095;
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retval1=vmax-retval; // mV
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printf("Vdac id %d mV\n",retval1);
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if (retval1>vmax)
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retval1=vmax;
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if (retval1<vmin)
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retval1=vmin;
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if (retval<0)
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retval1=retval;
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} else
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retval1=0;
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} else if (dacindex>=0) { //v_chip
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if (retval>=0) {
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retval1=2700-(retval*1000)/4095;
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printf("Vchip is %d mV\n",vmax);
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} else
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retval1=-1;
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} else {
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printf("Get vlimit %d\n",vLimit);
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retval=vLimit;
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retval1=vLimit;
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}
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return retval1;
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}
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int setChannel(sls_detector_channel myChan){
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//template initChannelByNumber() from mcb_funcs.c
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return myChan.reg;
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}
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int getChannel(sls_detector_channel *myChan){
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//template getChannelbyNumber() from mcb_funcs.c
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return FAIL;
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}
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int setChip(sls_detector_chip myChip){
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//template initChipbyNumber() from mcb_funcs.c
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return myChip.reg;
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}
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|
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|
|
int getChip(sls_detector_chip *myChip){
|
|
//template getChipbyNumber() from mcb_funcs.c
|
|
return FAIL;
|
|
}
|
|
|
|
int setModule(sls_detector_module myChan){
|
|
//template initModulebyNumber() from mcb_funcs.c
|
|
return OK;
|
|
}
|
|
|
|
int getModule(sls_detector_module *myChan){
|
|
//template getModulebyNumber() from mcb_funcs.c
|
|
return FAIL;
|
|
}
|
|
|
|
int getThresholdEnergy(int imod){
|
|
//template getThresholdEnergy() from mcb_funcs.c
|
|
//depending on settings
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
int setThresholdEnergy(int thr, int imod){
|
|
//template getThresholdEnergy() from mcb_funcs.c
|
|
//depending on settings
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
|
|
enum detectorSettings setSettings(enum detectorSettings sett, int imod){
|
|
//template setSettings() from mcb_funcs.c
|
|
//reads the dac registers from fpga to confirm which settings, if weird, undefined
|
|
|
|
return OK;
|
|
}
|
|
|
|
int startStateMachine(){
|
|
//template startStateMachine() from firmware_funcs.c
|
|
/*
|
|
fifoReset();
|
|
now_ptr=(char*)ram_values;
|
|
//send start acquisition to fpga
|
|
*/
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
int stopStateMachine(){
|
|
//template stopStateMachine() from firmware_funcs.c
|
|
// send stop to fpga
|
|
//if status = busy after 500us, return FAIL
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
int startReadOut(){
|
|
//template startReadOut() from firmware_funcs.c
|
|
//send fpga start readout
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
enum runStatus getRunStatus(){
|
|
//template runState() from firmware_funcs.c
|
|
//get status from fpga
|
|
return ERROR;
|
|
}
|
|
|
|
|
|
char *readFrame(int *ret, char *mess){
|
|
//template fifo_read_event() from firmware_funcs.c
|
|
//checks if state machine running and if fifo has data(look_at_me_reg) and accordingly reads frame
|
|
// memcpy(now_ptr, values, dataBytes);
|
|
//returns ptr to values
|
|
return NULL;
|
|
}
|
|
|
|
|
|
int64_t setTimer(enum timerIndex ind, int64_t val){
|
|
//template setDelay() from firmware_funcs.c
|
|
//writes to reg
|
|
//FRAME_NUMBER --> defined in sls_receiver_defs.h
|
|
//ACQUISITION_TIME
|
|
//FRAME_PERIOD -> how many frames per trigger
|
|
//DELAY_AFTER_TRIGGER
|
|
//GATES_NUMBER
|
|
//PROBES_NUMBER = # counters
|
|
//CYCLES_NUMBER -> how many triggers
|
|
|
|
int64_t retval = -1; // return value to check
|
|
|
|
switch(ind){ // only change the timer corresponding to ind
|
|
|
|
case FRAME_NUMBER:
|
|
if(val >= 0)
|
|
printf("\nSetting #frames: %lld\n",(long long int)val);
|
|
retval = set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
|
|
printf("Getting #frames: %lld\n",(long long int)retval);
|
|
break;
|
|
|
|
case ACQUISITION_TIME: // defined in sls_receiver_defs.h
|
|
if(val>=0){
|
|
printf("\n Setting the exposure time: %lld ns \n",(long long int)val);
|
|
val *= (1E-3 * CLK_RUN); // convert from ns to clk-cycles
|
|
// CLK_RUN is defined in slsDetectorServer_defs.h
|
|
}
|
|
retval = set64BitReg(val,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG )/(1E-3 * CLK_RUN); // set the register to val and read back, convert back to ns
|
|
// SET_EXPTIME_LSB_REG are defined in RegisterDefs.h
|
|
printf("Getting the exposure time: %lld ns \n", (long long int)retval);
|
|
break;
|
|
|
|
case FRAME_PERIOD: // how many frames per trigger
|
|
if(val >= 0){
|
|
printf("\nSetting period to %lldns\n",(long long int)val);
|
|
val *= (1E-3 * CLK_SYNC);
|
|
}
|
|
retval = set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG )/ (1E-3 * CLK_SYNC);
|
|
// CLK_SYN is defined in slsDetectorServer_defs.h
|
|
printf("Getting period: %lldns\n", (long long int)retval);
|
|
break;
|
|
|
|
case DELAY_AFTER_TRIGGER:
|
|
if(val >= 0){
|
|
printf("\nSetting delay to %lldns\n", (long long int)val);
|
|
val *= (1E-3 * CLK_SYNC);
|
|
}
|
|
retval = set64BitReg(val, SET_DELAY_LSB_REG, SET_DELAY_MSB_REG) / (1E-3 * CLK_SYNC);
|
|
printf("Getting delay: %lldns\n", (long long int)retval);
|
|
break;
|
|
|
|
// case PROBES_NUMBER:
|
|
|
|
case CYCLES_NUMBER: // how many triggers
|
|
if(val >= 0)
|
|
printf("\nSetting #cycles to %lld\n", (long long int)val);
|
|
retval = set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
|
|
printf("Getting #cycles: %lld\n", (long long int)retval);
|
|
break;
|
|
|
|
default:
|
|
cprintf(RED,"Warning: Timer Index not implemented for this detector: %d\n", ind);
|
|
break;
|
|
}
|
|
return retval;
|
|
}
|
|
|
|
|
|
int64_t getTimeLeft(enum timerIndex ind){
|
|
//template getDelay() from firmware_funcs.c
|
|
//reads from reg
|
|
//FRAME_NUMBER
|
|
//ACQUISITION_TIME
|
|
//FRAME_PERIOD
|
|
//DELAY_AFTER_TRIGGER
|
|
//GATES_NUMBER
|
|
//PROBES_NUMBER
|
|
//CYCLES_NUMBER
|
|
return -1;
|
|
}
|
|
|
|
|
|
int setDynamicRange(int dr){
|
|
//template setDynamicRange() from firmware_funcs.c
|
|
return 0;
|
|
}
|
|
|
|
|
|
enum readOutFlags setReadOutFlags(enum readOutFlags val){
|
|
//template setStoreInRAM from firmware_funcs.c
|
|
return -1;
|
|
}
|
|
|
|
|
|
|
|
|
|
int setROI(int n, ROI arg[], int *retvalsize, int *ret){
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
|
|
int setSpeed(enum speedVariable arg, int val){
|
|
//template setClockDivider() from firmware_funcs.c
|
|
//CLOCK_DIVIDER
|
|
//WAIT_STATES
|
|
//SET_SIGNAL_LENGTH
|
|
//TOT_CLOCK_DIVIDER
|
|
//TOT_DUTY_CYCLE
|
|
|
|
//returns eg getClockDivider from firmware_funcs.c
|
|
return 0;
|
|
}
|
|
|
|
|
|
|
|
int executeTrimming(enum trimMode mode, int par1, int par2, int imod){
|
|
// template trim_with_noise from trimming_funcs.c
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
|
|
|
|
// int configureMAC(int ipad, long long int imacadd, long long int iservermacadd, int dtb){
|
|
// //detector specific.
|
|
// return FAIL;
|
|
// }
|
|
|
|
int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2, int ival){
|
|
return FAIL;
|
|
};
|
|
|
|
|
|
int loadImage(enum imageType index, char *imageVals){
|
|
//detector specific.
|
|
return FAIL;
|
|
}
|
|
|
|
|
|
int readCounterBlock(int startACQ, char *counterVals){
|
|
//detector specific.
|
|
return FAIL;
|
|
}
|
|
|
|
int resetCounterBlock(int startACQ){
|
|
//detector specific.
|
|
return FAIL;
|
|
}
|
|
|
|
int startReceiver(int d){
|
|
|
|
return 0;
|
|
}
|
|
|
|
int calibratePedestal(int frames){
|
|
|
|
return 0;
|
|
}
|
|
|
|
int calculateDataBytes(){
|
|
return 0;
|
|
}
|
|
|
|
int getTotalNumberOfChannels(){return 0;}
|
|
int getTotalNumberOfChips(){return 0;}
|
|
int getTotalNumberOfModules(){return 0;}
|
|
int getNumberOfChannelsPerChip(){return 0;}
|
|
int getNumberOfChannelsPerModule(){return 0;}
|
|
int getNumberOfChipsPerModule(){return 0;}
|
|
int getNumberOfDACsPerModule(){return 0;}
|
|
int getNumberOfADCsPerModule(){return 0;}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
enum externalSignalFlag getExtSignal(int signalindex){
|
|
//template getExtSignal from firmware_funcs.c
|
|
//return signals[signalindex];
|
|
return -1;
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
enum externalSignalFlag setExtSignal(int signalindex, enum externalSignalFlag flag){
|
|
//template setExtSignal from firmware_funcs.c
|
|
|
|
//in short..sets signals array, checks if agrees with timing mode, writes to fpga reg, calls synchronization and then settiming
|
|
/*
|
|
if (signalindex>=0 && signalindex<4) {
|
|
signals[signalindex]=flag;
|
|
#ifdef VERBOSE
|
|
printf("settings signal variable number %d to value %04x\n", signalindex, signals[signalindex]);
|
|
#endif
|
|
// if output signal, set it!
|
|
switch (flag) {
|
|
case GATE_IN_ACTIVE_HIGH:
|
|
case GATE_IN_ACTIVE_LOW:
|
|
if (timingMode==GATE_FIX_NUMBER || timingMode==GATE_WITH_START_TRIGGER)//timingMode = AUTO_TIMING by default and is set in setTiming()
|
|
setFPGASignal(signalindex,flag); //not implemented here, checks if flag within limits and writes to fpga reg
|
|
else
|
|
setFPGASignal(signalindex,SIGNAL_OFF);
|
|
break;
|
|
case TRIGGER_IN_RISING_EDGE:
|
|
case TRIGGER_IN_FALLING_EDGE:
|
|
if (timingMode==TRIGGER_EXPOSURE || timingMode==GATE_WITH_START_TRIGGER)
|
|
setFPGASignal(signalindex,flag);
|
|
else
|
|
setFPGASignal(signalindex,SIGNAL_OFF);
|
|
break;
|
|
case RO_TRIGGER_IN_RISING_EDGE:
|
|
case RO_TRIGGER_IN_FALLING_EDGE:
|
|
if (timingMode==BURST_TRIGGER)
|
|
setFPGASignal(signalindex,flag);
|
|
else
|
|
setFPGASignal(signalindex,SIGNAL_OFF);
|
|
break;
|
|
case MASTER_SLAVE_SYNCHRONIZATION:
|
|
setSynchronization(syncMode);//syncmode = NO_SYNCHRONIZATION by default and set with this function
|
|
break;
|
|
default:
|
|
setFPGASignal(signalindex,mode);
|
|
}
|
|
|
|
setTiming(GET_EXTERNAL_COMMUNICATION_MODE);
|
|
}
|
|
*/
|
|
return getExtSignal(signalindex);
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
enum externalCommunicationMode setTiming( enum externalCommunicationMode arg){
|
|
//template setTiming from firmware_funcs.c
|
|
//template getFPGASignal from firmware_funcs.c
|
|
|
|
|
|
//getFPGASignal(signalindex) used later on in this fucntion
|
|
//gets flag from fpga reg, checks if flag within limits,
|
|
//if( flag=SIGNAL_OFF and signals[signalindex]==MASTER_SLAVE_SYNCHRONIZATION), return -1, (ensures masterslaveflag !=off now)
|
|
//else return flag
|
|
|
|
int ret=GET_EXTERNAL_COMMUNICATION_MODE;
|
|
//sets timingmode variable
|
|
//ensures that the signals are in acceptance with timing mode and according sets the timing mode
|
|
/*
|
|
int g=-1, t=-1, rot=-1;
|
|
|
|
int i;
|
|
|
|
switch (ti) {
|
|
case AUTO_TIMING:
|
|
timingMode=ti;
|
|
// disable all gates/triggers in except if used for master/slave synchronization
|
|
for (i=0; i<4; i++) {
|
|
if (getFPGASignal(i)>0 && getFPGASignal(i)<GATE_OUT_ACTIVE_HIGH && signals[i]!=MASTER_SLAVE_SYNCHRONIZATION)
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
}
|
|
break;
|
|
|
|
case TRIGGER_EXPOSURE:
|
|
timingMode=ti;
|
|
// if one of the signals is configured to be trigger, set it and unset possible gates
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
|
|
setFPGASignal(i,signals[i]);
|
|
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
else if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
}
|
|
break;
|
|
|
|
|
|
|
|
case TRIGGER_READOUT:
|
|
timingMode=ti;
|
|
// if one of the signals is configured to be trigger, set it and unset possible gates
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
|
|
setFPGASignal(i,signals[i]);
|
|
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
}
|
|
break;
|
|
|
|
case GATE_FIX_NUMBER:
|
|
timingMode=ti;
|
|
// if one of the signals is configured to be trigger, set it and unset possible gates
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
|
|
setFPGASignal(i,signals[i]);
|
|
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
}
|
|
break;
|
|
|
|
|
|
case GATE_WITH_START_TRIGGER:
|
|
timingMode=ti;
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
|
|
setFPGASignal(i,signals[i]);
|
|
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
|
|
setFPGASignal(i,signals[i]);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
;
|
|
|
|
}
|
|
|
|
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]!=MASTER_SLAVE_SYNCHRONIZATION) {
|
|
if (getFPGASignal(i)==RO_TRIGGER_IN_RISING_EDGE || getFPGASignal(i)==RO_TRIGGER_IN_FALLING_EDGE)
|
|
rot=i;
|
|
else if (getFPGASignal(i)==GATE_IN_ACTIVE_HIGH || getFPGASignal(i)==GATE_IN_ACTIVE_LOW)
|
|
g=i;
|
|
else if (getFPGASignal(i)==TRIGGER_IN_RISING_EDGE || getFPGASignal(i)==TRIGGER_IN_FALLING_EDGE)
|
|
t=i;
|
|
}
|
|
}
|
|
|
|
|
|
if (g>=0 && t>=0 && rot<0) {
|
|
ret=GATE_WITH_START_TRIGGER;
|
|
} else if (g<0 && t>=0 && rot<0) {
|
|
ret=TRIGGER_EXPOSURE;
|
|
} else if (g>=0 && t<0 && rot<0) {
|
|
ret=GATE_FIX_NUMBER;
|
|
} else if (g<0 && t<0 && rot>0) {
|
|
ret=TRIGGER_READOUT;
|
|
} else if (g<0 && t<0 && rot<0) {
|
|
ret=AUTO_TIMING;
|
|
}
|
|
|
|
*/
|
|
return ret;
|
|
}
|
|
|
|
|
|
|
|
enum masterFlags setMaster(enum masterFlags arg){
|
|
//template setMaster from firmware_funcs.c
|
|
/*
|
|
int i;
|
|
switch(f) {
|
|
case NO_MASTER:
|
|
// switch of gates or triggers
|
|
masterMode=NO_MASTER;
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
}
|
|
}
|
|
break;
|
|
case IS_MASTER:
|
|
// configure gate or trigger out
|
|
masterMode=IS_MASTER;
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
switch (syncMode) {
|
|
case NO_SYNCHRONIZATION:
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
break;
|
|
case MASTER_GATES:
|
|
setFPGASignal(i,GATE_OUT_ACTIVE_HIGH);
|
|
break;
|
|
case MASTER_TRIGGERS:
|
|
setFPGASignal(i,TRIGGER_OUT_RISING_EDGE);
|
|
break;
|
|
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
|
setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE);
|
|
break;
|
|
default:
|
|
;
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
case IS_SLAVE:
|
|
// configure gate or trigger in
|
|
masterMode=IS_SLAVE;
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
switch (syncMode) {
|
|
case NO_SYNCHRONIZATION:
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
break;
|
|
case MASTER_GATES:
|
|
setFPGASignal(i,GATE_IN_ACTIVE_HIGH);
|
|
break;
|
|
case MASTER_TRIGGERS:
|
|
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
|
|
break;
|
|
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
|
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
|
|
break;
|
|
default:
|
|
;
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
default:
|
|
//do nothing
|
|
;
|
|
}
|
|
|
|
switch(masterMode) {
|
|
case NO_MASTER:
|
|
return NO_MASTER;
|
|
|
|
|
|
case IS_MASTER:
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
switch (syncMode) {
|
|
case NO_SYNCHRONIZATION:
|
|
return IS_MASTER;
|
|
case MASTER_GATES:
|
|
if (getFPGASignal(i)==GATE_OUT_ACTIVE_HIGH)
|
|
return IS_MASTER;
|
|
else
|
|
return NO_MASTER;
|
|
case MASTER_TRIGGERS:
|
|
if (getFPGASignal(i)==TRIGGER_OUT_RISING_EDGE)
|
|
return IS_MASTER;
|
|
else
|
|
return NO_MASTER;
|
|
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
|
if (getFPGASignal(i)==RO_TRIGGER_OUT_RISING_EDGE)
|
|
return IS_MASTER;
|
|
else
|
|
return NO_MASTER;
|
|
default:
|
|
return NO_MASTER;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
case IS_SLAVE:
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
switch (syncMode) {
|
|
case NO_SYNCHRONIZATION:
|
|
return IS_SLAVE;
|
|
case MASTER_GATES:
|
|
if (getFPGASignal(i)==GATE_IN_ACTIVE_HIGH)
|
|
return IS_SLAVE;
|
|
else
|
|
return NO_MASTER;
|
|
case MASTER_TRIGGERS:
|
|
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
|
if (getFPGASignal(i)==TRIGGER_IN_RISING_EDGE)
|
|
return IS_SLAVE;
|
|
else
|
|
return NO_MASTER;
|
|
default:
|
|
return NO_MASTER;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
}
|
|
*/
|
|
|
|
return NO_MASTER;
|
|
}
|
|
|
|
|
|
|
|
enum synchronizationMode setSynchronization(enum synchronizationMode arg){
|
|
/*
|
|
int i;
|
|
|
|
switch(s) {
|
|
case NO_SYNCHRONIZATION:
|
|
syncMode=NO_SYNCHRONIZATION;
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
setFPGASignal(i,SIGNAL_OFF);
|
|
}
|
|
}
|
|
break;
|
|
// disable external signals?
|
|
case MASTER_GATES:
|
|
// configure gate in or out
|
|
syncMode=MASTER_GATES;
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
if (masterMode==IS_MASTER)
|
|
setFPGASignal(i,GATE_OUT_ACTIVE_HIGH);
|
|
else if (masterMode==IS_SLAVE)
|
|
setFPGASignal(i,GATE_IN_ACTIVE_HIGH);
|
|
}
|
|
}
|
|
|
|
break;
|
|
case MASTER_TRIGGERS:
|
|
// configure trigger in or out
|
|
syncMode=MASTER_TRIGGERS;
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
if (masterMode==IS_MASTER)
|
|
setFPGASignal(i,TRIGGER_OUT_RISING_EDGE);
|
|
else if (masterMode==IS_SLAVE)
|
|
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
|
|
}
|
|
}
|
|
break;
|
|
|
|
|
|
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
|
// configure trigger in or out
|
|
syncMode=SLAVE_STARTS_WHEN_MASTER_STOPS;
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
if (masterMode==IS_MASTER)
|
|
setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE);
|
|
else if (masterMode==IS_SLAVE)
|
|
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
|
|
}
|
|
}
|
|
break;
|
|
|
|
|
|
default:
|
|
//do nothing
|
|
;
|
|
}
|
|
|
|
switch (syncMode) {
|
|
|
|
case NO_SYNCHRONIZATION:
|
|
return NO_SYNCHRONIZATION;
|
|
|
|
case MASTER_GATES:
|
|
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
if (masterMode==IS_MASTER && getFPGASignal(i)==GATE_OUT_ACTIVE_HIGH)
|
|
return MASTER_GATES;
|
|
else if (masterMode==IS_SLAVE && getFPGASignal(i)==GATE_IN_ACTIVE_HIGH)
|
|
return MASTER_GATES;
|
|
}
|
|
}
|
|
return NO_SYNCHRONIZATION;
|
|
|
|
case MASTER_TRIGGERS:
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
if (masterMode==IS_MASTER && getFPGASignal(i)==TRIGGER_OUT_RISING_EDGE)
|
|
return MASTER_TRIGGERS;
|
|
else if (masterMode==IS_SLAVE && getFPGASignal(i)==TRIGGER_IN_RISING_EDGE)
|
|
return MASTER_TRIGGERS;
|
|
}
|
|
}
|
|
return NO_SYNCHRONIZATION;
|
|
|
|
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
|
for (i=0; i<4; i++) {
|
|
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
|
if (masterMode==IS_MASTER && getFPGASignal(i)==RO_TRIGGER_OUT_RISING_EDGE)
|
|
return SLAVE_STARTS_WHEN_MASTER_STOPS;
|
|
else if (masterMode==IS_SLAVE && getFPGASignal(i)==TRIGGER_IN_RISING_EDGE)
|
|
return SLAVE_STARTS_WHEN_MASTER_STOPS;
|
|
}
|
|
}
|
|
return NO_SYNCHRONIZATION;
|
|
|
|
default:
|
|
return NO_SYNCHRONIZATION;
|
|
|
|
}
|
|
|
|
|
|
*/
|
|
return NO_SYNCHRONIZATION;
|
|
}
|
|
|
|
void checkFirmwareCompatibility(int flag){
|
|
|
|
}
|
|
|
|
#endif
|