slsDetectorPackage/slsDetectorServers
Dhanya Thattil 1d4a5d6d29
dev: jungfrau HW 1.0: adc output clock phase to 120 (#952)
* jungfrau: change adc output clock phase from 180 to 120 for v1.0 boards for reliable readout of adc #2

* versioning

* formatting
2024-08-22 15:45:41 +02:00
..
2024-08-20 16:28:09 +02:00
2021-10-18 11:52:23 +02:00
2024-08-20 16:28:09 +02:00
2024-01-04 17:10:16 +01:00
2022-11-09 11:13:09 +01:00