Dhanya Thattil 3f7c9529dd
m3: changed clk 0 1 2 to 100MHz (#636)
* m3: changed clk 0 1 2 to 100MHz

* m3:fix clk 2

* binaries in
2023-01-25 11:54:37 +01:00
..
2022-09-01 15:30:04 +02:00
2022-11-09 11:13:09 +01:00