mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-05-22 10:41:33 +02:00
Dhanya Thattil
9f079b17a2
* put back code to obtain adc and dac device indexafter loading device tree and then create folder iio_device_links and create symbolic links there according to device indices found. ln -sf operation not permitted, so folder has to be deleted and created everytime. Also refactored definitions to have all the xilinx name or detector specific stuff out of programbyArm.c * uncommented waittransceiverreset at startup (should work now) and return of powering off chip at startup (error for transceiver alignment reset) * updated registerdefs from firmware * minor prints and updating names from registerdefs * waittransceiverreset has been fixed in firmware and removing warnign for that, transceiver alignment check for powering off chip is not done in fw (giving a warning and returning ok for now) * fixing ipchecksum (not done), removed startperiphery, allowing readout command to be allowed for xilinx when acquiring
99 lines
3.2 KiB
C
99 lines
3.2 KiB
C
// SPDX-License-Identifier: LGPL-3.0-or-other
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// Copyright (C) 2021 Contributors to the SLS Detector Package
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#include "arm64.h"
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#include "RegisterDefs.h"
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#include "clogger.h"
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#include "common.h"
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#include "sls/ansi.h"
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#include "sls/sls_detector_defs.h"
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#include <fcntl.h> // open
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#include <sys/mman.h> // mmap
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/* global variables */
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#define CSP0 (0xB0080000)
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#define CSP1 (0xB0050000) // udp
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#define MEM_SIZE_CSP0 (0x10000)
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#define MEM_SIZE_CSP1 (0x2000) // smaller size for udp
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u_int32_t *csp0base = 0;
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u_int32_t *csp1base = 0;
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void bus_w(u_int32_t offset, u_int32_t data) {
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volatile u_int32_t *ptr1;
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ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
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*ptr1 = data;
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}
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u_int32_t bus_r(u_int32_t offset) {
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volatile u_int32_t *ptr1;
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ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
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return *ptr1;
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}
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uint64_t getU64BitReg(int aLSB, int aMSB) {
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uint64_t retval = bus_r(aMSB);
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retval = (retval << 32) | bus_r(aLSB);
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return retval;
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}
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void setU64BitReg(uint64_t value, int aLSB, int aMSB) {
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bus_w(aLSB, value & (0xffffffff));
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bus_w(aMSB, (value >> 32) & (0xffffffff));
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}
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u_int32_t readRegister(u_int32_t offset) { return bus_r(offset); }
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u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
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bus_w(offset, data);
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return readRegister(offset);
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}
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int mapCSP0(void) {
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LOG(logINFO, ("Mapping memory\n"));
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u_int32_t csps[2] = {CSP0, CSP1};
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u_int32_t **cspbases[2] = {&csp0base, &csp1base};
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u_int32_t memsize[2] = {MEM_SIZE_CSP0, MEM_SIZE_CSP1};
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char names[2][10] = {"csp0base", "csp1base"};
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for (int i = 0; i < 2; ++i) {
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// if not mapped
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if (*cspbases[i] == 0) {
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LOG(logINFO, ("\tMapping memory for %s\n", names[i]));
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#ifdef VIRTUAL
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*cspbases[i] = malloc(memsize[i]);
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if (*cspbases[i] == NULL) {
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LOG(logERROR,
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("Could not allocate virtual memory of size %d for %s.\n",
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memsize[i], names[i]));
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return FAIL;
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}
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LOG(logINFO, ("\tmemory allocated for %s\n", names[i]));
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#else
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int fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
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if (fd == -1) {
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LOG(logERROR, ("Can't find /dev/mem for %s\n", names[i]));
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return FAIL;
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}
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LOG(logDEBUG1,
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("\t/dev/mem opened for %s, (CSP:0x%x)\n", names[i], csps[i]));
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*cspbases[i] =
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(u_int32_t *)mmap(0, memsize[i], PROT_READ | PROT_WRITE,
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MAP_FILE | MAP_SHARED, fd, csps[i]);
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if (*cspbases[i] == MAP_FAILED) {
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LOG(logERROR, ("Can't map memmory area for %s\n", names[i]));
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return FAIL;
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}
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#endif
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LOG(logINFO,
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("\t%s mapped of size %d from %p to %p,(CSP:0x%x) \n", names[i],
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memsize[i], *cspbases[i], *cspbases[i] + memsize[i], csps[i]));
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// LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
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} else
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LOG(logINFO, ("\tMemory %s already mapped before\n", names[i]));
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}
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return OK;
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}
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u_int32_t *Arm_getUDPBaseAddress() { return csp1base; }
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