Dhanya Thattil 2c6ded89ad xilinx server: not allowing power down as default dac values for the power regulators and not allowing to be set to these in the future either

2026-01-28 14:59:49 +01:00

..

bin

Dev/server/separate list header (#1373)

2026-01-28 13:49:46 +01:00

chip_config_xilinx.txt

remove hardcoded MH02 startup

2026-01-13 11:05:37 +01:00

CMakeLists.txt

added FMC control

2025-11-26 12:16:30 +01:00

enable_clock_pattern.pyat

Xilinxctb/update reg (#1084)

2025-02-18 11:30:51 +01:00

Makefile

added FMC control

2025-11-26 12:16:30 +01:00

readout_pattern.pyat

Xilinxctb/update reg (#1084)

2025-02-18 11:30:51 +01:00

RegisterDefs.h

xilinx tsamples upper limit increased (#1365)

2026-01-21 16:13:22 +01:00

reset_chip_xilinx.txt

remove hardcoded MH02 startup

2026-01-13 11:05:37 +01:00

slsDetectorFunctionList.c

xilinx server: not allowing power down as default dac values for the power regulators and not allowing to be set to these in the future either

2026-01-28 14:59:49 +01:00

slsDetectorFunctionList.h

Dev/server/separate list header (#1373)

2026-01-28 13:49:46 +01:00

slsDetectorServer_defs.h

xilinx tsamples upper limit increased (#1365)

2026-01-21 16:13:22 +01:00