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<h1><a class="anchor" id="ctb">Chiptest board </a></h1><p>Commands specific for the new chiptest board as pattern generator</p>
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<ul>
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<li><b>adcinvert [mask]</b> Sets/gets ADC inversion mask (8 digits hex format)</li>
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</ul>
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<ul>
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<li><b>adcdisable [mask]</b> Sets/gets ADC disable mask (8 digits hex format)</li>
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</ul>
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<ul>
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<li><b>pattern fn</b> loads binary pattern file fn</li>
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</ul>
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<ul>
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<li><b>patword addr [word]</b> sets/gets 64 bit word at address addr of pattern memory. Both address and word in hex format. Advanced!</li>
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</ul>
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<ul>
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<li><b>patioctrl [word]</b> sets/gets 64 bit mask defining input (0) and output (1) signals. hex format.</li>
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</ul>
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<ul>
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<li><b>patclkctrl [word]</b> sets/gets 64 bit mask defining if output signal is a clock and runs. hex format. Unused at the moment.</li>
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</ul>
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<ul>
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<li><b>patlimits [addr1 addr2]</b> sets/gets the start and stop limits of the pattern to be executed. hex format. Advanced!</li>
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</ul>
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<ul>
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<li><b>patloop0 [addr1 addr2]</b> sets/gets the start and stop limits of the level 0 loop. hex format. Advanced!</li>
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</ul>
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<ul>
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<li><b>patnloop0 [n]</b> sets/gets the number of cyclesof the level 0 loop (int).</li>
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</ul>
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<ul>
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<li><b>patwait0 [addr]</b> sets/gets the address of the level 0 wait point. hex format. Advanced!</li>
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</ul>
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<ul>
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<li><b>patwaittime0 [n]</b> sets/gets the duration of the witing of the 0 waiting point in clock cycles (int).</li>
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</ul>
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<ul>
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<li><b>patloop1 [addr1 addr2]</b> sets/gets the start and stop limits of the level 1 loop. hex format. Advanced!</li>
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</ul>
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<ul>
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<li><b>patnloop1 [n]</b> sets/gets the number of cyclesof the level 1 loop (int).</li>
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</ul>
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<ul>
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<li><b>patwait1 [addr]</b> sets/gets the address of the level 1 wait point. hex format. Advanced!</li>
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</ul>
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<ul>
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<li><b>patwaittime1 [n]</b> sets/gets the duration of the witing of the 1 waiting point in clock cycles (int).</li>
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</ul>
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<ul>
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<li><b>patloop2 [addr1 addr2]</b> sets/gets the start and stop limits of the level 2 loop. hex format. Advanced!</li>
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</ul>
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<ul>
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<li><b>patnloop2 [n]</b> sets/gets the number of cyclesof the level 2 loop (int).</li>
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</ul>
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<ul>
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<li><b>patwait2 [addr]</b> sets/gets the address of the level 2 wait point. hex format. Advanced!</li>
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</ul>
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<ul>
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<li><b>patwaittime2 [n]</b> sets/gets the duration of the waiting of the 2 waiting point in clock cycles (int).</li>
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</ul>
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<ul>
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<li><b>dut_clk [i]</b> sets/gets the signal to be used as a clock for the digital data coming from the device under test. Advanced! </li>
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</ul>
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