Dhanya Thattil 8e1183b76e finally all tests pass

2026-01-16 15:30:46 +01:00

..

bin

finally all tests pass

2026-01-16 15:30:46 +01:00

chip_config_xilinx.txt

remove hardcoded MH02 startup

2026-01-13 11:05:37 +01:00

CMakeLists.txt

added FMC control

2025-11-26 12:16:30 +01:00

enable_clock_pattern.pyat

Xilinxctb/update reg (#1084)

2025-02-18 11:30:51 +01:00

Makefile

added FMC control

2025-11-26 12:16:30 +01:00

readout_pattern.pyat

Xilinxctb/update reg (#1084)

2025-02-18 11:30:51 +01:00

RegisterDefs.h

switch XCTB regDefs to cheby output

2026-01-05 13:53:30 +01:00

reset_chip_xilinx.txt

remove hardcoded MH02 startup

2026-01-13 11:05:37 +01:00

slsDetectorFunctionList.c

finally all tests pass

2026-01-16 15:30:46 +01:00

slsDetectorServer_defs.h

need ot fix ctb tests as well, a lot of refactoring

2026-01-15 17:41:45 +01:00