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Dhanya Thattil 8f07d2a464
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Dev/xilinx set dac rewrite (#1389)
* wip

* wip

* wip. xilinx left

* wip. xilinx

* wip

* wip. compiles

* fixed eiger test

* more fixes

* fixed virtual m3

* fix typos and bugs

* setting power to 0

* set power fixed

* updated server binaries

* minor

* refactoring

* get vchip refactoring

* eiger: unnecessary check for setsettings undefined

* retval pointer for printout

* eiger.wip, mV in boolean

* wip. gotthard2 and m3

* wip. jungfrau

* moench.wip

* compiles.wip

* fix eiger

* m3 fix vthresh

* fix ctband xilinx

* default pwr index = pwr_io

* minor:fn name and highvoltage to local var

* refactor funcs

* minor

* minor

* check dac voltage only for normal dacs and not for power dacs as the dac voltage range is different for ctb and xilinx ctb, also throw for -1 in set for set_dac in client itself. in the server its not clear if its set or get with a -1

* minor

* updated versioning

* review changes: removing validateDACValue and other minor stuff

* binaries in

* wip

* refactored m3 vth

* minor review

* minor review

* m3 serverdac index fix

* minor
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