//define signals and directions (Input, outputs, clocks) #define compTestIN 1 setoutput(compTestIN); #define curON 32 setoutput(curON); #define side_clk 2 setclk(side_clk); #define side_din 3 setoutput(side_din); #define clear_shr 4 setoutput(clear_shr); #define bottom_din 5 setoutput(bottom_din); #define bottom_clk 6 setclk(bottom_clk); #define gHG 7 setoutput(gHG); #define bypassCDS 31 setoutput(bypassCDS); #define ENprechPRE 8 setoutput(ENprechPRE); #define res 9 setoutput(res); #define pulseOFF 30 setoutput(pulseOFF); #define connCDS 27 setoutput(connCDS); #define Dsg_1 24 setoutput(Dsg_1); #define Dsg_2 25 setoutput(Dsg_2); #define Dsg_3 23 setoutput(Dsg_3); #define sto0 10 setoutput(sto0); #define sto1 11 setoutput(sto1); #define sto2 12 setoutput(sto2); #define resCDS 13 setoutput(resCDS); #define prechargeConnect 14 setoutput(prechargeConnect); #define pulse 15 setoutput(pulse); #define PCT_mode 21 setoutput(PCT_mode); #define res_DGS 16 setoutput(res_DGS); #define adc_ena 17 setoutput(adc_ena); #define CLKBIT 18 setclk(CLKBIT); #define adc_sync 63 setoutput(adc_sync); #define PW pw() #define SB(x) setbit(x) #define CB(x) clearbit(x) #define CLOCK clearbit(CLKBIT); pw();setbit(CLKBIT);pw() #define LCLOCK clearbit(CLKBIT); pw();setbit(CLKBIT);pw();clearbit(CLKBIT); pw() #define CLOCKS(x) for (i=0;i