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• e0a48e1e75 implemented proper alignment in reorder function before casting to uint64_t ptr AliceMazzoleni99 2025-03-17 15:39:31 +01:00
• ec4eb1978e merge fix from dev/issue_dont_reorder_digital_data Dhanya Thattil 2025-03-17 15:28:22 +01:00
• 842b376801 fixed rx_dbitreorder cmd line tests Dhanya Thattil 2025-03-17 15:23:02 +01:00
• 13b2cada66 ctb reorder default being true in dataprocessor Dhanya Thattil 2025-03-17 15:20:40 +01:00
• dd6354ff94 Merge branch 'developer' into jf_h5reader vhinger 2025-03-17 12:19:48 +01:00
• 3c2f149c22 Adding patterntools to slsdet (#1142) Erik Fröjdh 2025-03-17 08:46:26 +01:00
• 0a5b5aac4b added unit tests for dataprocessor rearranging functions AliceMazzoleni99 2025-03-14 14:04:55 +01:00
• 18d781c35a Merge branch 'developer' into jf_h5reader vhinger 2025-03-14 12:03:21 +01:00
• 9c111fbeab deal with EuXFEL hdf5 (frames, 16)-size frame index datasets vhinger 2025-03-14 12:02:49 +01:00
• 222d9e4839 debug vhinger 2025-03-13 16:49:55 +01:00
• 9508dd1adc Debug vhinger 2025-03-13 16:14:12 +01:00
• cf62f8cae8 Debug vhinger 2025-03-13 16:10:32 +01:00
• 08c10679e6 Debug vhinger 2025-03-13 16:06:50 +01:00
• 2b68b2158b Debug vhinger 2025-03-13 16:02:24 +01:00
• 6e5b058fc1 merge fix Dhanya Thattil 2025-03-13 13:17:54 +01:00
• ace2b3a938 Merge branch 'dev/issue_dont_reorder_digital_data' into dev/cmd_for_ctb_reorder Dhanya Thattil 2025-03-13 13:16:29 +01:00
• 5a8213024e Merge pull request #1145 from slsdetectorgroup/dev/xilinx_ctb_api Dhanya Thattil 2025-03-13 13:15:04 +01:00
• bd66228b30 minor to check workflow Dhanya Thattil 2025-03-13 11:14:01 +01:00
• 721d296712 Merge branch 'developer' into jf_h5reader vhinger 2025-03-13 11:01:47 +01:00
• 62dd5c8d4e Enforce compiler support for c++17 standard vhinger 2025-03-13 11:01:20 +01:00
• e1c9754cd2 Added test for rx_dbitreorder command Dhanya Thattil 2025-03-12 17:21:05 +01:00
• ff101e19cd added pybind for it Dhanya Thattil 2025-03-12 17:17:40 +01:00
• e8ac048114 ctb: added command 'rx_dbitreorder' that sets a flag in the receiver to set the reorder flag. By default it is 1. Setting to false means 'do not reorder' and to keep what the board spits out, which is that all signals in a sample are grouped together Dhanya Thattil 2025-03-12 17:13:30 +01:00
• 3c79e8d7b2 trailing bits are removed even if reorder false and bitlist empty AliceMazzoleni99 2025-03-12 16:38:18 +01:00
• a74fb2bcd1 added function Reorder AliceMazzoleni99 2025-03-12 16:12:00 +01:00
• 63bb79d727 added first rather generic test for Rearrange Function, could be changed to a parametrized test AliceMazzoleni99 2025-03-12 10:51:18 +01:00
• a295208c12 Merge pull request #1125 from slsdetectorgroup/910/release_notes Dhanya Thattil 2025-03-12 09:29:48 +01:00
• 36a6087e1d Update RELEASE.txt Erik Fröjdh 2025-03-12 08:10:49 +01:00
• 8d87a6ee4e used clang-formating AliceMazzoleni99 2025-03-11 16:32:31 +01:00
• ab01940769 add xilinx ctb api to --versions command Dhanya Thattil 2025-03-11 15:51:46 +01:00
• fb406a7c6c experimental tag on frame syncrhonizer release notes Dhanya Thattil 2025-03-11 15:41:21 +01:00
• 6e4380db43 updated 910 lib versioning dates Dhanya Thattil 2025-03-11 15:25:40 +01:00
• 23aa9c2814 added reorder variable, changed function ArrangeDBitData to support reordering and no reordering. Moved transceiver data such that it is contiguous with rearranged digital data AliceMazzoleni99 2025-03-11 12:07:10 +01:00
• 35c37998f3 tweak file name vhinger 2025-03-11 11:55:53 +01:00
• 903652bb72 added back the binaries that were missing Dhanya Thattil 2025-03-11 11:04:43 +01:00
• 1609706093 minor changes in topic Dhanya Thattil 2025-03-11 10:43:39 +01:00
• 14d2d171bb Merged main to 9.1.0.rc, keeping 9.1.0.rc changes Dhanya Thattil 2025-03-11 10:34:17 +01:00
• dd8452b365 jf firmware dates updated in release notes Dhanya Thattil 2025-03-11 09:40:12 +01:00
• 15a9fb86da Merge pull request #1140 from slsdetectorgroup/910/jf_firmware_dates Dhanya Thattil 2025-03-11 09:36:02 +01:00
• 010f736e80 Merge pull request #1141 from slsdetectorgroup/dev/jf_firmware_dates_1.6_2.6 Dhanya Thattil 2025-03-11 09:35:39 +01:00
• 4dcbcad435 jungfrau server binary for fw 1.6 and 2.6 Dhanya Thattil 2025-03-11 09:34:37 +01:00
• 8f8a92b9c5 jungfrau firmware dates for fw v 1.6 and fw2.6 Dhanya Thattil 2025-03-11 09:29:01 +01:00
• 222d2b3fad updated jf binary for fwv 1.6 and 2.6 Dhanya Thattil 2025-03-11 09:31:05 +01:00
• a57531312f jungfrau firmware dates for fw v 1.6 and fw2.6 Dhanya Thattil 2025-03-11 09:29:01 +01:00
• 9b13ddf6be Merge branch 'developer' into jf_h5reader vhinger 2025-03-10 16:46:42 +01:00
• 49db2fbee7 Fix tiff filename vhinger 2025-03-10 16:46:04 +01:00
• 684eee984d removed CMakeFiles folder. mistakenly added to repo (#1137) Dhanya Thattil 2025-03-10 14:27:08 +01:00
• 85a03a1d72 removed CMakeFiles folder. mistakenly added to repo (#1136) Dhanya Thattil 2025-03-10 14:26:22 +01:00
• 297c3752e3 Dev/remove gotthard i (#1108) Dhanya Thattil 2025-03-10 14:24:33 +01:00
• 670d4dbce4 Merge branch 'developer' into jf_h5reader vhinger 2025-03-10 12:24:33 +01:00
• a0e5304df6 Modify tiff file name vhinger 2025-03-10 12:23:51 +01:00
• fa504e6675 default filepath is now an empty string, SetupWriter will throw an error if path not set (#1133) AliceMazzoleni99 2025-03-10 12:00:22 +01:00
• 2b8fbad47d reduce compiler warnings vhinger 2025-03-07 22:01:44 +01:00
• a095a4ffce Fix double-free vhinger 2025-03-07 21:49:05 +01:00
• d74da4cf04 Fix implicit conversion float->double compiler warning vhinger 2025-03-07 11:48:15 +01:00
• 9321d6d03a add SC to CMake vhinger 2025-03-06 20:32:45 +01:00
• 45a9a74137 Merge branch 'developer' into jf_h5reader vhinger 2025-03-06 17:14:17 +01:00
• bede3003b6 Edit default rank vhinger 2025-03-06 17:06:45 +01:00
• b9b4f1ae35 changed line 66 in docs/conf.py.in to app.add_css_file(filename) (#1131) AliceMazzoleni99 2025-03-06 14:42:17 +01:00
• fc197ed002 changed line 66 in docs/conf.py.in to app.add_css_file(filename) (#1130) AliceMazzoleni99 2025-03-06 14:41:46 +01:00
• 3c2062f23e Dev/m3 default period 0 (#1127) Dhanya Thattil 2025-03-04 16:07:28 +01:00
• a5d242876b m3:default period set to 0, updated serverBin folder as well (#1126) Dhanya Thattil 2025-03-04 16:06:46 +01:00
• 76ce5de89e added release notes for m3 default period Dhanya Thattil 2025-03-04 15:43:45 +01:00
• dbb0dbcbcd release notes Dhanya Thattil 2025-03-04 15:28:09 +01:00
• e7247f1fee formatting Dhanya Thattil 2025-03-04 10:48:13 +01:00
• 905a509a17 update xilinx regs (#1123) Martin Mueller 2025-03-04 10:38:14 +01:00
• 87d40d418e reverted servers of eiger, gotthard, gotthard2, moench and mythen3 as nothing has really changed there other than formatting Dhanya Thattil 2025-03-03 15:30:35 +01:00
• c82712b587 prior release notes Dhanya Thattil 2025-03-03 11:40:29 +01:00
• 9dd1509714 formatting Dhanya Thattil 2025-03-03 11:02:38 +01:00
• b4dc1dde6c patternX to pattern (#1120) Dhanya Thattil 2025-02-27 10:42:21 +01:00
• c8290598db 910: multi ids ignored silently in config file (#1114) Dhanya Thattil 2025-02-27 10:41:31 +01:00
• 964ab19b42 Dev/multi id ignored in config (#1115) Dhanya Thattil 2025-02-27 10:41:17 +01:00
• ce8911de10 when creating the python bindings for Detector class, it should ignore the assignment operators (#1107) Dhanya Thattil 2025-02-26 12:21:06 +01:00
• ff6a2655a2 when creating the python bindings for Detector class, it should ignore the assignment operators (#1106) Dhanya Thattil 2025-02-26 12:20:35 +01:00
• d1e5b0bc42 Dev: udpated help on multi module and multi command help (#1119) Dhanya Thattil 2025-02-26 11:14:15 +01:00
• 7b2e6ae4ab 910: udpated help on multi module and multi command help (#1116) Dhanya Thattil 2025-02-26 11:13:59 +01:00
• 4b3ed22f76 jf binary in, jf: removed check to allow chipv1.0 also to set comp disable time (#1118) Dhanya Thattil 2025-02-24 09:39:19 +01:00
• 706f3a103c jf: removed check to allow chipv1.0 also to set comp disable time (#1117) Dhanya Thattil 2025-02-24 09:38:57 +01:00
• aad1ab0cf4 file from Anna: could be reduce print out in zmq processing when using energy threshold (#1113) Dhanya Thattil 2025-02-21 12:49:33 +01:00
• 5de98b3db0 file from Anna: could be reduce print out in zmq processing when using energy threshold (#1112) Dhanya Thattil 2025-02-21 12:49:18 +01:00
• 117637863d Xilinxctb/update reg (#1084) Dhanya Thattil 2025-02-18 11:30:51 +01:00
• e933a25453 Dev/frame synchronizer (#968) Dhanya Thattil 2025-02-18 11:28:21 +01:00
• 7494e41862 910/frame synchronizer (#1086) Dhanya Thattil 2025-02-18 11:19:00 +01:00
• f1f369b48c dev jf : bunch id decoder and auto comp disable (#1097) Dhanya Thattil 2025-02-18 11:17:38 +01:00
• 7607fdc9a7 910 jf : bunch id decoder and auto comp disable (#1096) Dhanya Thattil 2025-02-18 11:16:11 +01:00
• 1bfffb842d added documentation of order in hostname command in quick start guide, udp header format for row and column values and in command line hostname (#1098) Dhanya Thattil 2025-02-18 11:12:20 +01:00
• 6b149244d3 added documentation of order in hostname command in quick start guide, udp header format for row and column values and in command line hostname (#1099) Dhanya Thattil 2025-02-18 11:11:33 +01:00
• 7c48ae9a49 dont usleep if no transmission delay (#1100) Dhanya Thattil 2025-02-18 11:10:26 +01:00
• 436d180e93 dont usleep if no transmission delay (#1101) Dhanya Thattil 2025-02-18 11:10:06 +01:00
• 0ac52b81b9 wip print patrick_250211 Dhanya Thattil 2025-02-11 12:32:46 +01:00
• 6cbd0b0529 wip print Dhanya Thattil 2025-02-11 12:18:12 +01:00
• 505bf9642f wip Dhanya Thattil 2025-02-11 11:53:07 +01:00
• bf82aeee8d 910/restream stop delay (#1093) Dhanya Thattil 2025-02-11 11:02:32 +01:00
• 84e83bf551 restream stop if stop called, temp solution (#1092) Dhanya Thattil 2025-02-11 09:17:25 +01:00
• 60ce31bb17 removed .str().c_str() (#1089) Dhanya Thattil 2025-02-11 09:15:18 +01:00
• c43a4030a5 removed .str().c_str() (#1090) Dhanya Thattil 2025-02-11 09:14:56 +01:00
• 5fd319725e include <mutex> vhinger 2025-02-10 20:05:13 +01:00
• fb77bc7f1d Rework for mutex safety and RAII compliance vhinger 2025-02-10 20:01:36 +01:00
• 8a5bd21ecc Add constructor printout (debug) vhinger 2025-02-10 19:08:13 +01:00
• cb99aa40cb Adapt main() for storage cell case vhinger 2025-02-10 17:45:05 +01:00