* round CTB clocks to next closest possible value, added freq measurement
* added time for firmware to measrue actual value after frequency change
* add check for backwards compatibility
* change CTB and XCTB clock values to MHz, TODO: units and validation errors
* changed runclk command to use units and float, TODO: dbit, adcclk, why is everything called StringTo ?
* do the same for dbit and adcclk
* added tolerance to exptime, fixed test
* update default values in server defs
* added virtual check in Altera_PLL, update testcases
* change python and pyctbgui to accept and return floating point MHz
* update help and comments
* Dev/ctb clocks fix (#1434)
* introduced new type Hz, typetraits, String conversions, command generation (not yet generated)
* incorrect unit typo
* cmd generation and compiles
* default to MHz, removed space between units for consistency with timers, min and max checks for clks
* in python, but need to change the default to Hz again for clean code and intuition
* allow ints, doubles, implicit conversions
* dont allow raw ints, doubles and implicit conversions
* fixed tests
* added operators for Hz in python
* fix test for min clk for xilinx ctb
* fix test
* fix python tests
* fixed xilinx period and default clks
* test fix
* removed the 3 clock cycle check for ctb and implemented properly the max adc clk frq for altera ctb
* removing 3 clock cycle code from xilinx as well
* formatting
* loadpattern before 3 clk cycles code
* actualtime and measurement time to be implemented in 100ns already in fw
* fix tests
* pyzmq dependency forthe tests
* fixed pyctbgui for freq
* insert tolerance check again
* also added tolerance check for patwaittime
* formatting
* minor: rounding test
* removed Rep redundant in ToString for freq
* intro frequency unit enums, removed unnecessary template behavior for ToString with freq unit, switching from parsing string unit argument to the enum argument for ToString, adding parsing string to unit at CLI boundary
* minor, and binaries
* minor, default clk vals are 0 but set up at detector setup
* get frequency only for that unit
* tolerance process
* missed in previous commit
* some more changes to exptime and validations
* ctb is probably done
* periodleft and delayleft
* fixed xilinx freq conv as well
* fixed m3 bug, binaries
* xilinx: setup also done in stop server so that the clk is not 0
* missed a test marker
* binaries in
* review fixes, simpler validation of timers in ctb and xilinx ctb
* typo fix
* format
* fix tests
---------
Co-authored-by: Martin Mueller <martin.mueller@psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* put back code to obtain adc and dac device indexafter loading device tree and then create folder iio_device_links and create symbolic links there according to device indices found. ln -sf operation not permitted, so folder has to be deleted and created everytime. Also refactored definitions to have all the xilinx name or detector specific stuff out of programbyArm.c
* uncommented waittransceiverreset at startup (should work now) and return of powering off chip at startup (error for transceiver alignment reset)
* updated registerdefs from firmware
* minor prints and updating names from registerdefs
* waittransceiverreset has been fixed in firmware and removing warnign for that, transceiver alignment check for powering off chip is not done in fw (giving a warning and returning ok for now)
* fixing ipchecksum (not done), removed startperiphery, allowing readout command to be allowed for xilinx when acquiring
* changed common.c readADCFromFile to make it more general and move temperature calculation for Eiger out of this function and inside whereever it is called.
* g2 and m2: gethighvoltage was just a variable set in server, it is now moved to a get inside DAC5671 implementation (but not reading a measured value, instead what is set from a file), high voltage variable used inside DAC5671 for virtual servers
* g2: switching off hv (ifrom non zero to zero value) will wait for 10s; powering on chip reconfigures chip; powering off chip unconfigures chip; powering off chip also includes check if hv = 0, if not throw exception; chip configuration checked before acquring; at start up: hv switched off and chip powered on, so does not wait 10s to switch off hv;
* included test to check powering off chip when hv is on should throw an exception
* g2: check if chip configured before acquiring
* nios: read hv value set from file and virtual still goes into DAC5671 for conversions to and fro dac to V, change common readadc to readparameter to generalize, make sethighvoltage into a get and set to catch errors in get as well, g2: if not at startup, remmeber hv value before setting it and after check if value was being switched off (from a non zero value) and wait 10s if it was (10s wait only for switching off from non zero and not at startup)
* gotthard config file path using readlink
* gotthard2
* eiger
* eieger, mnythen3, moench
* binaries in
* moved readlink to a common function
* binaries in
Martin Mueller
maliakal_d