Commit Graph

214 Commits

Author SHA1 Message Date
maliakal_d 5ec5d46c48 Dev/ctb separate dac and power (#1420)
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* not allowing power names for dac names to prevent duplicate names

* wip

* v_abcd commands should be removed to prevent unintentional usage and throw with a suggestion command for dac and power

* binary in

* dacs with power dac names should work and do not take in dac units to avoid ambiguity, test with 0 value for power dacs should fail, to do: implement power commands

* wip: power in client, tests, and fixed server interfaces and ctb implementation, not tested

* wip. client and xilinx todo

* wip: ctb power works, tests left

* fixed some tests

* added vchip check

* python cmds still left. wip

* fixed xilinx. python left

* wip

* wip. xilinx

* fixed powerchip for ctb

* power all returns all

* configtransceiver is removed

* wip python

* wip

* wip

* wip

* wip

* wip

* wip

* wip xilinx

* wip

* wip

* wip

* pybindings

* fix getdacindex and getdacname for normal detectors to throw if random index that doesnt fit to the detector

* wip

* fixed tests

* fixes for python api

* wip

* python: moved powerlist to Ctb

* fixed tests to work for powelist in Ctb

* moved signallist, adclist, slowadc, slowadclist to Ctb

* throw approperiate error when no modules added for powers

* added dac test

* fix dac default names and test for dacs

* ctb dacs, yet to do othe rdacs

* dacs should work now even in tests

* run all tests

* DetectorPowers->NamedPowers in ctb

* comments

* removed unnecessary test code

* removed hard coded dac names in python NamedDacs and NamedPowers

* minor

* minor

* fixed error messages

* changed power to  be able to set DAC directly, using enable and disable methods with enabled to get
2026-04-15 10:33:01 +02:00
Erik Fröjdh a1b8dccdd9 added support for int() for RegisterAddress and RegisterValue (#1414)
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2026-03-05 11:35:21 +01:00
Erik Fröjdh 9f72688b9c Adding offset to RegisterAddress (#1413)
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* implemented + and += for RegisterAddres and tests plus test cleanup
2026-03-05 09:32:21 +01:00
Erik Fröjdh 3f4df445f1 send back the result of the SPI write (#1387)
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2026-02-09 13:50:35 +01:00
Erik Fröjdh 0992c7ae4c Read and write SPI for Xilinx CTB (#1381)
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-readSpi and writeSpi in C++ and Python API
2026-02-05 17:20:47 +01:00
maliakal_d 3dd07bf2be Dev/define cmd (#1312)
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* basic ctb config api for register and bit names

* tests for define and definelist pass. yet to implement using them for reg, setbit, clearbit and getbit

* improved autocomplete for getbit,setbit, clearbit

* validate autocomplete

* definelist has no put

* updating help

* converting char array+int in runtimeerror compiles but throws at runtime.Fixed.Tested for it. Also check if string or int before using getregisterdefinitonbyvalue to see if it threw to call the other function. because both of it can throw and we should differentiate the issues for both

* removed std::vector<std::pair<string,int> to std::map<string, int> for defiitions list

* Dev/define cmd tie bit to reg (#1328)

* strong type

* moved everythign to bit_utils class

* pybindings

* added tests for python

* removed duplicates

* removed bit names in reg

* changed BitPosition to BitAddress

* Using define reg/bit from python (#1344)

* define_bit, define_addr in python. 
* setBit/clearBit takes int or addr

* added example using bits

* split define into 2 commands define_reg and define_bit, definelist into 2: definelist_reg and definelist_bit

* allow string for register and bit names in c++ api

* refactor from github comments

* naming refactoring (getRegisterDefnition to retunr name and address specifically

* added marker for 8 cmd tests connected to define, changed macro to static constexpr

* changed bitPosition from int to uint32_t

* got rid of setbitposition and setaddress, instead overloaded constructor to take in strings so that the conversion from string to bit address members, takes place within the class for easy maintainance in case type changes

* Removing implicit conversions:
RegisterAddresss and RegisterValue: Removed the implicit conversions.
RegisterAddress: Changed member name from address_ to value_ and method as well to value().
RegisterValue: Also added | operator to be able to concatenate with uint32_t. Same in python bindings (but could not find the tests to modify

* Allowed concatenation with other RegisterValue, made them all constexpr

* fix a ctbConfig test

* Maponstack works with integration tests, but need unit tests

* tests on mapstack

* fixed ctb tests and FixedString being initialized with gibberish

* removing parsing from string inside the class RegisterAddress, BitAddress and RegisterValue

* updated python bindings

* fixed bit utils test

* renaming getRegisterDefintiionAddress/Name=>getRegisterAddress/Name and similary for getBitDefinitionAddress/Name

* updated python bindings

* fix tests (format)

* a few python tests added and python bindings corrected

* replaceing str with __str__ for bit.cpp

* repr reimplemented for bit.cpp

* removed make with registerAddress etc

* starting server for tests per session and nor module

* killprocess throws if no process found-> github runs fails, changed to pkill and not throw

* clean shm shouldnt raise, in ci binary not found

* ignoring these tests for CI, which fail on CI because simulators are not generated in CI. This is in another PR, where it should work

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
Co-authored-by: froejdh_e <erik.frojdh@psi.ch>
2026-01-05 15:10:46 +01:00
mazzol_a b90851a855 clang-format 12 2025-11-26 14:15:04 +01:00
mazzol_a 08486b9812 rx_roi also accepts sequence of 2 ints 2025-11-26 13:51:22 +01:00
mazzol_a 925cd55b1c API also allows single sequence for single ROI 2025-11-26 12:23:22 +01:00
mazzol_a ec11ba5a54 added typecaster for slsdefs::ROI and added setter and getter for ROI 2025-11-26 12:23:04 +01:00
maliakal_d fff5fa73be Dev/verify shm (#1276)
Build on RHEL9 / build (push) Failing after 3m41s
Build on RHEL8 / build (push) Failing after 5m10s
* removed verify, update, fixed getUser to be a free function, generated commands, python bindings yet to do

* python bindings

* fixed tests

* minor

* minor

* format
2025-08-23 10:23:27 +02:00
maliakal_d ee27f0bc1b readoutspeed in rx master file and other master file inconsistencies (#1245)
readout speed added to json and h5 master files.
Also fixed master file inconsistencies

Sserver binaries
- update server binaries because readoutspeed needs to be sent to receiver with rx_hostname command

API
- added const to Detector class set/getburstmode

Python
- updated python bindings (burstmode const and roi arguments)

Cmd generation
- added pragma once in Caller.in.h as Caller is included in test files

m3: num channels due to #counters < 3
* workaround for m3 for messed up num channels (client always assumes all counters enabled and adds them to num channels), fix for hdf5

g2: exptime master file inconsistency
- exptime didnt match because of round of when setting burst mode (sets to a different clk divider)
- so updating actual time for all timers (exptime, period, subexptime etc, )  in Module class, get timer values from detector when setting it and then send to receiver to write in master file

ctb image size incorrect:
-  write actual size into master file and not the reserved size (digital reduces depending on dbit list and dbit offset)
- added a calculate ctb image size free function in generalData.h that is used there as well as for the tests.


master file inconsistencies
- refactored master attributes writing using templates
-    names changed to keep it consistent between json and hdf5 master file (Version, Pixels, Exposure Times, GateDelays, Acquisition Period, etc.)
-  datatypes changed to keep it simple where possible: imageSize, dynamicRange, tengiga, quad, readnrows, analog, analogsamples, digital, digitalsamples, dbitreorder, dbitoffset, transceivermask, transeiver, transceiversamples, countermask, gates =>int
- replacing "toString" with arrays, objects etc for eg for scan, rois, etc.
- json header always written (empty dataset or empty brackets)
- hdf5 needs const char* so have to convert strings to it, but taking care that strings exist prior to push_back
- master attributes (redundant string literals->error prone

tests for master file
- suppressed deprecated functions in rapidjson warnings just for the tests
- added slsREceiverSoftware/src to allow access to receiver_defs.h to test binary/hdf5 version
- refactored acquire tests by moving all the acquire tests from individual detector type files to a single one=test-Caller-acquire.cpp
- set some default settings (loadBasicSettings) for a basic acquire at load config part for the test_simulator python scripts. so minimum number of settings for detector to be set for any acquire tests.
- added tests to test master files for json and hdf5= test-Caller-master-attributes.cpp
- added option to add '-m' markers for tests using test_simulator python script
2025-07-25 11:45:26 +02:00
maliakal_d b1c6b4b078 pybind only 1 function for getRxROI 2025-07-03 11:42:24 +02:00
maliakal_d ba02094c4e updated python bindings 2025-06-30 14:43:17 +02:00
maliakal_d e4f329466c wip 2025-06-16 17:25:21 +02:00
Mazzoleni Alice Francesca 9fde62ae30 merged developer into feature and solved merge conflicts 2025-04-09 09:39:47 +02:00
Erik Fröjdh 5ab2c1693e Fixed broken import in typecaster.h (#1181)
Native CMake Build / Configure and build using cmake (push) Failing after 28s
- Fixed the broken import _slsdet --> slsdet._slsdet caused by a previous upgrade
- Added tests that exercises the conversion from python to C++ and from C++ to python
- Python unit tests now run in CI (!)
2025-04-03 12:00:57 +02:00
Erik Fröjdh 3c2f149c22 Adding patterntools to slsdet (#1142)
* added patterntools from mythen3tools
* refactored do use implementation from slsSupportLib
2025-03-17 08:46:26 +01:00
maliakal_d ff101e19cd added pybind for it 2025-03-12 17:31:33 +01:00
maliakal_d 297c3752e3 Dev/remove gotthard i (#1108)
* slsSupportLib done, at receiver rooting out in implementation

* removed from receiver and client

* removed everywhere except gui, python and client(commands.yaml and Detector.h)

* updated python

* fixed autocomplete to print what the issue is if there is one with ToString when running the autocomplete script to generate fixed.json. updated readme.md in generator folder

* formatting

* removed enums for dacs

* udpating autocomplete and generating commands

* removed gotthard from docs and release notes

* removed dac test

* bug from removing g1

* fixed virtual test for xilinx, was minor. so in this PR

* gui done

* binary in merge fix

* formatting and removing enums

* updated fixed and dump.json

* bash autocomplete

* updated doc on command line generation

* removing increments in dac enums for backward compatibility. Not required

* removed ROI from rxParameters  (only in g1), not needed to be backward compatible

* removed the phase shift option from det server staruip
2025-03-10 14:24:33 +01:00
maliakal_d 315d49f8df ctb: patwaittime and exptime (#1076)
* cli: patwaittime also takes time argument, api: patwaitclocks and patwaitinterval, tcp: patwaitinterval is 2 functions for set and get, patwaitclocks remains a single for backward compatibility with -1 for get, server (loadpattern): clks using member names (needs to be refactored). needs tobe discussed what to do with pattern files.

* all tests passed

* fixed test 
* exptime deprecated for ctb and xilinx

* pyctbgui..not there yet

* fixed in pyctbgui

* removed redundant warning for ctb and xilinx exptime in Detector class (already in module class handling all exptime signatures), patwait, patloop and patnloop have to be non inferrable commands because of support for old commands (level as suffix)

* fix formatting error from command line parsing

* fix tests for patwaittime
2025-01-31 16:48:32 +01:00
maliakal_d 6add9aad5d Dev/proper free (#1005)
* first draft of fixing the free function available within the class

* removed class member function freeSharedmemory for both Detector and Module; made the free function freeSharedmemory accessible to python interface; setHostname if there is already a module in shm will recreate the Detector object while freeing shm completely and keeping detsize and intitialchecks (previous commit), sethostname called from DetectorClass in virtual command to have one point of entry (previous commit), testing Module class frees shared memory using free function

* Detector class: added copy and move constructor and assignmentoperators due to explicit destructor (DetectorImpl fwd declared), DetectorImpl class: included ZmqSocket to remove destructor (should not be virtual in any case), Module class: removed explciit destructor to allow compiler generated constructor and operators

* formatting

* minor fix for readme autocomplete

* updated client version date
2024-10-21 16:25:07 +02:00
maliakal_d f43bb8eea4 jf: timing info decoder (#987)
* timing_info_decoder command with options swissfel (default) and shine. added to python, command line generation, autocomplete, tostring, tests.
2024-10-01 11:17:35 +02:00
maliakal_d 5b832cb6aa Jf: Electron collection mode (#983)
* electron collection mode for jungfrau. also removing the config chip when using register command
* collectionMode: HOLE/ELECTRON (enum)
2024-09-30 17:15:22 +02:00
maliakal_d 2dc0963c56 Dev/reg bit change no validate (#970)
- do not validate write reg, setbit and clearbit by default anymore
- --validate will force validation on the bitmask or entire reg
- remove return value for write reg (across server to client, but thankfully not in the Detector class)
- extend validation into writereg, setbit and clearbit for Eiger (always special)
-  need to check python (TODO)
- missed the rx_zmqip implementations in detector.h and python bindings
2024-09-30 16:54:12 +02:00
maliakal_d 33b8e0817e missed the rx_zmqip implementations in detector.h and python bindings (#975) 2024-09-18 13:41:58 +02:00
maliakal_d 3d21bb64c4 Dev/xilinx acq (#901)
* period and exptime(patternwaittime level 0)

* added new regsieterdefs and updated api version and fixedpattern reg

* autogenerate commands

* formatting

* minor

* wip resetflow, readout mode, transceiver mask, transceiver enable

* acquisition, but streaming done bit and busy (exposing + read chip to fifo) not known yet from fw

* programming fpga and device tree done

* most configuration done, need to connect configuretransceiver to client

* stuck at resetting transciever timed out

* minor

* fixed virtual, added chip busyto fifo, streaming busy, set/getnext framenumber

* configuretransceiver from client, added help in client

* make formatt and command generation

* tests for xilinx ctb works

* command generation

* dacs added and tested, power not done

* power added

* added temp_fpga

* binaries in

* ctrlreg is 0 to enable chip=fixed, high dac val = min val= fixed, power regulators in weird order=fixed, device tree could be loaded with dacs before adcs=fixed

* start works

* virtual server sends

* receiver works

* tests

* python function and enum generation, commands generatorn and autocomplete, formatting, tests

* tests fail at start(transceiver not aligned)

* tests passed

* all binaries compiled

* eiger binary in

* added --nomodule cehck for xilinx
2024-02-07 13:23:08 +01:00
maliakal_d dad3dc3e46 3. Dev/voltage to power (#816)
* getVoltageList, getVoltage /set, getMeasuredVoltage, getVoltageNames /set, getVoltageIndex moved to 'Power' as its misleading

* added cstdint and names slowadc,  added division to mV

* changed uV to mV in command line slow adc help. removed all python slowadcs (as it was already implemented as slowadc

---------

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2023-10-02 11:11:28 +02:00
maliakal_d d003a6d8e0 2. Dev/add jf pedestal feature (#807) 2023-09-29 11:25:58 +02:00
maliakal_d 72bec5d62e 1. Dev/update python bindings for port pr (#813)
* updated python bindings for port update from int to uint16_t

* user friendly error message for exception when python arg does not match uint16_t for ports
2023-09-29 11:12:02 +02:00
maliakal_d 71489b7106 2. Set row col (#779)
* set row and column
2023-07-18 15:51:22 +02:00
maliakal_d c628ae2192 1. Ctb transceiver ro (#773)
*  transceiverenable, tsamples, romode for tranceiver and digital_transceiver

* 202 spec instr only for transceiver mode

* removed check for empty in trans readout and clean memory before reading from fifo

* ctb read fifo strobe for all after reading all channels, adding 1us after selecting channel, changing fw date

* updated 10gb transceiver enable

----
* added transceiver (tsamples, romode(transceiver, digital_transceiver), transceiverenable (mask)

* clean memory before reading from fifo (for analog and digital as well)

* read fifo then read strobe (also corresp fw) fixes number of reads (also for analg and digital)-> increases all pipelines by 1

* fixed bug in rearranging digital data in receiver

* fixed bug in streaming size of data after rearranging

* fixed bug in setbit, clearbit,and getbit

* status checks fifo before returning idle (transmitting if data in fifo if transceiver more enabled)

* soem matterhorn specifics that will need to be put into pattern in a month or two. this is temporary.

* NOTE: breaking api. rxParameters struct has transceiverenabel and tsamples given from det to receiver
2023-07-14 16:29:21 +02:00
maliakal_d 054e733cd5 Voltage and slow adc naming (#772)
* voltages in python 

* added voltage values in cmd line, added voltagelist in detector class

* voltage values in python

* slow adc list
2023-07-10 16:10:23 +02:00
maliakal_d 58cdb5bd20 added patfname command to save the file the last pttern was loaded from (#770)
* added patfname command to save the file the last pttern was loaded from
2023-06-22 09:08:48 +02:00
maliakal_d 1a338346d5 2. Ctb fname voltage (#768)
* power and sense returning dac indices instead of int in Detector class

* power -> voltage, sense -> slowadc
2023-06-19 16:05:30 +02:00
maliakal_d d3d98db7e9 1. Ctb powerindices (#767)
* power and sense returning dac indices instead of int in Detector class
2023-06-19 15:19:50 +02:00
maliakal_d a7dcfe4b31 Ctb sense power signal names (#759)
*  adc names

* added python functions in src

*  signal, power, sense names

* fix tests
2023-06-07 17:06:41 +02:00
maliakal_d b9a346a396 ctb adc names (#757)
* first draft of adc names

* fixed tests

* formatting

* added python functions in src

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-05-31 21:07:07 +02:00
maliakal_d dc5db905d4 merge from 7.0.0 2023-02-24 10:39:51 +01:00
Dhanya Thattil 48a684b95f dev:Eiger febl febr (#601)
* eiger: get febl and febr versions in versions command, also added in python
2023-02-24 10:06:11 +01:00
Dhanya Thattil 9ba907f9f7 added none or 0 to unset bad channels (#632)
* added none or 0 to unset bad channels

* free function split to get int array from string of arguments for badchannels

* missed a file

* allowing list for badchannels in command line

* added badchannels in python

* added size check

* more comments in Detector.h and added more tests for facny command line badchannels

* removeDuplicates accept any container, added tests

* corner cases: 1:5,6,7 or 5,6,7 or just 1:5

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2023-01-27 09:59:31 +01:00
Erik Fröjdh e747a5811f added missing equality operator for DurationWrapper in Python (M3 exptime fix) (#615) 2023-01-16 14:12:12 +01:00
Dhanya Thattil 61c31ed44a txdelay for all modules (#584)
* setting txdelay for all modules for eiger, jungfrau and m3
* added txdelay in python and renamed txndelay_ to txdelay_
* call in parallel
2022-11-24 11:57:26 +01:00
Dhanya Thattil 2ff5291f48 hardware version (#580)
* hardware version for all dets except eiger
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2022-11-24 11:24:05 +01:00
Dhanya Thattil 05f657c106 Versioning (#568)
- removed getClientServerAPIVersion in server (not used)
- removed rxr side (clientversion compatibility check), removed enum as well as it is now done on the client side.
- versionAPI.h
   - GITBRANCH changed to RELEASE
   - dates for all API changed to "sem_version date". Scripts to compile servers modified for this. Empty "branch" name will end up with developer for sem_version.

- Version class with constructor taking in the long version (APILIB date). Other member functions including concise(to get sem_version for new releases and date for old releases), 
  
- bypassing initial tests, also now bypasses the client-rxr compatibility check (at rx_hostname command)

- previously, compatibility between client-det was ensuring both had the same detector API (eg. same APIJUNGFRAU)
   - Now, compatibility only checks APILIB (client side) and detector API(eg. APIJUNGFRAU) (detector side) have same major version. It only does backward compatibility test. Rest is upto user to ensure. 
   - If server is from an older release, it will compare dates like previous implementation (APIJUNGFRAU from both client and det)
 
- - previously, compatibility between client-rxr was ensuring both had the same APIRECEIVER
   - Now, compatibility only checks APILIB (client side) and APIRECEIVER (rxr side) have same major version. It only does backward compatibility test. Rest is upto user to ensure. 
   - If rxr is from an older release, it will compare dates like previous implementation (APIRECEIVER from both client and rxr)

- removed APIGUI, evalVersionVariables.sh, genVersionHeader.sh (not needed or not used)

- clientVersion, rxrversion and detectorserverversion all return strings and not integers (in hex) anymore. Depending if it has semantic versioning, it will print that or the date if it is too old.

- fixed in python (strings for versions)
- check_version function in detector server changed to "initial checks" as it only checks server-firmware compatibility and initial server checks. Client compatibilities are moved to client side.
- --version gives sem_version and date? Is date needed as well. The clientversion, detserverversion and rxrversion API gives only sem_version (no date)
- - formatting
2022-11-09 11:13:09 +01:00
Erik Fröjdh 045a28b5de Nanosecond times in Python (#522)
* initital implementation

* datetime replaces with sls::Duration in Python C bindings

* using custom type caster

* fix for conversion to seconds

* added set_count in python

* common header for pybind11 includes

authored-by: Erik Frojdh <erik.frojdh@psi.ch>
2022-08-26 11:48:40 +02:00
Dhanya Thattil 4638bf7cf8 Jungfrausync (#519)
* jungfrau sync
2022-08-23 10:29:16 +02:00
Dhanya Thattil 8fcec81a67 Pattern 6 levels (#493)
* separating pattern levels from command name: command line done

* separated patten level from command in examples and default pattern files in servers

* command line and server works

* python: patnloop not verified, wip

* works except for patloop (set, and get does not list properly)

* minor

* fixed tests

* added 3 more levels for ctb and moench

* wip

* minor err msg

* minor

* binaries in

* separating pattern levels from command name: command line done

* separated patten level from command in examples and default pattern files in servers

* command line and server works

* python: patnloop not verified, wip

* works except for patloop (set, and get does not list properly)

* minor

* fixed tests

* added 3 more levels for ctb and moench

* wip

* minor err msg

* minor

* binaries in

* python working

* import fix

* changed fw version for ctb and moench. binaries in

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2022-07-14 12:00:07 +02:00
Dhanya Thattil 365ac835eb Get trimbits (#462)
* added the possibility to save settings file for m3 and eiger

* added save trimbits to gui

* update release notes

* python wip

* moved location of trimbits save option in gui

* python works

* updating getModule with all its parameters in the server side

* updating binaries
2022-05-24 11:08:08 +02:00
Dhanya Thattil fcc7f7aef8 Rx roi (#428)
* roi structure expanded to have ymin and ymax

* compile with 'detector roi'

* wip

* wip, rx_roi, rx_clearroi

* wip rxroi

* rxroi wip

* wip rxroi

* merge fix

* wip

* rx_roi works, impl wip, test

* tests in, impl left

* wip, rxroi impl

* wip, rxroi impl

* wip

* setrx_Roi works, getrx_roi, wip

* rx_roi impl done

* wip, rxroi

* wip, getrx_roi rxr ports

* fix ports

* wip

* wip

* fix positions on server side

* wip

* numports wip

* wip

* jungfrau top inner interface row increment

* x, y detpos, wip

* removed eiger row indices flipping in gui (bottom flipping maintained)

* wip

* wip, jungfrau numinterfaces2

* jungfrau virtual works

* eiger, jungfrau, g2 virtual server works

* eiger positions fix, wip

* binaries in

* minor printout

* binaries in

* merge fix

* merge fix

* removing getposition

* setrxroi wip

* set upto port

* get messed, wip

* roi multi to module works, wip

* wip

* roi dont return -1

* added rxroi metadata in master file

* added rxroifromshm, not yet in detector

* rx roi in gui with box, also for gap pixels (gappixels for jungfrau mess)

* fix for segfault in gui with detaching roi box in gui

* wip

* m3 gui: slave timing modes should be discarded when squashing

* fixed m3 virtual data, and fixed counters in gui asthetics

* m3 roi works

* wip, g2

* wip

* handling g225um boards, and showing roi for gainplot as well

* udpate python functions

* fix for 1d and a2d roi written

* fixed actual roi written to file

* no virtual hdf5 when handling rx roi

* test

* minor

* binarie in
2022-05-16 12:35:06 +02:00