Dhanya Maliakal
|
cce41969f9
|
made only master set high voltage, others dont complain. also updated version file
|
2016-06-13 19:05:53 +02:00 |
|
Dhanya Maliakal
|
8202e4aa0a
|
git rev in
|
2015-06-29 16:56:34 +02:00 |
|
Dhanya Maliakal
|
861753a5d1
|
formatted changes made by Martin, which inclded resolving fifo full problem, first frame problem; 32 bit mode sub frame and 16 byte ignore
|
2015-06-16 11:59:07 +02:00 |
|
Maliakal Dhanya
|
193c62dc42
|
updating version numbers
|
2014-12-08 10:20:09 +01:00 |
|
Maliakal Dhanya
|
dd8f48929c
|
the version given to esrf
|
2014-10-16 14:14:00 +02:00 |
|
Maliakal Dhanya
|
62464441ee
|
vtrimbit size and vthreshold common for eiger
|
2014-09-09 17:00:26 +02:00 |
|
Maliakal Dhanya
|
c5a4f357bf
|
got rid of extra servers for eiger, converted to c and it works
|
2014-08-29 16:41:19 +02:00 |
|
Maliakal Dhanya
|
73ba765647
|
git version history
|
2014-06-03 13:55:41 +02:00 |
|
Maliakal Dhanya
|
35035405a0
|
git version history
|
2014-06-03 12:26:45 +02:00 |
|