199 Commits

Author	SHA1	Message	Date
maliakal_d	20deeb8dcc	wip	2021-09-03 13:17:27 +02:00
maliakal_d	a51deda2a4	moduleid for eiger m3 and g2, but set only for g2	2021-09-01 17:06:34 +02:00
maliakal_d	25d03f949e	partialread changed to readnrows	2021-08-31 16:46:49 +02:00
maliakal_d	b75b9fa3b7	eiger round robin	2021-08-26 16:29:36 +02:00
maliakal_d	1d989637e9	udp_firstdst for jungfrau	2021-08-25 14:27:06 +02:00
maliakal_d	485b54994c	jungfrau: connected number of destinations	2021-08-20 17:33:35 +02:00
maliakal_d	ab59f7db7b	added udp_numdst	2021-08-19 15:50:02 +02:00
maliakal_d	f8d8fcf48a	wipg	2021-08-18 19:05:05 +02:00
maliakal_d	c4c16ad9c0	wip	2021-08-17 14:05:59 +02:00
maliakal_d	24f012e6c7	jungfrau: cannot set partial readout while acquiring	2021-08-17 09:53:34 +02:00
maliakal_d	5790e4961b	wip	2021-08-13 17:10:46 +02:00
maliakal_d	62d697e91f	readnlines->partialread, better debugging for TCP socket interface bug	2021-08-13 12:34:50 +02:00
maliakal_d	200df88dcf	module id instead of serial number	2021-08-12 11:16:10 +02:00
maliakal_d	ff9eaaf3f3	serialnumber fixed to point to mod id reg	2021-08-11 19:30:25 +02:00
maliakal_d	6f54402aba	g2: setting serialnumber allowed	2021-08-11 18:50:49 +02:00
maliakal_d	9a777b13bb	g2: dbitpipeline	2021-08-11 18:01:28 +02:00
maliakal_d	7a76064223	vetoalg added hits and raw	2021-08-11 16:08:32 +02:00
maliakal_d	fce35e35a1	wip	2021-08-10 17:26:26 +02:00
maliakal_d	dd3f2db3c5	binaries in, merge fix	2021-08-06 16:18:28 +02:00
maliakal_d	4986a5e61a	Merge branch 'j13flippeddatax' into j7filter	2021-08-06 16:16:46 +02:00
maliakal_d	e62fc1907f	binaries in, merge fix	2021-08-06 16:16:25 +02:00
maliakal_d	cc3aede979	merge fix	2021-08-06 16:11:58 +02:00
maliakal_d	2c53a134cd	updated i3gbe to lll	2021-08-06 16:08:07 +02:00
maliakal_d	2934ccbf2c	filter cell (only chipv1.1)	2021-08-06 14:42:41 +02:00
maliakal_d	86126c7e27	filter resistor in	2021-08-05 16:56:53 +02:00
maliakal_d	619f3b71c1	flippeddataoverxaxis changed to flipRows	2021-08-05 14:44:25 +02:00
maliakal_d	c5d6dd0dd4	flippeddatax for jungfrau server	2021-08-05 12:39:04 +02:00
maliakal_d	e20022f139	jungfrau: settings should not be validated to undefined when special dacs are set individually	2021-08-03 14:51:00 +02:00
maliakal_d	9c4ecf0506	jungfrau: comp disable time	2021-08-03 13:12:58 +02:00
maliakal_d	9ed3a294ce	jungfrau: gainmode	2021-08-02 12:44:57 +02:00
maliakal_d	d64df39301	storagecells for jungfrauvchip1.1: cannot set addl, storagecelldealy and storagecell start is only from 0-3	2021-07-30 15:32:36 +02:00
maliakal_d	9c03e83ef1	reset default dacs	2021-07-29 16:34:38 +02:00
maliakal_d	e5b17fb8e2	wip	2021-07-29 12:45:05 +02:00
maliakal_d	d9ff946b1d	jungfrau: special dacs have defined values for settings. getsettings give undefined if different values for special dacs	2021-07-28 16:44:57 +02:00
maliakal_d	61a99c70df	j: configurechip	2021-07-23 14:08:20 +02:00
maliakal_d	cb293f9945	j: 1. chipversion	2021-07-22 16:48:35 +02:00
maliakal_d	05b7e0ef42	conflict merge fix	2021-07-22 11:53:00 +02:00
maliakal_d	da996314e7	merge conflict	2021-07-22 11:15:57 +02:00
maliakal_d	8ba37e99a7	added enum left right top bottom	2021-07-21 09:25:27 +02:00
maliakal_d	ec7ba7c508	wip to change to enum for portposition	2021-07-20 16:05:08 +02:00
maliakal_d	e02493d4e4	veotalg for g2	2021-07-20 14:57:31 +02:00
maliakal_d	780d4bfe0a	gotthard2: vetostream (detector: only 3gbe, 10gbe via numudpinterfaces)	2021-07-15 16:21:17 +02:00
maliakal_d	cbdb05a3a8	wip	2021-07-01 15:11:22 +02:00
maliakal_d	18fe63f594	wip	2021-06-28 13:32:44 +02:00
maliakal_d	755738a42e	wip	2021-06-22 20:50:50 +02:00
maliakal_d	137b0cc288	merge from developer	2021-06-21 16:34:42 +02:00
maliakal_d	5ca4c7f943	merged from developer	2021-06-21 16:32:36 +02:00
maliakal_d	9c19fc3272	wip	2021-06-21 13:39:20 +02:00
maliakal_d	789d0df81c	wip	2021-06-21 12:31:35 +02:00
maliakal_d	665a3be6d8	wip	2021-06-18 19:38:47 +02:00