* added fetch fmt server library
* added first draft of matterhorn
* added cpp TCP Interface to slsDetectorServer
* bug: added std::signal for proper handling of ctr+c
* added compile option to set log level
* WIP
* dont use c project settings when building matterhornserver
* updated logger
* WIP
* WIP
* linked fmt to slsProjectOptions
* solved merge conflict
* some refactoring
* cleaned up logs
* WIP
* generated register defs from csv file
* oops given in hex
* properly added fmt as a dependency
* some format changes
* WIP
* used CRTP for virtual detector
* WIP
* added udp functions to matterhornserver
* fixed build
* added Server class usable for all detectors
* removed stopserver
* added some more functions
* wrong overload
* porper cleanup of matterhorn app
* PR Review
* refactored directory structure
* added shared memory for aqcuisition status
* implemented bus read and write
* added Matterhorn data class
* modified memory model
* added SPI communication
* moved memory for Bus communication to BucCommunication class
* WIP added HelperFunction for mask conversion
* completed HelperFunctions
* added tests for MatterHorn Helper Functions
* removed shared memory in destructor
* fixed SPI communication
* moved SharedMemory to slsSupportLib
* added toolchain file for cross compilation
* fix constructor for HarwareSPICommunication is public
* update receiver parameters function
* updated mac address
* uploaded matterhorn server binary tracked as lfs
* small fixes from tests on board
* automatically update matterhorn api version when cross compiling binaries
* fix bug in SPI read
* copy to server_directory/bin when cross compiling
* fixed cmake list
* update generate_registerdefs.py
* fixed copy of server binary
* always return error message
* add error log when opening dev/mem
* code review
* fixed eiger, mythen tests for dynamic range
* second Review
* member function getDerived for better readability
* split code into implementation class and actual class doing tcp communication
* added slsWarnings and c++17 compiler option
* added git lfs to workflow
* fix gitea workflows
* bug: add extra clock register
* implement initial checks
* bug: client excpetcs 4 bytes
* refactoring directory structure and rename to .hpp
* check if detector already set up
* missed .h to .hpp
* Code Review 3
* use temmplate value for stopserver
* use internal CMAKE_CROSSCOMPILING variable
* moved boolean stop server flag to DetectorImpl - moving template parameter up
* missed a file
* replace baseclass:: with this
* add Matterhorn server in github workflow
* whatever workflow bug- lets see
* fixed receiving trim bits changed to int64_t
- changed
- command from `datastream` to `udp_datastream` to be more specific
- Detector API:
- setNumberofUDPInterfaces(pos) =>setNumberofUDPInterfaces() # no position anymore
- getDataStream(portPosition, pos) =>getUDPDataStream(portPosition, pos)
- setDataStream(portPosition, pos) => setUDPDataStream(portPosition) # no position anymore
- modified the dataprocessing thread:
- if gui or call back, start zmq processing (connecting sockets) before starting receiver (disabled ports sends dummy that the client zmq sockets are not ready for)
- if only progress, starting progress processing thread after startReceiver
-
- added
- Detector API:
- getRxDisabledUDPPortIndices()
- getPortPositionList()
- allow disabling/enabling udp interface in receiver for Jungfrua/Moench when both udp interfaces is enabled (This is to go fast, where only one half of the module matters)
- write ports type and disabled ports to master file (tests for it as well)
- tests for python commands as well
- datastream command to deprecated commands
- refactored tests to make the new parameters fit
* first draft of disabling data port at the receiver side. Todo: master file and stream for gui to use
* updated help in command
* formatting
* md5 unchanged
* fix test, check port position for detector type
* wip, udp port enable metadata in client, to:receiver, zmq streaming
* wip, master attributes
* wip, imple=> save only disabled ports with port index, 1 interface, is empty
* works in file. still needs refactoring
* updated writer versions
* udp ports type pass, disabled with api yet
* fixed disabled ports meta data as well
* fixed in developer via other PR
* renamed.more intuitive
* fix in gui that wont wait for disabled ports
* added tests for master file
* extra tests
* move the master fiel tests into its own tests with the disable marker for github tests
* refactoring
* python test
* more intuitive and doc
* release notes
* example for python
* back to before
* minor documentation fix and sending nports unnecessarily for getRxUDPPortDisableMetadata
* doc
* review fixes, 1. using std::array instead of vector, 2. moving udp_datastream command testing with different values into master attributes testing file because we test the master file
* minor
* review: update help
* progress printed before assigned
* try catch inside hdf5
* auto generated code for CLI and formatting
* missing packets should not be checked at github workflow level
* formatting
* improved python doc for udp_datastream help
* indent doc python done
* not allowing power names for dac names to prevent duplicate names
* wip
* v_abcd commands should be removed to prevent unintentional usage and throw with a suggestion command for dac and power
* binary in
* dacs with power dac names should work and do not take in dac units to avoid ambiguity, test with 0 value for power dacs should fail, to do: implement power commands
* wip: power in client, tests, and fixed server interfaces and ctb implementation, not tested
* wip. client and xilinx todo
* wip: ctb power works, tests left
* fixed some tests
* added vchip check
* python cmds still left. wip
* fixed xilinx. python left
* wip
* wip. xilinx
* fixed powerchip for ctb
* power all returns all
* configtransceiver is removed
* wip python
* wip
* wip
* wip
* wip
* wip
* wip
* wip xilinx
* wip
* wip
* wip
* pybindings
* fix getdacindex and getdacname for normal detectors to throw if random index that doesnt fit to the detector
* wip
* fixed tests
* fixes for python api
* wip
* python: moved powerlist to Ctb
* fixed tests to work for powelist in Ctb
* moved signallist, adclist, slowadc, slowadclist to Ctb
* throw approperiate error when no modules added for powers
* added dac test
* fix dac default names and test for dacs
* ctb dacs, yet to do othe rdacs
* dacs should work now even in tests
* run all tests
* DetectorPowers->NamedPowers in ctb
* comments
* removed unnecessary test code
* removed hard coded dac names in python NamedDacs and NamedPowers
* minor
* minor
* fixed error messages
* changed power to be able to set DAC directly, using enable and disable methods with enabled to get
* basic ctb config api for register and bit names
* tests for define and definelist pass. yet to implement using them for reg, setbit, clearbit and getbit
* improved autocomplete for getbit,setbit, clearbit
* validate autocomplete
* definelist has no put
* updating help
* converting char array+int in runtimeerror compiles but throws at runtime.Fixed.Tested for it. Also check if string or int before using getregisterdefinitonbyvalue to see if it threw to call the other function. because both of it can throw and we should differentiate the issues for both
* removed std::vector<std::pair<string,int> to std::map<string, int> for defiitions list
* Dev/define cmd tie bit to reg (#1328)
* strong type
* moved everythign to bit_utils class
* pybindings
* added tests for python
* removed duplicates
* removed bit names in reg
* changed BitPosition to BitAddress
* Using define reg/bit from python (#1344)
* define_bit, define_addr in python.
* setBit/clearBit takes int or addr
* added example using bits
* split define into 2 commands define_reg and define_bit, definelist into 2: definelist_reg and definelist_bit
* allow string for register and bit names in c++ api
* refactor from github comments
* naming refactoring (getRegisterDefnition to retunr name and address specifically
* added marker for 8 cmd tests connected to define, changed macro to static constexpr
* changed bitPosition from int to uint32_t
* got rid of setbitposition and setaddress, instead overloaded constructor to take in strings so that the conversion from string to bit address members, takes place within the class for easy maintainance in case type changes
* Removing implicit conversions:
RegisterAddresss and RegisterValue: Removed the implicit conversions.
RegisterAddress: Changed member name from address_ to value_ and method as well to value().
RegisterValue: Also added | operator to be able to concatenate with uint32_t. Same in python bindings (but could not find the tests to modify
* Allowed concatenation with other RegisterValue, made them all constexpr
* fix a ctbConfig test
* Maponstack works with integration tests, but need unit tests
* tests on mapstack
* fixed ctb tests and FixedString being initialized with gibberish
* removing parsing from string inside the class RegisterAddress, BitAddress and RegisterValue
* updated python bindings
* fixed bit utils test
* renaming getRegisterDefintiionAddress/Name=>getRegisterAddress/Name and similary for getBitDefinitionAddress/Name
* updated python bindings
* fix tests (format)
* a few python tests added and python bindings corrected
* replaceing str with __str__ for bit.cpp
* repr reimplemented for bit.cpp
* removed make with registerAddress etc
* starting server for tests per session and nor module
* killprocess throws if no process found-> github runs fails, changed to pkill and not throw
* clean shm shouldnt raise, in ci binary not found
* ignoring these tests for CI, which fail on CI because simulators are not generated in CI. This is in another PR, where it should work
---------
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
Co-authored-by: froejdh_e <erik.frojdh@psi.ch>
* removed verify, update, fixed getUser to be a free function, generated commands, python bindings yet to do
* python bindings
* fixed tests
* minor
* minor
* format
* freeing obsolete shm withoua a 'isValid' should access raw pointers. Need to move this all into the shm class
* fixed obsolete shm free issue
* minor
* ensuring the test works platform independent for size of int
* added a 'isValid' member in shared memory (also updated shm version) with default true, any access to shared memory() checks also for validity. any free will set this to false and then unmap shm. Any access to shm will then check validity in python.
* fixed tests for shm
* added tests in python as well
---------
Co-authored-by: Alice <alice.mazzoleni@psi.ch>
* first draft of fixing the free function available within the class
* removed class member function freeSharedmemory for both Detector and Module; made the free function freeSharedmemory accessible to python interface; setHostname if there is already a module in shm will recreate the Detector object while freeing shm completely and keeping detsize and intitialchecks (previous commit), sethostname called from DetectorClass in virtual command to have one point of entry (previous commit), testing Module class frees shared memory using free function
* Detector class: added copy and move constructor and assignmentoperators due to explicit destructor (DetectorImpl fwd declared), DetectorImpl class: included ZmqSocket to remove destructor (should not be virtual in any case), Module class: removed explciit destructor to allow compiler generated constructor and operators
* formatting
* minor fix for readme autocomplete
* updated client version date
* getVoltageList, getVoltage /set, getMeasuredVoltage, getVoltageNames /set, getVoltageIndex moved to 'Power' as its misleading
* added cstdint and names slowadc, added division to mV
* changed uV to mV in command line slow adc help. removed all python slowadcs (as it was already implemented as slowadc
---------
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
* merge fix from #721 PR (sync) 7.0.2.rc -> developer
* row and column for jungfrau mixed up
* multi module jungfrau sync must do slaves first then master for start acquisition and send software trigger, and master first and then slaves for stopacquisition
* non blocking to slaves first and only then blocking/nonblocking to the master for sending software trigger(jungfrau multi mod sync)
* fixed get/set timing jungfrau when sync enabled, getsync during blocking acquire (for trigger or stop) will get stuck as it should ask the stop server
* switching between 1 and 2 interfaces did not set gui/client zmq port properly. Resulted in dummy streaming forever. fixed
* formatting, refactoring: const & for positions, multi mod M3 stop first master first
* adding missing cstdint for gcc 13
* Refactoring handle sync out, handling synchronization also for softwaretrigger for m3, for start/sync/stop for g2/g1
---------
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
* fixed row and col for moench 2 interfaces
* fix moench getTiming and also allow moench to handle sync
---------
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
* rx_hostname and port combo to one, or hostname to all, or a vector of hostnames and ports, ignoring none or empty, then verifying no duplicates for the host port combo including from shared memory
* extracted function for rx_hostname (#694)
* c++14 revert
* unique hostname-port combo for port, hostname, rx_tcpport (#696)
* verify unique combo for rx_port as well
* check unique hostname-port combo also when setting control port, hostname, rx_hostname and rx_tcpport
---------
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
Co-authored-by: Erik Frojdh <erik.frojdh@psi.ch>
* modified ZmqSocket to expose the SO_RCVBUF and SO_SENDBUF parameters. Modified DataStreamer.cpp to change the SENDBUF to 1MB when HWL is <10. Modified Datastreamer.cpp so that when HWL is changed, socket is unbind/rebind. Added rebind to ZmqSocket.cpp.
Changed slot UpdatePlot() in qdrawplot.h from privat tto public, added plot->UpdatePlot() after every axis range change, so the plots are updated immediatly and not at the next image.
Added onlinedisp_zmq program which connects to the receiver ZMQ port and show images and histos. Compiled against ROOT 6.22/02. Added examples files.
* added setbuffer size also for gui, moved hardcoded values to a macro, removed unnecessary return of ok or success, added actual zmq exception message to could not create sockets error
* zmq: changing buffer size done within hwm
---------
Co-authored-by: mozzanica <l_mozzanica@mpc2012.psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* added none or 0 to unset bad channels
* free function split to get int array from string of arguments for badchannels
* missed a file
* allowing list for badchannels in command line
* added badchannels in python
* added size check
* more comments in Detector.h and added more tests for facny command line badchannels
* removeDuplicates accept any container, added tests
* corner cases: 1:5,6,7 or 5,6,7 or just 1:5
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
* copied jungfrau server to moench and adapted
* fixed image size and num packets
* read n rows allows 16
* commneted out configure_asic_timer at server startup. To be removed later the ASIC_CTRL_REG and storage cell options
* moench:removing the decrement (which was in jf) in read n rows to register
* removed lblsamples from gui
* badchannels for m3 and modify for g2 (file from single and multi)
* m3: invert polarity of bit 7 and 11 signals from setmodule, allow commas in bad channel file
* badchannel file can take commas, colons and comments (also taking care of spaces at the end of channel numbers)
* tests 'badchannels' and 'Channel file reading' added, removing duplicates in badchannel list, defining macro for num counters in client side
* fix segfault when list from file is empty,
* fix tests assertion for ctbconfig (adding message) for c++11
* fixed badchannels in m3server (clocking in trimming)
* badchannel tests can be run from any folder (finds the file)
* roi structure expanded to have ymin and ymax
* compile with 'detector roi'
* wip
* wip, rx_roi, rx_clearroi
* wip rxroi
* rxroi wip
* wip rxroi
* merge fix
* wip
* rx_roi works, impl wip, test
* tests in, impl left
* wip, rxroi impl
* wip, rxroi impl
* wip
* setrx_Roi works, getrx_roi, wip
* rx_roi impl done
* wip, rxroi
* wip, getrx_roi rxr ports
* fix ports
* wip
* wip
* fix positions on server side
* wip
* numports wip
* wip
* jungfrau top inner interface row increment
* x, y detpos, wip
* removed eiger row indices flipping in gui (bottom flipping maintained)
* wip
* wip, jungfrau numinterfaces2
* jungfrau virtual works
* eiger, jungfrau, g2 virtual server works
* eiger positions fix, wip
* binaries in
* minor printout
* binaries in
* merge fix
* merge fix
* removing getposition
* setrxroi wip
* set upto port
* get messed, wip
* roi multi to module works, wip
* wip
* roi dont return -1
* added rxroi metadata in master file
* added rxroifromshm, not yet in detector
* rx roi in gui with box, also for gap pixels (gappixels for jungfrau mess)
* fix for segfault in gui with detaching roi box in gui
* wip
* m3 gui: slave timing modes should be discarded when squashing
* fixed m3 virtual data, and fixed counters in gui asthetics
* m3 roi works
* wip, g2
* wip
* handling g225um boards, and showing roi for gainplot as well
* udpate python functions
* fix for 1d and a2d roi written
* fixed actual roi written to file
* no virtual hdf5 when handling rx roi
* test
* minor
* binarie in
* start acq for master m3 was sent twice (non blocking), removed redundant code, check that there is only one master
* m3 can have more than 1 master (when many master modules used independently)
* fix for singe mod m3 or other dets
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