127 Commits

Author	SHA1	Message	Date
Erik Fröjdh	fa2c842745	New command line app and removing slsDetectorCommand (#69) ... * WIP * WIP * WIP * WIP * config2 working * removed slsDetectorCommand * WIP * added test file * more tests	2019-11-18 09:29:17 +01:00
Dhanya Thattil	6a27207875	gotthard2: vetoref, burstmode	2019-11-15 18:59:27 +01:00
Dhanya Thattil	5518531620	gotthard2: veto reference	2019-11-14 19:01:10 +01:00
Dhanya Thattil	28a5aa8342	injectchannel WIP	2019-11-13 15:11:11 +01:00
Dhanya Thattil	615b3b2557	WIP	2019-11-06 19:07:00 +01:00
Dhanya Thattil	1797d39216	updated mythen3 to configure phase, freq, delay left, period left, actual time, measurement time, framesfrom start and othe register mappings	2019-11-06 18:58:22 +01:00
Dhanya Thattil	1f64d2a4e2	speed separated	2019-11-05 18:50:35 +01:00
Dhanya Thattil	4aba8b6ac0	daclist and dacvalues for ctb as well	2019-10-30 11:38:29 +01:00
Dhanya Thattil	82570bc084	daclist and dacvalues	2019-10-30 11:09:34 +01:00
Dhanya Thattil	798f221764	WIP	2019-10-29 10:07:07 +01:00
Dhanya Thattil	4155e301b8	WIP	2019-10-28 16:48:13 +01:00
Dhanya Thattil	8c279695de	WIP	2019-10-28 16:27:20 +01:00
Dhanya Thattil	3fdae431b0	WIP	2019-10-28 15:47:18 +01:00
Dhanya Thattil	7b59b7e7d5	WIP	2019-10-28 12:26:30 +01:00
Dhanya Thattil	61d7c76d55	WIP	2019-10-28 11:34:58 +01:00
Dhanya Thattil	93bb0c9aed	WIP	2019-10-28 11:17:27 +01:00
Dhanya Thattil	f9d832bf34	WIP	2019-10-24 19:39:58 +02:00
Dhanya Thattil	5a49182626	WIP	2019-10-24 19:20:55 +02:00
Dhanya Thattil	f4a0780b51	patloops done	2019-10-24 18:59:23 +02:00
Dhanya Thattil	f73a15e786	tests made to pass ctb	2019-10-24 11:32:58 +02:00
Dhanya Thattil	fa84d17a19	gotthard tests passed	2019-10-22 17:07:38 +02:00
Dhanya Thattil	8006043a97	bug fixes for tests	2019-10-22 15:46:28 +02:00
Dhanya Thattil	995f0924e5	Commandline (#66) ... * WIP * WIP * removed status to string from defs * WIP * WIP * WIP removed unused functions in multi * WIP * print hex in a terrible way * WIP, loadconfig error * WIP, type to string * WIP * fix to conversion * WIP, hostname doesnt work * WIP * WIP * WIP * WIP, threshold * WIP, threshold * WIP * WIP, triggers * WIP, cycles to triggers * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * rx_udsocksize fx, WIP * WIP * WIP * WIP * file index (64 bit), WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * merge * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * WIP * New python mod	2019-10-21 10:29:06 +02:00
Dhanya Thattil	be50344b45	set clock divider, phase and get clock freq for gotthard2, priliminary	2019-10-17 16:39:41 +02:00
Erik Fröjdh	9a48d9b832	Intcmd (#53) ... * migrated more * more	2019-08-23 17:39:41 +02:00
Erik Frojdh	2c5ff0e9bf	fixed output	2019-08-23 15:44:47 +02:00
Erik Fröjdh	5c06549982	Cleanup of the CmdProxy and migrated some commands (#52) ... * migrated rx_fifodepth * Moved and cleand CmdProxy * rx_slient * new commands * examples * fixed result string print	2019-08-23 14:32:44 +02:00