Dhanya Thattil
de53747ddd
Counters ( #71 )
...
* mythen3: adding counters mask, firmware still takes only number of counters for now
* mythen3: checking if module attached before powering on chip
* bug fix: loop inital declaration not allowed in c
* fix scope eiger test
* mythen3: renamed setCounters to setCounterMask and getCounterMask in API
* mythen3 replacing counting bits with popcount
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2020-01-14 17:40:46 +01:00
af9b25fd67
eiger: validate trimval range
2019-12-10 10:32:28 +01:00
504fc2d095
ctb: validate asampes and dsamples > 0 for romode; client: exception caught in acquire to stop receiver and clear busy flag
2019-12-10 10:25:14 +01:00
3486137de3
bfin warnings fixed
2019-11-27 18:22:33 +01:00
9455a5fba1
ctb: adcenable10g included, 10g readout enables included
2019-11-27 17:28:57 +01:00
c4675da0c3
m3: reset fixed
2019-11-22 16:40:43 +01:00
950096daf9
m3 ang g2: reset not yet imple
2019-11-22 11:54:30 +01:00
d07873ee39
mythen3 and gotthard2: wait request not needed, reset to be implemented
2019-11-22 11:29:24 +01:00
1cea6af590
mythen3, gotthard2: change phase, change freq bugfix
2019-11-19 17:57:28 +01:00
dfc886a65b
mythen3 gui
2019-11-18 17:57:19 +01:00
6a27207875
gotthard2: vetoref, burstmode
2019-11-15 18:59:27 +01:00
5518531620
gotthard2: veto reference
2019-11-14 19:01:10 +01:00
21d23be522
gotthard2: inejct channel done
2019-11-13 16:49:35 +01:00
28a5aa8342
injectchannel WIP
2019-11-13 15:11:11 +01:00
72ac2745ea
gotthard2: server fix enum for onchip dac
2019-11-12 12:11:52 +01:00
90c34e4942
gotthard2, dacs and onchip dacs from config file
2019-11-11 18:02:08 +01:00
bb26b993ea
servers, firmware check message to init message, minor
2019-11-11 12:00:04 +01:00
38ad5d7931
mythen3 rxr
2019-11-08 18:11:27 +01:00
03ec2c53ab
WIP
2019-11-08 17:10:28 +01:00
d7e2ab8ec4
gotthard2: on chip dacs
2019-11-08 17:09:57 +01:00
615b3b2557
WIP
2019-11-06 19:07:00 +01:00
1797d39216
updated mythen3 to configure phase, freq, delay left, period left, actual time, measurement time, framesfrom start and othe register mappings
2019-11-06 18:58:22 +01:00
73b5c3ac57
merge
2019-11-06 16:46:00 +01:00
18b8720c17
separated parameters and versions
2019-11-06 16:43:59 +01:00
Marie Andrae
7de9401bc7
powerchip for mythen3
2019-11-06 11:50:09 +01:00
c3180737ed
fixed jungfau virtual server as well
2019-11-06 11:05:02 +01:00
1f64d2a4e2
speed separated
2019-11-05 18:50:35 +01:00
031241ae28
timer split up
2019-11-04 16:40:11 +01:00
6c5c4f00b3
mythen3 calc checksum
2019-10-31 12:31:51 +01:00
ba9a0c7917
removed unused multi functions
2019-10-30 18:20:16 +01:00
11ea071543
adcinvert for jungfrau, gui for jungfrau dacs
2019-10-30 12:28:51 +01:00
fe467cdf70
jungfrau dacs named
2019-10-29 18:11:16 +01:00
f4a0780b51
patloops done
2019-10-24 18:59:23 +02:00
8006043a97
bug fixes for tests
2019-10-22 15:46:28 +02:00
8c6da7da1b
jungfrau storage cell bug fix
2019-10-22 13:38:17 +02:00
f2fc187f13
better testing for eiger
2019-10-21 15:10:31 +02:00
Dhanya Thattil
995f0924e5
Commandline ( #66 )
...
* WIP
* WIP
* removed status to string from defs
* WIP
* WIP
* WIP removed unused functions in multi
* WIP
* print hex in a terrible way
* WIP, loadconfig error
* WIP, type to string
* WIP
* fix to conversion
* WIP, hostname doesnt work
* WIP
* WIP
* WIP
* WIP, threshold
* WIP, threshold
* WIP
* WIP, triggers
* WIP, cycles to triggers
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* rx_udsocksize fx, WIP
* WIP
* WIP
* WIP
* file index (64 bit), WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* merge
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* New python mod
2019-10-21 10:29:06 +02:00
df4f37efc6
gotthard2, change clock, remember in degrees, and max clock divider is 512
2019-10-17 18:29:57 +02:00
be50344b45
set clock divider, phase and get clock freq for gotthard2, priliminary
2019-10-17 16:39:41 +02:00
cfd3680176
gotthard2 dacs
2019-10-08 17:10:36 +02:00
030cfacc9b
WIP
2019-10-08 10:57:07 +02:00
Marie Andrä
5f94b5c246
Dac ( #67 )
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* dac WIP
* dacs WIP
* DACs are working with names
* namechanges of vrfsh->vshaper, vrfshnpol->vshaperneg
* pattern for MY3, configure MAC for MY3
2019-10-07 12:13:25 +02:00
0f99dd141e
gotthard 2 server test bus
2019-10-01 17:34:52 +02:00
Dhanya Thattil
ca054626e6
Removeudpcache ( #65 )
...
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* solved eiger 1-10g issue
* some fixes for remove udp cache to work
* bug fix virtual
* removed special handling of rx_udpip
2019-09-30 14:46:25 +02:00
Marie Andrä
6e6fcec698
MY3.0:read and write Registers, frames, cycles, delay ( #64 )
...
* MY3.0:read and write Registers, frames, cycles, delay
* write pattern seems to work
* done all corrections. added default clks: run_clk=125MHz, tick_clk=20MHz (fix), sampling_clk=80MHz (from Carlos)
* clk check for aquistition time
* clk check for aquistition time
* Update slsDetectorServer_defs.h
* Update slsDetectorFunctionList.c
2019-09-30 14:36:33 +02:00
288b59d292
gotthard2 changes for first firmware version
2019-09-26 14:10:11 +02:00
Marie Andrä
4b987abf41
Niosmarie ( #63 )
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* HV for Mythen3 server
* HV for mythen3 server
* corrected upstreams
* missing endif
2019-09-03 09:36:02 +02:00
Dhanya Thattil
5bcde789ac
Readoutflags ( #61 )
...
* WIP
* eiger binary back wih versioning
* fixed readout flag in ctbgui, added speedLevel enum
* ctbgui: fixed a print out error
* ctb readout bug fix
* WIP
* WIP
* WIP
2019-09-02 19:27:27 +02:00
02634abbbc
gotthard2:virtual server fix, server recompile
2019-09-02 13:05:28 +02:00
bd95126da2
gotthard2:hv
2019-09-02 12:57:24 +02:00
