* added fetch fmt server library
* added first draft of matterhorn
* added cpp TCP Interface to slsDetectorServer
* bug: added std::signal for proper handling of ctr+c
* added compile option to set log level
* WIP
* dont use c project settings when building matterhornserver
* updated logger
* WIP
* WIP
* linked fmt to slsProjectOptions
* solved merge conflict
* some refactoring
* cleaned up logs
* WIP
* generated register defs from csv file
* oops given in hex
* properly added fmt as a dependency
* some format changes
* WIP
* used CRTP for virtual detector
* WIP
* added udp functions to matterhornserver
* fixed build
* added Server class usable for all detectors
* removed stopserver
* added some more functions
* wrong overload
* porper cleanup of matterhorn app
* PR Review
* refactored directory structure
* added shared memory for aqcuisition status
* implemented bus read and write
* added Matterhorn data class
* modified memory model
* added SPI communication
* moved memory for Bus communication to BucCommunication class
* WIP added HelperFunction for mask conversion
* completed HelperFunctions
* added tests for MatterHorn Helper Functions
* removed shared memory in destructor
* fixed SPI communication
* moved SharedMemory to slsSupportLib
* added toolchain file for cross compilation
* fix constructor for HarwareSPICommunication is public
* update receiver parameters function
* updated mac address
* uploaded matterhorn server binary tracked as lfs
* small fixes from tests on board
* automatically update matterhorn api version when cross compiling binaries
* fix bug in SPI read
* copy to server_directory/bin when cross compiling
* fixed cmake list
* update generate_registerdefs.py
* fixed copy of server binary
* always return error message
* add error log when opening dev/mem
* code review
* fixed eiger, mythen tests for dynamic range
* second Review
* member function getDerived for better readability
* split code into implementation class and actual class doing tcp communication
* added slsWarnings and c++17 compiler option
* added git lfs to workflow
* fix gitea workflows
* bug: add extra clock register
* implement initial checks
* bug: client excpetcs 4 bytes
* refactoring directory structure and rename to .hpp
* check if detector already set up
* missed .h to .hpp
* Code Review 3
* use temmplate value for stopserver
* use internal CMAKE_CROSSCOMPILING variable
* moved boolean stop server flag to DetectorImpl - moving template parameter up
* missed a file
* replace baseclass:: with this
* add Matterhorn server in github workflow
* whatever workflow bug- lets see
* fixed receiving trim bits changed to int64_t
* not allowing power names for dac names to prevent duplicate names
* wip
* v_abcd commands should be removed to prevent unintentional usage and throw with a suggestion command for dac and power
* binary in
* dacs with power dac names should work and do not take in dac units to avoid ambiguity, test with 0 value for power dacs should fail, to do: implement power commands
* wip: power in client, tests, and fixed server interfaces and ctb implementation, not tested
* wip. client and xilinx todo
* wip: ctb power works, tests left
* fixed some tests
* added vchip check
* python cmds still left. wip
* fixed xilinx. python left
* wip
* wip. xilinx
* fixed powerchip for ctb
* power all returns all
* configtransceiver is removed
* wip python
* wip
* wip
* wip
* wip
* wip
* wip
* wip xilinx
* wip
* wip
* wip
* pybindings
* fix getdacindex and getdacname for normal detectors to throw if random index that doesnt fit to the detector
* wip
* fixed tests
* fixes for python api
* wip
* python: moved powerlist to Ctb
* fixed tests to work for powelist in Ctb
* moved signallist, adclist, slowadc, slowadclist to Ctb
* throw approperiate error when no modules added for powers
* added dac test
* fix dac default names and test for dacs
* ctb dacs, yet to do othe rdacs
* dacs should work now even in tests
* run all tests
* DetectorPowers->NamedPowers in ctb
* comments
* removed unnecessary test code
* removed hard coded dac names in python NamedDacs and NamedPowers
* minor
* minor
* fixed error messages
* changed power to be able to set DAC directly, using enable and disable methods with enabled to get
* basic ctb config api for register and bit names
* tests for define and definelist pass. yet to implement using them for reg, setbit, clearbit and getbit
* improved autocomplete for getbit,setbit, clearbit
* validate autocomplete
* definelist has no put
* updating help
* converting char array+int in runtimeerror compiles but throws at runtime.Fixed.Tested for it. Also check if string or int before using getregisterdefinitonbyvalue to see if it threw to call the other function. because both of it can throw and we should differentiate the issues for both
* removed std::vector<std::pair<string,int> to std::map<string, int> for defiitions list
* Dev/define cmd tie bit to reg (#1328)
* strong type
* moved everythign to bit_utils class
* pybindings
* added tests for python
* removed duplicates
* removed bit names in reg
* changed BitPosition to BitAddress
* Using define reg/bit from python (#1344)
* define_bit, define_addr in python.
* setBit/clearBit takes int or addr
* added example using bits
* split define into 2 commands define_reg and define_bit, definelist into 2: definelist_reg and definelist_bit
* allow string for register and bit names in c++ api
* refactor from github comments
* naming refactoring (getRegisterDefnition to retunr name and address specifically
* added marker for 8 cmd tests connected to define, changed macro to static constexpr
* changed bitPosition from int to uint32_t
* got rid of setbitposition and setaddress, instead overloaded constructor to take in strings so that the conversion from string to bit address members, takes place within the class for easy maintainance in case type changes
* Removing implicit conversions:
RegisterAddresss and RegisterValue: Removed the implicit conversions.
RegisterAddress: Changed member name from address_ to value_ and method as well to value().
RegisterValue: Also added | operator to be able to concatenate with uint32_t. Same in python bindings (but could not find the tests to modify
* Allowed concatenation with other RegisterValue, made them all constexpr
* fix a ctbConfig test
* Maponstack works with integration tests, but need unit tests
* tests on mapstack
* fixed ctb tests and FixedString being initialized with gibberish
* removing parsing from string inside the class RegisterAddress, BitAddress and RegisterValue
* updated python bindings
* fixed bit utils test
* renaming getRegisterDefintiionAddress/Name=>getRegisterAddress/Name and similary for getBitDefinitionAddress/Name
* updated python bindings
* fix tests (format)
* a few python tests added and python bindings corrected
* replaceing str with __str__ for bit.cpp
* repr reimplemented for bit.cpp
* removed make with registerAddress etc
* starting server for tests per session and nor module
* killprocess throws if no process found-> github runs fails, changed to pkill and not throw
* clean shm shouldnt raise, in ci binary not found
* ignoring these tests for CI, which fail on CI because simulators are not generated in CI. This is in another PR, where it should work
---------
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
Co-authored-by: froejdh_e <erik.frojdh@psi.ch>
* getVoltageList, getVoltage /set, getMeasuredVoltage, getVoltageNames /set, getVoltageIndex moved to 'Power' as its misleading
* added cstdint and names slowadc, added division to mV
* changed uV to mV in command line slow adc help. removed all python slowadcs (as it was already implemented as slowadc
---------
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
# Setting DAC names for CTB
* Introduced new shared memory for CTB only
* Prepared for additional functionality
* Works from C++ and Python
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
mazzol_aandGitHub
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