369 Commits

Author SHA1 Message Date
1873cc9310
Moench dacs defaults (#788)
* merge fix from 7.0.2: new jungfrau fw versions, incremented binary, hdf5 and json versions

* moench: changed dac names and default values to old moench values

* moench: remove interface clk polarity at start up

* moench: default speed is half speed, default values for adc offset and adc phase for different speeds (only half speed confirmed), adc vref voltage to 2.0 like G1

* moench: connected adc pipeline to client

* moench: receiver- default frames per file is 100k and discard partial frames as default

* moench binary in

* using tostring in gui for dacs

* moved frame discard policy as a parameter to be configured with a default depending on detector

* moench: 300 degrees for adc phase in full speed
2023-07-31 14:02:30 +02:00
71489b7106
2. Set row col (#779)
* set row and column
2023-07-18 15:51:22 +02:00
c628ae2192
1. Ctb transceiver ro (#773)
*  transceiverenable, tsamples, romode for tranceiver and digital_transceiver

* 202 spec instr only for transceiver mode

* removed check for empty in trans readout and clean memory before reading from fifo

* ctb read fifo strobe for all after reading all channels, adding 1us after selecting channel, changing fw date

* updated 10gb transceiver enable

----
* added transceiver (tsamples, romode(transceiver, digital_transceiver), transceiverenable (mask)

* clean memory before reading from fifo (for analog and digital as well)

* read fifo then read strobe (also corresp fw) fixes number of reads (also for analg and digital)-> increases all pipelines by 1

* fixed bug in rearranging digital data in receiver

* fixed bug in streaming size of data after rearranging

* fixed bug in setbit, clearbit,and getbit

* status checks fifo before returning idle (transmitting if data in fifo if transceiver more enabled)

* soem matterhorn specifics that will need to be put into pattern in a month or two. this is temporary.

* NOTE: breaking api. rxParameters struct has transceiverenabel and tsamples given from det to receiver
2023-07-14 16:29:21 +02:00
054e733cd5
Voltage and slow adc naming (#772)
* voltages in python 

* added voltage values in cmd line, added voltagelist in detector class

* voltage values in python

* slow adc list
2023-07-10 16:10:23 +02:00
fe4db54eb6
moench settings (#774)
* moench settings

* default value for asic ctrl reg for moench
2023-07-10 15:21:48 +02:00
5be503c1bd
moench speeds (#776)
* added other speeds and updated readoutspeedlist, test, gui
2023-07-10 15:09:51 +02:00
58cdb5bd20
added patfname command to save the file the last pttern was loaded from (#770)
* added patfname command to save the file the last pttern was loaded from
2023-06-22 09:08:48 +02:00
1a338346d5
2. Ctb fname voltage (#768)
* power and sense returning dac indices instead of int in Detector class

* power -> voltage, sense -> slowadc
2023-06-19 16:05:30 +02:00
d3d98db7e9
1. Ctb powerindices (#767)
* power and sense returning dac indices instead of int in Detector class
2023-06-19 15:19:50 +02:00
d032f43f11 fixing tests to work and powername change bug fix from before 2023-06-14 17:19:37 +02:00
a7dcfe4b31
Ctb sense power signal names (#759)
*  adc names

* added python functions in src

*  signal, power, sense names

* fix tests
2023-06-07 17:06:41 +02:00
b9a346a396
ctb adc names (#757)
* first draft of adc names

* fixed tests

* formatting

* added python functions in src

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-05-31 21:07:07 +02:00
6fcb880538
Merge fix from 7.0.2 (#756)
- start acq list: mixup with master pos #743 : fix that only master starts second and not all (for start acq), typo with pos and masters list
- synced master status running when setting to slave  #747: synced master status running when setting to slave
2023-05-25 11:20:41 +02:00
65b8c9c5c1
Moench rw3 (#745)
* moench, removed chip version, filter resistor, filter cells, currentsoures, gain mode, setttings(modes), dbitphase, maxdbitphase, autocompdisable, comparatordisabletime, made acq start and stop a pulse, removed unused registers

* added parallel command

* remove gain plot for moench

* moench: updated adc invert val

* moench: update adcoffset to 0xf and adcphase to 140 degrees

* removed sync clock in moench

* updated min fw version

* removing config file in moench server
2023-05-25 11:00:23 +02:00
fb25a01db5
Automate virtual test (#714)
* using argparse for parsing command line arguments

* added command line option to specify which servers to run

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-05-11 12:15:22 +02:00
Dhanya Thattil
d23722a4b7
Eiger: add hardware version (#688)
* eiger: hardwareversion, fix firmware version unable to read version scenarios, check to see if febl, febr and beb have same fw version

* feb versions can be picked up only after feb initialization
2023-03-16 11:59:06 +01:00
dc5db905d4 merge from 7.0.0 2023-02-24 10:39:51 +01:00
Dhanya Thattil
276dc52196
dev:removed storage cells for moench (#603)
* removed storage cells for moench
* rxr: also setting moench like jungfrau in implementation of ports
2023-02-24 10:00:31 +01:00
Dhanya Thattil
a74c9498e2
m3, individual chip index back in for hw 1.2, need the linux drivers for chipdac0-9 (#685) 2023-02-23 09:13:31 +01:00
a098bc4674 fixes for tests for m3 2023-02-22 14:34:01 +01:00
Dhanya Thattil
da291d535e
fix ctb test, non blocking will not return for 1g (#684)
* fix ctb test, non blocking will not return for 1g
2023-02-22 11:09:18 +01:00
Dhanya Thattil
b200a2efc1
Fix jf softwre trigger and tests with real jungfrau detector (#673)
* jungfrau: software triggers do not work, fixed

* eiger test: get highvoltage must be read twice to get the real voltage
2023-02-20 15:22:46 +01:00
cb8e4365e3 formatting 2023-02-14 15:08:31 +01:00
Erik Fröjdh
0251aa9e63
fixed linking issue in arping and shm test (#659)
Co-authored-by: Erik Frojdh <erik.frojdh@psi.ch>
2023-02-14 14:49:00 +01:00
Dhanya Thattil
572332f870
fix test for eiger half module for gap pixels (#658) 2023-02-14 09:22:32 +01:00
Dhanya Thattil
e14f6981a0
Fix tests (#647)
* fixes tests
2023-02-09 15:57:05 +01:00
Dhanya Thattil
9ba907f9f7
added none or 0 to unset bad channels (#632)
* added none or 0 to unset bad channels

* free function split to get int array from string of arguments for badchannels

* missed a file

* allowing list for badchannels in command line

* added badchannels in python

* added size check

* more comments in Detector.h and added more tests for facny command line badchannels

* removeDuplicates accept any container, added tests

* corner cases: 1:5,6,7 or 5,6,7 or just 1:5

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2023-01-27 09:59:31 +01:00
Dhanya Thattil
39b1f5bbf2
Moench rewrite (#597)
* copied jungfrau server to moench and adapted

* fixed image size and num packets

* read n rows allows 16

* commneted out configure_asic_timer at server startup. To be removed later the ASIC_CTRL_REG and storage cell options

* moench:removing the decrement (which was in jf)  in read n rows to register

* removed lblsamples from gui
2022-12-15 09:16:51 +01:00
9154478702 formatting 2022-12-08 09:00:23 +01:00
96e107221b Test for moench done 2022-12-06 11:14:42 +01:00
b8b9921914 fix for tests ctb 2022-12-06 11:08:49 +01:00
76d9890eea fix tests for gottthard1 2022-12-06 10:59:33 +01:00
8f68e395bd fix m3 tests 2022-12-06 10:52:33 +01:00
4614e0873a fix to tests m3 2022-12-06 10:34:17 +01:00
bb01f90e1f fix tests to not allow setting veto stream at a single module level 2022-12-06 10:21:45 +01:00
f8a612c0e2 fix tests to not allow setting udp interfaces at a single module level 2022-12-06 10:08:23 +01:00
1cc7d512e0 tests: transmission delay cannot be got for a single module for jf and m3, resetting fpga is not an option to test others 2022-12-05 17:43:01 +01:00
dae07dabf3 fixed tests to get headwareversion number instead of serial number to know ic 2.0 jf boards nd also the set master fail only if more than 1 detector (fix intests only) 2022-12-05 17:07:46 +01:00
c5e0b9def8 fixed tests 2022-12-05 16:36:23 +01:00
964bdf5fc3 fix for changing udp socket buffer size 2022-12-05 13:17:16 +01:00
34a43bcb67 datastream help, versions fix for eiger (hardwareversion not impl), fix for tests 2022-12-05 13:09:52 +01:00
Dhanya Thattil
61c31ed44a
txdelay for all modules (#584)
* setting txdelay for all modules for eiger, jungfrau and m3
* added txdelay in python and renamed txndelay_ to txdelay_
* call in parallel
2022-11-24 11:57:26 +01:00
Dhanya Thattil
2ff5291f48
hardware version (#580)
* hardware version for all dets except eiger
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2022-11-24 11:24:05 +01:00
Dhanya Thattil
911b2f678f
jungfrau module id (#581)
* connected module id to detid_jungfrau.txt
* fixed module id register in jungfrau
2022-11-23 12:01:22 +01:00
Dhanya Thattil
b7cdfbb4d2
Adcvpp (#566)
* added api in detector class for adcvpp, taken out of dac list
2022-10-20 10:58:56 +02:00
Dhanya Thattil
e7879ee365
g2 and m3 round robin (#559)
* g2 and m3: round robin
2022-10-18 15:51:23 +02:00
Dhanya Thattil
46bb9bc2d7
nios temp (#557)
* fixed temp read nios

* divide for eiger and dont print
2022-10-18 15:47:23 +02:00
Dhanya Thattil
7de6f157b5
M3badchannels (#526)
* badchannels for m3 and modify for g2 (file from single and multi)

* m3: invert polarity of bit 7 and 11 signals from setmodule, allow commas in bad channel file

* badchannel file can take commas, colons and comments (also taking care of spaces at the end of channel numbers)

* tests 'badchannels' and 'Channel file reading' added, removing duplicates in badchannel list, defining macro for num counters in client side

* fix segfault when list from file is empty, 

* fix tests assertion for ctbconfig (adding message) for c++11

* fixed badchannels in m3server (clocking in trimming) 

* badchannel tests can be run from any folder (finds the file)
2022-09-01 15:30:04 +02:00
Dhanya Thattil
4638bf7cf8
Jungfrausync (#519)
* jungfrau sync
2022-08-23 10:29:16 +02:00
Dhanya Thattil
809b0bdeb8
Jungfraumaster (#518)
* set jungfrau master only from client
* added tests, fixed a bug in ctb and moench (infinite recursion) that will never happen atm
2022-08-16 09:51:18 +02:00