Commit Graph

585 Commits

Author SHA1 Message Date
maliakal_d 755738a42e wip 2021-06-22 20:50:50 +02:00
maliakal_d 22bcac4c0b gotthard stop server should also know if there is a master for ismaster() to work 2021-06-15 14:59:50 +02:00
maliakal_d bdc3a5f3d9 connect ismaster for eiger and gotthard1 and using ismaster to stop master last for eiger 2021-06-09 17:40:05 +02:00
maliakal_d 45992b28a5 merge fix 2021-06-08 12:29:33 +02:00
maliakal_d 6f54291a84 documentation, wip 2021-06-08 12:14:06 +02:00
maliakal_d 0afe093afc wip 2021-06-04 12:30:59 +02:00
Erik Frojdh c054ad3af3 Merge branch 'my3regs' into developer 2021-04-26 08:39:46 +02:00
brueckner_m d5c10aa3e7 stop command: Support single (half)module stop 2021-04-21 15:40:51 +02:00
Erik Frojdh be5fee8126 M3: fixed gain bits with negative polarity 2021-04-12 16:44:47 +02:00
Erik Frojdh 043d582616 initial implementation 2021-03-29 14:21:48 +02:00
Erik Frojdh 7c4f9ee044 read back of csr 2021-03-26 17:46:11 +01:00
Erik Fröjdh 2f2fe4dd47 Release of 5.1.0 (#237)
* Setting pattern from memory (#218)

* ToString accepts c-style arrays

* fixed patwait time bug in validation

* Introduced pattern class

* compile for servers too

* Python binding for Pattern

* added scanParameters in Python

* slsReceiver: avoid potential memory leak around Implementation::generalData

* additional constructors for scanPrameters in python

* bugfix: avoid potentital memory leak in receiver if called outside constructor context

* added scanParameters in Python

* additional constructors for scanPrameters in python

* M3defaultpattern (#227)

* default pattern for m3 and moench including Python bindings

* M3settings (#228)

* some changes to compile on RH7 and in the server to load the default chip status register at startup

* Updated mythen3DeectorServer_developer executable with correct initialization at startup

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>

* Pattern.h as a public header files (#229)

* fixed buffer overflow but caused by using global instead of local enum

* replacing out of range trimbits with edge values

* replacing dac values that are out of range after interpolation

* updated pybind11 to 2.6.2

* Mythen3 improved synchronization (#231)

Disabling scans for multi module Mythen3, since there is no feedback of the detectors being ready
startDetector first starts the slaves then the master
acquire firs calls startDetector for the slaves then acquire on the master
getMaster to read back from hardware which one is master

* New server for JF to go with the new FW (#232)

* Modified Jungfrau speed settings for HW1.0 - FW fix version 1.1.1, compilation date 210218

* Corrected bug. DBIT clk phase is implemented in both HW version 1.0 and 2.0. Previous version did not update the DBIT phase shift on the configuration of a speed.

* fix for m3 scan with single module

* m3 fw version

* m3 server

* bugfix for bottom when setting quad

* new strategy for finding zmq based on cppzmq



Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
Co-authored-by: Dhanya Thattil <33750417+thattil@users.noreply.github.com>
Co-authored-by: Alejandro Homs Puron <ahoms@esrf.fr>
Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>
Co-authored-by: Xiaoqiang Wang <xiaoqiangwang@gmail.com>
Co-authored-by: lopez_c <carlos.lopez-cuenca@psi.ch>
2021-03-22 14:43:11 +01:00
Erik Fröjdh 10b315c2bd Mythen3 improved synchronization (#231)
Disabling scans for multi module Mythen3, since there is no feedback of the detectors being ready
startDetector first starts the slaves then the master
acquire firs calls startDetector for the slaves then acquire on the master
getMaster to read back from hardware which one is master
2021-02-08 13:28:37 +01:00
Dhanya Thattil f9f50f1d84 M3settings (#228)
* added temp m3 settings files

* renames settings noise to trim

* get threshold for M3

* some changes to compile on RH7 and in the server to load the default chip status register at startup

* Updated mythen3DeectorServer_developer executable with correct initialization at startup

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>
2021-01-14 12:34:13 +01:00
Dhanya Thattil a62e068a9a M3defaultpattern (#227)
* default pattern for m3 and moench including Python bindings

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2020-12-09 13:28:39 +01:00
Erik Frojdh 8c091eece2 WIP 2020-11-27 17:06:07 +01:00
Erik Frojdh d69e238e67 Python binding for Pattern 2020-11-27 17:05:39 +01:00
maliakal_d 69f558c072 constexpr not compiling for rhel7 and warning left 2020-11-27 14:31:43 +01:00
maliakal_d c043e74c07 wIP 2020-11-27 14:08:06 +01:00
maliakal_d d4518b2ca3 WIP 2020-11-27 13:56:57 +01:00
Erik Frojdh d9b2a90651 Introduced pattern class 2020-11-27 10:03:15 +01:00
Dhanya Thattil e63fa1d7c2 Setting pattern from memory (#218)
* ToString accepts c-style arrays

* added patternParameters to python

* fixed patwait time bug in validation

* moved load from file function to patterParameters

* server using patternparamters structure to get pattern

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2020-11-24 20:32:07 +01:00
Dhanya Thattil a6d696a0f8 Nextframenumber (#215) 2020-11-16 17:26:12 +01:00
Dhanya Thattil 4c4e2ccb6b Defaultdacs (#214) 2020-11-13 08:31:02 +01:00
Erik Fröjdh a15d8dd30a Moving headers into include/sls (#212) 2020-11-02 16:05:28 +01:00
Dhanya Thattil 47018b61cd M3readout (#209)
* m3: readout command
2020-10-26 16:13:48 +01:00
maliakal_d 6c1035aa99 zmq hwm are specified to 2 for gui and restreaming of receiver if all zmq not closed at end of acquiistion 2020-10-08 13:01:01 +02:00
maliakal_d 91d688f18c minor doc 2020-10-01 11:47:08 +02:00
Dhanya Thattil fe81963873 rxr: udp socket size max of INT_MAX/2 (#191) 2020-09-25 10:15:39 +02:00
Dhanya Thattil 2c1fddee84 Cmddacs (#189)
Moved dacs to it's own command for command line. 
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2020-09-24 17:16:34 +02:00
Erik Frojdh 0b0f5c94d5 master file no index 2020-09-23 16:28:50 +02:00
maliakal_d d06e0d1e7f wip, doc 2020-09-23 15:07:12 +02:00
maliakal_d 750adffe6a wip, doc 2020-09-23 15:07:03 +02:00
maliakal_d b23410bc5e wip, doc 2020-09-23 14:58:25 +02:00
maliakal_d e786b9f037 wip, doc 2020-09-23 13:15:53 +02:00
maliakal_d bd4299fd15 Wip, doc 2020-09-23 12:32:51 +02:00
maliakal_d a4bdffd0b9 Merge branch 'eigerserverlock' into developer 2020-09-22 18:48:35 +02:00
maliakal_d bb575c6017 wip, doc 2020-09-22 18:39:46 +02:00
maliakal_d 65da9e701b wip, doc 2020-09-21 18:30:33 +02:00
maliakal_d 804ad0997c wip, doc 2020-09-21 18:20:59 +02:00
maliakal_d 4ad486fda0 Merge branch 'developer' into eigerserverlock 2020-09-21 17:28:38 +02:00
maliakal_d a8cc47d25c wip, doc 2020-09-21 17:27:49 +02:00
maliakal_d 54ca9f7ebb wip, doc 2020-09-21 17:09:39 +02:00
maliakal_d 569c014d3c WIP, doc 2020-09-21 11:23:46 +02:00
maliakal_d 0906efaf31 moving temp_fpgafl and temp_fpgafr back to the stop server 2020-09-18 14:09:23 +02:00
Erik Frojdh 6d01348bf4 removed setClockFrequency and added some python commands 2020-09-17 16:03:58 +02:00
maliakal_d 3376f7fa37 wip, doc 2020-09-14 15:39:21 +02:00
maliakal_d f061d2273a wip, doc 2020-09-14 15:18:48 +02:00
maliakal_d 01921bc016 WIp, doc 2020-09-11 16:05:53 +02:00
maliakal_d f644cba244 wip, doc 2020-09-11 15:19:22 +02:00