Commit Graph

15 Commits

Author SHA1 Message Date
6e3acbdf79 Dev/fix actual tests (#1285)
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- fix acquire fail in tests (adcreg test)
- roi tests fail after overlapping invalid test and acquire after
- print udp dest mac in server properly
- fixed udp dst list get (server was not sending entry proper size to match proper struct size in client)
- updated server binaries and updated hard links in serverBin
- added documentation regarding gui:  zmqport and zmqip in terms of gui, rx_zmqstream
- removed print - probably ended there for debuggung

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Co-authored-by: Alice <alice.mazzoleni@psi.ch>
2025-09-04 10:44:32 +02:00
15cbaa509e Dev/shm free obsolete (#1274)
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* freeing obsolete shm withoua a 'isValid' should access raw pointers. Need to move this all into the shm class

* fixed obsolete shm free issue

* minor

* ensuring the test works platform independent for size of int
2025-08-21 14:32:15 +02:00
f594826e95 python accessing freed shared memory object (#1253)
* added a 'isValid' member in shared memory (also updated shm version) with default true, any access to shared memory() checks also for validity. any free will set this to false and then unmap shm. Any access to shm will then check validity in python.

* fixed tests for shm

* added tests in python as well

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Co-authored-by: Alice <alice.mazzoleni@psi.ch>
2025-08-05 11:26:49 +02:00
dad3dc3e46 3. Dev/voltage to power (#816)
* getVoltageList, getVoltage /set, getMeasuredVoltage, getVoltageNames /set, getVoltageIndex moved to 'Power' as its misleading

* added cstdint and names slowadc,  added division to mV

* changed uV to mV in command line slow adc help. removed all python slowadcs (as it was already implemented as slowadc

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Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2023-10-02 11:11:28 +02:00
054e733cd5 Voltage and slow adc naming (#772)
* voltages in python 

* added voltage values in cmd line, added voltagelist in detector class

* voltage values in python

* slow adc list
2023-07-10 16:10:23 +02:00
1a338346d5 2. Ctb fname voltage (#768)
* power and sense returning dac indices instead of int in Detector class

* power -> voltage, sense -> slowadc
2023-06-19 16:05:30 +02:00
d032f43f11 fixing tests to work and powername change bug fix from before 2023-06-14 17:19:37 +02:00
a7dcfe4b31 Ctb sense power signal names (#759)
*  adc names

* added python functions in src

*  signal, power, sense names

* fix tests
2023-06-07 17:06:41 +02:00
b9a346a396 ctb adc names (#757)
* first draft of adc names

* fixed tests

* formatting

* added python functions in src

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Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-05-31 21:07:07 +02:00
Dhanya Thattil
7de6f157b5 M3badchannels (#526)
* badchannels for m3 and modify for g2 (file from single and multi)

* m3: invert polarity of bit 7 and 11 signals from setmodule, allow commas in bad channel file

* badchannel file can take commas, colons and comments (also taking care of spaces at the end of channel numbers)

* tests 'badchannels' and 'Channel file reading' added, removing duplicates in badchannel list, defining macro for num counters in client side

* fix segfault when list from file is empty, 

* fix tests assertion for ctbconfig (adding message) for c++11

* fixed badchannels in m3server (clocking in trimming) 

* badchannel tests can be run from any folder (finds the file)
2022-09-01 15:30:04 +02:00
Dhanya Thattil
6bf9dbf6d3 Format (#506)
Formatted package
2022-08-05 15:39:34 +02:00
Dhanya Thattil
d61741c28b tests add to namespace sls (#466)
* tests add to namespace sls

* fixed for tests

* finish up namespace sls for tests
2022-05-23 16:17:32 +02:00
Dhanya Thattil
8656eeec25 Revert "tests add to namespace sls (#464)" (#465)
This reverts commit f5745fcf18.
2022-05-20 15:43:48 +02:00
Dhanya Thattil
f5745fcf18 tests add to namespace sls (#464) 2022-05-20 15:41:37 +02:00
Erik Fröjdh
1ff35edb99 Setting dac names for CTB (C++ and Python) (#413)
# Setting DAC names for CTB
* Introduced new shared memory for CTB only
* Prepared for additional functionality 
* Works from C++ and Python

Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
2022-03-28 14:27:47 +02:00