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https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 10:07:59 +02:00
jungfrau dacs named
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@ -82,15 +82,15 @@ class slsDetectorDefs {
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Type of the detector
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*/
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enum detectorType {
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GET_DETECTOR_TYPE = -1, /**< the detector will return its type */
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GENERIC, /**< generic sls detector */
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EIGER, /**< eiger */
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GOTTHARD, /**< gotthard */
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JUNGFRAU, /**< jungfrau */
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CHIPTESTBOARD, /**< CTB */
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MOENCH, /**< moench */
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MYTHEN3, /**< mythen3 */
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GOTTHARD2, /** < gotthard2 */
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GET_DETECTOR_TYPE = -1,
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GENERIC,
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EIGER,
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GOTTHARD,
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JUNGFRAU,
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CHIPTESTBOARD,
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MOENCH,
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MYTHEN3,
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GOTTHARD2,
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};
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/**
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@ -379,84 +379,89 @@ format
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detector dacs indexes
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*/
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enum dacIndex {
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THRESHOLD, /**< comparator threshold level */
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CALIBRATION_PULSE, /**< calibration input pulse height */
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TRIMBIT_SIZE, /**< voltage to determine the trimbits LSB */
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PREAMP, /**< preamp feedback */
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SHAPER1, /**< shaper1 feedback */
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SHAPER2, /**< shaper2 feedback */
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TEMPERATURE_ADC, /**< temperature sensor (adc) */
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TEMPERATURE_FPGA, /**< temperature sensor (fpga) */
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G_VREF_DS, /**< gotthard */
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G_VCASCN_PB, /**< gotthard */
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G_VCASCP_PB, /**< gotthard */
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G_VOUT_CM, /**< gotthard */
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G_VCASC_OUT, /**< gotthard */
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G_VIN_CM, /**< gotthard */
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G_VREF_COMP, /**< gotthard */
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G_IB_TESTC, /**< gotthard */
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E_SvP, /**< eiger */
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E_SvN, /**< eiger */
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E_Vtr, /**< eiger */
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E_Vrf, /**< eiger */
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E_Vrs, /**< eiger */
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E_Vtgstv, /**< eiger */
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E_Vcmp_ll, /**< eiger */
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E_Vcmp_lr, /**< eiger */
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E_cal, /**< eiger */
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E_Vcmp_rl, /**< eiger */
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E_Vcmp_rr, /**< eiger */
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E_rxb_rb, /**< eiger */
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E_rxb_lb, /**< eiger */
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E_Vcp, /**< eiger */
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E_Vcn, /**< eiger */
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E_Vis, /**< eiger */
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IO_DELAY, /**< eiger io delay */
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ADC_VPP, /**< adc vpp for jctb */
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HIGH_VOLTAGE, /**< high voltage */
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TEMPERATURE_FPGAEXT, /**< temperature sensor (close to fpga) */
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TEMPERATURE_10GE, /**< temperature sensor (close to 10GE) */
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TEMPERATURE_DCDC, /**< temperature sensor (close to DCDC) */
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TEMPERATURE_SODL, /**< temperature sensor (close to SODL) */
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TEMPERATURE_SODR, /**< temperature sensor (close to SODR) */
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TEMPERATURE_FPGA2, /**< temperature sensor (fpga2 (eiger:febl) */
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TEMPERATURE_FPGA3, /**< temperature sensor (fpga3 (eiger:febr) */
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M_vIpre, /**< mythen 3 >*/
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M_vIinSh, /**< mythen 3 >*/
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M_VdcSh, /**< mythen 3 >*/
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M_Vth2, /**< mythen 3 >*/
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M_VPL, /**< mythen 3 >*/
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M_Vth3, /**< mythen 3 >*/
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M_casSh, /**< mythen 3 >*/
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M_cas, /**< mythen 3 >*/
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M_vIcin, /**< mythen 3 >*/
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M_vIpreOut, /**< mythen 3 >*/
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VREF_H_ADC, /**< gotthard 2 >*/
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VB_COMP_FE, /**< gotthard 2 >*/
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VB_COMP_ADC, /**< gotthard 2 >*/
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VCOM_CDS, /**< gotthard 2 >*/
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VREF_RESTORE, /**< gotthard 2 >*/
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VB_OPA_1ST, /**< gotthard 2 >*/
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VREF_COMP_FE, /**< gotthard 2 >*/
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VCOM_ADC1, /**< gotthard 2 >*/
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VREF_PRECH, /**< gotthard 2 >*/
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VREF_L_ADC, /**< gotthard 2 >*/
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VREF_CDS, /**< gotthard 2 >*/
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VB_CS, /**< gotthard 2 >*/
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VB_OPA_FD, /**< gotthard 2 >*/
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VCOM_ADC2, /**< gotthard 2 >*/
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V_POWER_A = 100, /**new chiptest board */
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V_POWER_B = 101, /**new chiptest board */
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V_POWER_C = 102, /**new chiptest board */
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V_POWER_D = 103, /**new chiptest board */
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V_POWER_IO = 104, /**new chiptest board */
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V_POWER_CHIP = 105, /**new chiptest board */
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I_POWER_A = 106, /**new chiptest board */
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I_POWER_B = 107, /**new chiptest board */
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I_POWER_C = 108, /**new chiptest board */
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I_POWER_D = 109, /**new chiptest board */
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I_POWER_IO = 110, /**new chiptest board */
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V_LIMIT = 111, /**new chiptest board */
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THRESHOLD,
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CALIBRATION_PULSE,
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TRIMBIT_SIZE,
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PREAMP,
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SHAPER1,
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SHAPER2,
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TEMPERATURE_ADC,
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TEMPERATURE_FPGA,
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VREF_DS,
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VCASCN_PB,
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VCASCP_PB,
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VOUT_CM,
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VCASC_OUT,
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VIN_CM,
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VREF_COMP,
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IB_TESTC,
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SVP,
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SVN,
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VTR,
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VRF,
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VRS,
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VTGSTV,
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VCMP_LL,
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VCMP_LR,
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CAL,
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VCMP_RL,
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VCMP_RR,
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RXB_RB,
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RXB_LB,
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VCP,
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VCN,
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VIS,
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IO_DELAY,
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ADC_VPP,
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HIGH_VOLTAGE,
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TEMPERATURE_FPGAEXT,
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TEMPERATURE_10GE,
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TEMPERATURE_DCDC,
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TEMPERATURE_SODL,
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TEMPERATURE_SODR,
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TEMPERATURE_FPGA2,
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TEMPERATURE_FPGA3,
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VIPRE,
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VIINSH,
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VDCSH,
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VTH2,
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VPL,
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VTH3,
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CASSH,
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CAS,
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VICIN,
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VIPRE_OUT,
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VREF_H_ADC,
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VB_COMP_FE,
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VB_COMP_ADC,
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VCOM_CDS,
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VREF_RESTORE,
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VB_OPA_1ST,
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VREF_COMP_FE,
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VCOM_ADC1,
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VREF_PRECH,
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VREF_L_ADC,
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VREF_CDS,
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VB_CS,
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VB_OPA_FD,
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VCOM_ADC2,
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VB_DS,
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VB_COMP,
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VB_PIXBUF,
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VIN_COM,
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VDD_PROT,
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V_POWER_A = 100,
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V_POWER_B = 101,
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V_POWER_C = 102,
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V_POWER_D = 103,
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V_POWER_IO = 104,
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V_POWER_CHIP = 105,
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I_POWER_A = 106,
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I_POWER_B = 107,
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I_POWER_C = 108,
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I_POWER_D = 109,
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I_POWER_IO = 110,
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V_LIMIT = 111,
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SLOW_ADC0 = 1000,
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SLOW_ADC1,
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SLOW_ADC2,
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