This commit is contained in:
2021-08-10 17:26:26 +02:00
parent c716a87935
commit fce35e35a1
17 changed files with 486 additions and 78 deletions

View File

@@ -106,8 +106,8 @@
#define CONFIG_V11_STATUS_STRG_CLL_OFST (12)
#define CONFIG_V11_STATUS_STRG_CLL_MSK (0x0000000F << CONFIG_V11_STATUS_STRG_CLL_OFST)
// CSM mode = high current (100%), low current (16%)
#define CONFIG_V11_STATUS_CRRNT_SRC_MODE_OFST (19)
#define CONFIG_V11_STATUS_CRRNT_SRC_MODE_MSK (0x00000001 << CONFIG_V11_STATUS_CRRNT_SRC_MODE_OFST)
#define CONFIG_V11_STATUS_CRRNT_SRC_LOW_OFST (19)
#define CONFIG_V11_STATUS_CRRNT_SRC_LOW_MSK (0x00000001 << CONFIG_V11_STATUS_CRRNT_SRC_LOW_OFST)
#define CONFIG_V11_STATUS_FLTR_RSSTR_SMLR_OFST (21)
#define CONFIG_V11_STATUS_FLTR_RSSTR_SMLR_MSK (0x00000001 << CONFIG_V11_STATUS_FLTR_RSSTR_SMLR_OFST)
#define CONFIG_V11_STATUS_AUTO_MODE_OVRRD_OFST (23)
@@ -247,8 +247,8 @@
#define CONFIG_V11_STRG_CLL_OFST (12)
#define CONFIG_V11_STRG_CLL_MSK (0x0000000F << CONFIG_V11_STRG_CLL_OFST)
// CSM mode = high current (100%), low current (16%)
#define CONFIG_V11_CRRNT_SRC_MODE_OFST (19)
#define CONFIG_V11_CRRNT_SRC_MODE_MSK (0x00000001 << CONFIG_V11_CRRNT_SRC_MODE_OFST)
#define CONFIG_V11_CRRNT_SRC_LOW_OFST (19)
#define CONFIG_V11_CRRNT_SRC_LOW_MSK (0x00000001 << CONFIG_V11_CRRNT_SRC_LOW_OFST)
#define CONFIG_V11_FLTR_RSSTR_SMLR_OFST (21)
#define CONFIG_V11_FLTR_RSSTR_SMLR_MSK (0x00000001 << CONFIG_V11_FLTR_RSSTR_SMLR_OFST)
#define CONFIG_V11_AUTO_MODE_OVRRD_OFST (23)

View File

@@ -479,6 +479,7 @@ void setupDetector() {
setFilterResistor(DEFAULT_FILTER_RESISTOR);
setFilterCell(DEFAULT_FILTER_CELL);
}
disableCurrentSource();
}
int resetToDefaultDacs(int hardReset) {
@@ -2084,6 +2085,90 @@ void setFilterCell(int iCell) {
LOG(logINFO, ("Setting Filter Cell to %d [Reg:0x%x]\n", iCell, bus_r(addr)));
}
void disableCurrentSource() {
LOG(logINFO, ("Disabling Current Source\n"));
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CRRNT_SRC_ENBL_MSK);
}
void enableCurrentSource(int fix, uint64_t select, int normal) {
if (chipVersion == 11) {
LOG(logINFO, ("Enabling current source [fix:%d, select:%lld]\n", fix,
(long long int)select));
} else {
LOG(logINFO,
("Enabling current source [fix:%d, select:0x%llx, normal:%d]\n",
fix, (long long int)select, normal));
}
disableCurrentSource();
LOG(logINFO, ("\tSetting current source parameters\n"));
// fix
if (fix) {
bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_CRRNT_SRC_CLMN_FIX_MSK);
} else {
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CRRNT_SRC_CLMN_FIX_MSK);
}
if (chipVersion == 10) {
// select
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CRRNT_SRC_CLMN_SLCT_MSK);
bus_w(DAQ_REG,
bus_r(DAQ_REG) | ((select << DAQ_CRRNT_SRC_CLMN_SLCT_OFST) &
DAQ_CRRNT_SRC_CLMN_SLCT_MSK));
} else {
// select
set64BitReg(select, CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
// normal
if (normal) {
bus_w(CONFIG_V11_REG,
bus_r(CONFIG_V11_REG) & ~CONFIG_V11_CRRNT_SRC_LOW_MSK);
} else {
bus_w(CONFIG_V11_REG,
bus_r(CONFIG_V11_REG) | CONFIG_V11_CRRNT_SRC_LOW_MSK);
}
}
// validating before enabling current source
if (getFixCurrentSource() != fix || getSelectCurrentSource() != select) {
LOG(logERROR,
("Could not set fix or select parameters for current source.\n"))
return;
}
// not validating normal because the status register might not update during
// acquisition
// enabling current source
LOG(logINFO, ("Enabling Current Source\n"));
bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_CRRNT_SRC_ENBL_MSK);
}
int getCurrentSource() {
return ((bus_r(DAQ_REG) & DAQ_CRRNT_SRC_ENBL_MSK) >>
DAQ_CRRNT_SRC_ENBL_OFST);
}
int getFixCurrentSource() {
return ((bus_r(DAQ_REG) & DAQ_CRRNT_SRC_CLMN_FIX_MSK) >>
DAQ_CRRNT_SRC_CLMN_FIX_OFST);
}
int getNormalCurrentSource() {
if (getChipVersion() == 11) {
int low = ((bus_r(CONFIG_V11_STATUS_REG) &
CONFIG_V11_STATUS_CRRNT_SRC_LOW_MSK) >>
CONFIG_V11_STATUS_CRRNT_SRC_LOW_OFST);
return (low == 0 ? 1 : 0);
}
return -1;
}
uint64_t getSelectCurrentSource() {
if (chipVersion == 10) {
return ((bus_r(DAQ_REG) & DAQ_CRRNT_SRC_CLMN_SLCT_MSK) >>
DAQ_CRRNT_SRC_CLMN_SLCT_OFST);
} else {
return get64BitReg(CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
}
}
int getTenGigaFlowControl() {
return ((bus_r(CONFIG_REG) & CONFIG_ETHRNT_FLW_CNTRL_MSK) >>
CONFIG_ETHRNT_FLW_CNTRL_OFST);

View File

@@ -123,6 +123,7 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };
#define MAX_STORAGE_CELL_DLY_NS_VAL (ASIC_CTRL_EXPSRE_TMR_MAX_VAL)
#define ACQ_TIME_MIN_CLOCK (2)
#define ASIC_FILTER_MAX_RES_VALUE (1)
#define MAX_SELECT_CHIP10_VAL (63)
#define MAX_PHASE_SHIFTS (240)
#define BIT16_MASK (0xFFFF)