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jungfrau server: changes for old and new boards

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This commit is contained in:
maliakal_d
2019-07-30 09:32:10 +02:00
parent 64a8dd2def
commit facbc60907
8 changed files with 98 additions and 80 deletions
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47
slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h
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@@ -4,7 +4,8 @@
#define MIN_REQRD_VRSN_T_RD_API 0x171220
#define REQRD_FRMWR_VRSN 0x190708
#define REQRD_FRMWRE_VRSN_BOARD2 0x190716
#define REQRD_FRMWRE_VRSN 0x190708
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
@@ -89,23 +90,31 @@ enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G };
#define MAX_STORAGE_CELL_DLY_NS_VAL ((ASIC_CTRL_EXPSRE_TMR_MSK >> ASIC_CTRL_EXPSRE_TMR_OFST) * ASIC_CTRL_EXPSRE_TMR_STEPS)
#define ACQ_TIME_MIN_CLOCK (2)
#define BOARD_VERSION_2_VAL (0x3F)
#define SAMPLE_ADC_FULL_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x300
#define SAMPLE_ADC_HALF_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1610
#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2b30
#define ADC_OFST_FULL_SPEED_VAL (0xF)
#define ADC_OFST_HALF_SPEED_VAL (0xB)
#define ADC_OFST_QUARTER_SPEED_VAL (0x7)
#define ADC_PHASE_FULL_SPEED (0x1E) //30
#define ADC_PHASE_HALF_SPEED (0x1E) //30
#define ADC_PHASE_QUARTER_SPEED (0x1E) //30
#define ADC_PORT_INVERT_VAL (0x5A5A5A5A)//(0x453b2a9c)
#define MAX_PHASE_SHIFTS (160)
#define BIT16_MASK (0xFFFF)
#define UDP_IP_HEADER_LENGTH_BYTES (28)
#define UDP_IP_HEADER_LENGTH_BYTES (28)
#define ADC_OFST_FULL_SPEED_VAL (0xf)
#define ADC_OFST_HALF_SPEED_VAL (0xb)
#define ADC_OFST_QUARTER_SPEED_VAL (0x7)
#define ADC_OFST_HALF_SPEED_BOARD2_VAL (0x13)
#define ADC_OFST_QUARTER_SPEED_BOARD2_VAL (0x0b)
#define ADC_PORT_INVERT_VAL (0x5A5A5A5A)
#define ADC_PORT_INVERT_BOARD2_VAL (0x453b2a9c)
#define SAMPLE_ADC_FULL_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x300
#define SAMPLE_ADC_HALF_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1610
#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2b30
#define SAMPLE_ADC_HALF_SPEED_BOARD2 (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1600
#define SAMPLE_ADC_QUARTER_SPEED_BOARD2 (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2b10
#define ADC_PHASE_FULL_SPEED (0x1E) //30
#define ADC_PHASE_HALF_SPEED (0x1E) //30
#define ADC_PHASE_QUARTER_SPEED (0x1E) //30
#define ADC_PHASE_HALF_SPEED_BOARD2 (0x1E) //30
#define ADC_PHASE_QUARTER_SPEED_BOARD2 (0x1E) //30