mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 10:07:59 +02:00
M3settings (#228)
* added temp m3 settings files * renames settings noise to trim * get threshold for M3 * some changes to compile on RH7 and in the server to load the default chip status register at startup * Updated mythen3DeectorServer_developer executable with correct initialization at startup Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com> Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>
This commit is contained in:
Dhanya Thattil
Binary file not shown.
@ -19,6 +19,9 @@
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#include <time.h>
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#endif
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/// NOT the right place to put it!
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int setChipStatusRegister(int csr);
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// Global variable from slsDetectorServer_funcs
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extern int debugflag;
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extern int updateFlag;
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@ -40,6 +43,7 @@ pthread_t pthread_virtual_tid;
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int64_t virtual_currentFrameNumber = 2;
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#endif
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enum detectorSettings thisSettings;
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sls_detector_module *detectorModules = NULL;
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int *detectorChans = NULL;
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int *detectorDacs = NULL;
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@ -50,8 +54,10 @@ uint32_t clkDivider[NUM_CLOCKS] = {};
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int highvoltage = 0;
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int detPos[2] = {};
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int64_t exptimeReg[3] = {0, 0, 0};
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int64_t gateDelayReg[3] = {0, 0, 0};
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int64_t exptimeReg[NCOUNTERS] = {0, 0, 0};
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int64_t gateDelayReg[NCOUNTERS] = {0, 0, 0};
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int vthEnabledVals[NCOUNTERS] = {0, 0, 0};
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int detID = 0;
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int isInitCheckDone() { return initCheckDone; }
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@ -264,13 +270,29 @@ u_int16_t getHardwareVersionNumber() {
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MCB_SERIAL_NO_VRSN_OFST);
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}
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u_int32_t getDetectorNumber() {
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#ifdef VIRTUAL
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return 0;
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void readDetectorNumber() {
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#ifndef VIRTUAL
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if (initError == FAIL) {
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return;
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}
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FILE *fd = fopen(ID_FILE, "r");
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if (fd == NULL) {
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sprintf(initErrorMessage, "No %s file found.\n", ID_FILE);
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LOG(logERROR, ("%s\n\n", initErrorMessage));
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initError = FAIL;
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return;
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}
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char output[255];
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fgets(output, sizeof(output), fd);
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sscanf(output, "%u", &detID);
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if (isControlServer) {
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LOG(logINFOBLUE, ("Detector ID: %u\n", detID));
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}
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#endif
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return bus_r(MCB_SERIAL_NO_REG);
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}
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u_int32_t getDetectorNumber() { return detID; }
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u_int64_t getDetectorMAC() {
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#ifdef VIRTUAL
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return 0;
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@ -365,17 +387,19 @@ void allocateDetectorStructureMemory() {
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(detectorModules)->reg = UNINITIALIZED;
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(detectorModules)->iodelay = 0;
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(detectorModules)->tau = 0;
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(detectorModules)->eV = 0;
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// thisSettings = UNINITIALIZED;
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(detectorModules)->eV[0] = 0;
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(detectorModules)->eV[1] = 0;
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(detectorModules)->eV[2] = 0;
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thisSettings = UNINITIALIZED;
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// initialize dacs
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for (int idac = 0; idac < (detectorModules)->ndac; ++idac) {
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detectorDacs[idac] = 0;
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}
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// if trimval requested, should return -1 to acknowledge unknown
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// trimbits start at 0 //TODO: restart server will not have 0 always
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for (int ichan = 0; ichan < (detectorModules->nchan); ichan++) {
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*((detectorModules->chanregs) + ichan) = -1;
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*((detectorModules->chanregs) + ichan) = 0;
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}
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}
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@ -439,7 +463,7 @@ void setupDetector() {
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setTiming(DEFAULT_TIMING_MODE);
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setNumIntGates(DEFAULT_INTERNAL_GATES);
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setNumGates(DEFAULT_EXTERNAL_GATES);
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for (int i = 0; i != 3; ++i) {
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for (int i = 0; i != NCOUNTERS; ++i) {
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setExpTime(i, DEFAULT_GATE_WIDTH);
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setGateDelay(i, DEFAULT_GATE_DELAY);
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}
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@ -449,6 +473,11 @@ void setupDetector() {
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#ifdef VIRTUAL
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enableTenGigabitEthernet(0);
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#endif
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readDetectorNumber();
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if (initError == FAIL) {
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return;
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}
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setSettings(DEFAULT_SETTINGS);
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// check module type attached if not in debug mode
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{
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@ -484,8 +513,11 @@ void setupDetector() {
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powerChip(1);
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if (initError != FAIL) {
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initError = loadDefaultPattern(DEFAULT_PATTERN_FILE, initErrorMessage);
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initError = setChipStatusRegister(CSR_default);
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//loadDefaultPattern(DEFAULT_PATTERN_FILE, initErrorMessage);
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//startStateMachine(); //this was missing in previous code! runs the default pattern
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}
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setAllTrimbits(DEFAULT_TRIMBIT_VALUE);
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}
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int setDefaultDacs() {
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@ -693,7 +725,7 @@ int getNumGates() { return bus_r(ASIC_EXP_EXT_GATE_NUMBER_REG); }
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void updateGatePeriod() {
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uint64_t max = 0;
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uint32_t countermask = getCounterMask();
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for (int i = 0; i != 3; ++i) {
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for (int i = 0; i != NCOUNTERS; ++i) {
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// only if counter enabled
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if (countermask & (1 << i)) {
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uint64_t sum = getExpTime(i) + getGateDelay(i);
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@ -880,6 +912,7 @@ void setCounterMask(uint32_t arg) {
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if (arg == 0 || arg > MAX_COUNTER_MSK) {
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return;
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}
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uint32_t oldmask = getCounterMask();
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LOG(logINFO, ("Setting counter mask to 0x%x\n", arg));
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uint32_t addr = CONFIG_REG;
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bus_w(addr, bus_r(addr) & ~CONFIG_COUNTERS_ENA_MSK);
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@ -889,12 +922,21 @@ void setCounterMask(uint32_t arg) {
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updatePacketizing();
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LOG(logINFO, ("\tUpdating Exptime and Gate Delay\n"));
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for (int i = 0; i < 3; ++i) {
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for (int i = 0; i < NCOUNTERS; ++i) {
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uint64_t ns = exptimeReg[i] / (1E-9 * getFrequency(SYSTEM_C0));
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setExpTime(i, ns);
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ns = gateDelayReg[i] / (1E-9 * getFrequency(SYSTEM_C0));
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setGateDelay(i, ns);
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}
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LOG(logINFO, ("\tUpdating Vth dacs\n"));
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for (int i = 0; i < NCOUNTERS; ++i) {
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// if change in enable
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if ((arg & (1 << i)) ^ (oldmask & (1 << i))) {
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// will disable if counter disabled
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setDAC(VTH1, vthEnabledVals[i], 0);
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}
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}
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}
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uint32_t getCounterMask() {
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@ -1014,24 +1056,28 @@ int setModule(sls_detector_module myMod, char *mess) {
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LOG(logINFO, ("Setting module\n"));
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/* future implementation
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// settings (not yet implemented)
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setSettings((enum detectorSettings)myMod.reg);
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// settings
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if (myMod.reg >= 0) {
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setSettings((enum detectorSettings)myMod.reg);
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if (getSettings() != (enum detectorSettings)myMod.reg) {
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sprintf(
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mess,
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"Could not set module. Could not set settings to %d, read %d\n",
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myMod.reg, (int)getSettings());
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LOG(logERROR, (mess));
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return FAIL;
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}
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detectorModules->reg = myMod.reg;
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}
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// threshold
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if (myMod.eV >= 0)
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setThresholdEnergy(myMod.eV);
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// custom trimbit file
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else {
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// (loading a random trim file) (dont return fail)
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setSettings(UNDEFINED);
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LOG(logERROR,
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("Settings has been changed to undefined (random trim
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file)\n"));
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// changed for setsettings (direct),
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// custom trimbit file (setmodule with myMod.reg as -1),
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// change of dac (direct)
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for (int i = 0; i < NCOUNTERS; ++i) {
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setThresholdEnergy(i, -1);
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}
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}
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*/
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// dacs
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for (int i = 0; i < NDAC; ++i) {
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@ -1039,16 +1085,42 @@ int setModule(sls_detector_module myMod, char *mess) {
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if (myMod.dacs[i] != -1) {
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setDAC((enum DACINDEX)i, myMod.dacs[i], 0);
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if (myMod.dacs[i] != detectorDacs[i]) {
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sprintf(mess, "Could not set module. Could not set dac %d\n",
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i);
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// dont complain if that counter was disabled
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if ((i == M_VTH1 || i == M_VTH2 || i == M_VTH3) &&
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(detectorDacs[i] == DEFAULT_COUNTER_DISABLED_VTH_VAL)) {
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continue;
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}
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sprintf(mess,
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"Could not set module. Could not set dac %d, wrote %d, "
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"read %d\n",
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i, myMod.dacs[i], detectorDacs[i]);
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LOG(logERROR, (mess));
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// setSettings(UNDEFINED);
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// LOG(logERROR, ("Settings has been changed to undefined\n"));
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return FAIL;
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}
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}
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}
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// if settings given and cannot be validated (after setting dacs), return
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// error
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if (myMod.reg >= 0) {
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if (getSettings() != (enum detectorSettings)myMod.reg) {
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sprintf(
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mess,
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"Could not set module. The dacs in file do not correspond to "
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"settings %d\n",
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myMod.reg);
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LOG(logERROR, (mess));
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return FAIL;
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}
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}
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// threshold
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for (int i = 0; i < NCOUNTERS; ++i) {
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if (myMod.eV[i] >= 0) {
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setThresholdEnergy(i, myMod.eV[i]);
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}
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}
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// trimbits
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if (myMod.nchan == 0) {
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LOG(logINFO, ("Setting module without trimbits\n"));
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@ -1057,9 +1129,6 @@ int setModule(sls_detector_module myMod, char *mess) {
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if (setTrimbits(myMod.chanregs) == FAIL) {
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sprintf(mess, "Could not set module. Could not set trimbits\n");
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LOG(logERROR, (mess));
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// setSettings(UNDEFINED);
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// LOG(logERROR, ("Settings has been changed to undefined (random "
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// "trim file)\n"));
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return FAIL;
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}
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}
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@ -1239,6 +1308,7 @@ int setTrimbits(int *trimbits) {
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}
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int setAllTrimbits(int val) {
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LOG(logINFO, ("Setting all trimbits to %d\n", val));
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int *trimbits = malloc(sizeof(int) * ((detectorModules)->nchan));
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for (int ichan = 0; ichan < ((detectorModules)->nchan); ++ichan) {
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trimbits[ichan] = val;
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@ -1248,11 +1318,14 @@ int setAllTrimbits(int val) {
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free(trimbits);
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return FAIL;
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}
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// setSettings(UNDEFINED);
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// LOG(logERROR, ("Settings has been changed to undefined (random "
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// "trim file)\n"));
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LOG(logINFO, ("All trimbits have been set to %d\n", val));
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free(trimbits);
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// changed for setsettings (direct),
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// custom trimbit file (setmodule with myMod.reg as -1),
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// change of dac (direct)
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for (int i = 0; i < NCOUNTERS; ++i) {
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setThresholdEnergy(i, -1);
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}
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return OK;
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}
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@ -1270,6 +1343,73 @@ int getAllTrimbits() {
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return value;
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}
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enum detectorSettings setSettings(enum detectorSettings sett) {
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switch (sett) {
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case STANDARD:
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LOG(logINFOBLUE, ("Setting to standard settings\n"));
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thisSettings = sett;
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setDAC(M_VRPREAMP, DEFAULT_STANDARD_VRPREAMP, 0);
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setDAC(M_VRSHAPER, DEFAULT_STANDARD_VRSHAPER, 0);
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break;
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case FAST:
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LOG(logINFOBLUE, ("Setting to fast settings\n"));
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thisSettings = sett;
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setDAC(M_VRPREAMP, DEFAULT_FAST_VRPREAMP, 0);
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setDAC(M_VRSHAPER, DEFAULT_FAST_VRSHAPER, 0);
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break;
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case HIGHGAIN:
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LOG(logINFOBLUE, ("Setting to high gain settings\n"));
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thisSettings = sett;
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setDAC(M_VRPREAMP, DEFAULT_HIGHGAIN_VRPREAMP, 0);
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setDAC(M_VRSHAPER, DEFAULT_HIGHGAIN_VRSHAPER, 0);
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break;
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default:
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LOG(logERROR,
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("Settings %d not defined for this detector\n", (int)sett));
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return thisSettings;
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}
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LOG(logINFO, ("Settings: %d\n", thisSettings));
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return thisSettings;
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}
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void validateSettings() {
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if (detectorDacs[M_VRPREAMP] == DEFAULT_STANDARD_VRPREAMP &&
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detectorDacs[M_VRSHAPER] == DEFAULT_STANDARD_VRSHAPER) {
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if (thisSettings != STANDARD) {
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thisSettings = STANDARD;
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LOG(logINFOBLUE, ("Validated Settings changed to standard!\n"));
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}
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} else if (detectorDacs[M_VRPREAMP] == DEFAULT_FAST_VRPREAMP &&
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detectorDacs[M_VRSHAPER] == DEFAULT_FAST_VRSHAPER) {
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if (thisSettings != FAST) {
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thisSettings = FAST;
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LOG(logINFOBLUE, ("Validated Settings changed to fast!\n"));
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}
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} else if (detectorDacs[M_VRPREAMP] == DEFAULT_HIGHGAIN_VRPREAMP &&
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detectorDacs[M_VRSHAPER] == DEFAULT_HIGHGAIN_VRSHAPER) {
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if (thisSettings != HIGHGAIN) {
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thisSettings = HIGHGAIN;
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LOG(logINFOBLUE, ("Validated Settings changed to highgain!\n"));
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}
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} else {
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thisSettings = UNDEFINED;
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LOG(logWARNING,
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("Settings set to undefined [vrpreamp: %d, vrshaper: %d]\n",
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detectorDacs[M_VRPREAMP], detectorDacs[M_VRSHAPER]));
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}
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}
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enum detectorSettings getSettings() { return thisSettings; }
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int getThresholdEnergy(int counterIndex) {
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return (detectorModules)->eV[counterIndex];
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}
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void setThresholdEnergy(int counterIndex, int eV) {
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(detectorModules)->eV[counterIndex] = eV;
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}
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/* parameters - dac, hv */
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void setDAC(enum DACINDEX ind, int val, int mV) {
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if (val < 0) {
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@ -1284,12 +1424,37 @@ void setDAC(enum DACINDEX ind, int val, int mV) {
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setDAC(M_VTH3, val, mV);
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return;
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}
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char *dac_names[] = {DAC_NAMES};
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// remember vthx values and set 2800 if counter disabled
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uint32_t counters = getCounterMask();
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int vthdacs[] = {M_VTH1, M_VTH2, M_VTH3};
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for (int i = 0; i < NCOUNTERS; ++i) {
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if (vthdacs[i] == (int)ind) {
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// remember enabled values for vthx
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if (val != DEFAULT_COUNTER_DISABLED_VTH_VAL) {
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int vthval = val;
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if (mV) {
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if (LTC2620_D_VoltageToDac(val, &vthval) == FAIL) {
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return;
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}
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}
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vthEnabledVals[i] = vthval;
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LOG(logINFO, ("Remembering %s [%d]\n", dac_names[ind], vthval));
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}
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// set vthx to disable val, if counter disabled
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if (!(counters & (1 << i))) {
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LOG(logINFO, ("Disabling %s\n", dac_names[ind]));
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val = DEFAULT_COUNTER_DISABLED_VTH_VAL;
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mV = 0;
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}
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}
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}
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LOG(logDEBUG1, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind],
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val, (mV ? "mV" : "dac units")));
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int dacval = val;
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#ifdef VIRTUAL
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LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind],
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val, (mV ? "mV" : "dac units")));
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@ -1306,11 +1471,14 @@ void setDAC(enum DACINDEX ind, int val, int mV) {
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detectorDacs[ind] = dacval;
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}
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#endif
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if (ind == M_VRPREAMP || ind == M_VRSHAPER) {
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validateSettings();
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}
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}
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int getDAC(enum DACINDEX ind, int mV) {
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if (ind == M_VTHRESHOLD) {
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int ret[3] = {0};
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int ret[NCOUNTERS] = {0};
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ret[0] = getDAC(M_VTH1, mV);
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ret[1] = getDAC(M_VTH2, mV);
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ret[2] = getDAC(M_VTH3, mV);
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@ -1722,8 +1890,8 @@ uint64_t readPatternWord(int addr) {
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LOG(logDEBUG1, (" Reading Pattern Word (addr:0x%x)\n", addr));
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uint32_t reg_lsb =
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PATTERN_STEP0_LSB_REG +
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addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset
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// of the word to write (addr)
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addr * REG_OFFSET * 2; // the first word in RAM as base plus the
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// offset of the word to write (addr)
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uint32_t reg_msb = PATTERN_STEP0_MSB_REG + addr * REG_OFFSET * 2;
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// read value
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@ -1753,8 +1921,8 @@ uint64_t writePatternWord(int addr, uint64_t word) {
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// write word
|
||||
uint32_t reg_lsb =
|
||||
PATTERN_STEP0_LSB_REG +
|
||||
addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset
|
||||
// of the word to write (addr)
|
||||
addr * REG_OFFSET * 2; // the first word in RAM as base plus the
|
||||
// offset of the word to write (addr)
|
||||
uint32_t reg_msb = PATTERN_STEP0_MSB_REG + addr * REG_OFFSET * 2;
|
||||
set64BitReg(word, reg_lsb, reg_msb);
|
||||
|
||||
@ -2479,9 +2647,9 @@ enum runStatus getRunStatus() {
|
||||
uint32_t deadtimeReg = bus_r(DEADTIME_CONFIG_REG);
|
||||
if ((deadtimeReg & DEADTIME_EARLY_EXP_FIN_ERR_MSK) >>
|
||||
DEADTIME_EARLY_EXP_FIN_ERR_OFST) {
|
||||
LOG(logERROR,
|
||||
("Status: ERROR in Dead Time Reg (too short exptime) %08x\n",
|
||||
deadtimeReg));
|
||||
LOG(logERROR, ("Status: ERROR in Dead Time Reg (too short "
|
||||
"exptime) %08x\n",
|
||||
deadtimeReg));
|
||||
s = ERROR;
|
||||
}
|
||||
// stopped or error
|
||||
@ -2567,9 +2735,12 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
|
||||
destMod->iodelay = srcMod->iodelay;
|
||||
if (srcMod->tau >= 0)
|
||||
destMod->tau = srcMod->tau;
|
||||
if (srcMod->eV >= 0)
|
||||
destMod->eV = srcMod->eV;
|
||||
*/
|
||||
for (int i = 0; i < NCOUNTERS; ++i) {
|
||||
if (srcMod->eV[i] >= 0)
|
||||
destMod->eV[i] = srcMod->eV[i];
|
||||
}
|
||||
|
||||
LOG(logDEBUG1, ("Copying register %x (%x)\n", destMod->reg, srcMod->reg));
|
||||
|
||||
if (destMod->nchan != 0) {
|
||||
@ -2599,3 +2770,78 @@ int getTotalNumberOfChannels() {
|
||||
int getNumberOfChips() { return NCHIP; }
|
||||
int getNumberOfDACs() { return NDAC; }
|
||||
int getNumberOfChannelsPerChip() { return NCHAN; }
|
||||
|
||||
int setChipStatusRegister(int csr) {
|
||||
int iaddr=0;
|
||||
int nbits=18;
|
||||
int error=0;
|
||||
//int start=0, stop=MAX_PATTERN_LENGTH, loop=0;
|
||||
int patword=0;
|
||||
patword=setBit(SIGNAL_STATLOAD,patword);
|
||||
for (int i=0; i<2; i++)
|
||||
writePatternWord(iaddr++, patword);
|
||||
patword=setBit(SIGNAL_resStorage,patword);
|
||||
patword=setBit(SIGNAL_resCounter,patword);
|
||||
for (int i=0; i<8; i++)
|
||||
writePatternWord(iaddr++, patword);
|
||||
patword=clearBit(SIGNAL_resStorage,patword);
|
||||
patword=clearBit(SIGNAL_resCounter,patword);
|
||||
for (int i=0; i<8; i++)
|
||||
writePatternWord(iaddr++, patword);
|
||||
//#This version of the serializer pushes in the MSB first (compatible with the CSR bit numbering)
|
||||
for (int ib=nbits-1; ib>=0; ib--) {
|
||||
if (csr&(1<<ib))
|
||||
patword=setBit(SIGNAL_serialIN,patword);
|
||||
else
|
||||
patword=clearBit(SIGNAL_serialIN,patword);
|
||||
for (int i=0; i<4; i++)
|
||||
writePatternWord(iaddr++, patword);
|
||||
patword=setBit(SIGNAL_CHSclk,patword);
|
||||
writePatternWord(iaddr++, patword);
|
||||
patword=clearBit(SIGNAL_CHSclk,patword);
|
||||
writePatternWord(iaddr++, patword);
|
||||
}
|
||||
|
||||
patword=clearBit(SIGNAL_serialIN,patword);
|
||||
for (int i=0; i<2; i++)
|
||||
writePatternWord(iaddr++, patword);
|
||||
patword=setBit(SIGNAL_STO,patword);
|
||||
for (int i=0; i<5; i++)
|
||||
writePatternWord(iaddr++, patword);
|
||||
patword=clearBit(SIGNAL_STO,patword);
|
||||
for (int i=0; i<5; i++)
|
||||
writePatternWord(iaddr++, patword);
|
||||
patword=clearBit(SIGNAL_STATLOAD,patword);
|
||||
for (int i=0; i<5; i++)
|
||||
writePatternWord(iaddr++, patword);
|
||||
|
||||
if (iaddr >= MAX_PATTERN_LENGTH) {
|
||||
LOG(logERROR, ("Addr 0x%x is past max_address_length 0x%x!\n",
|
||||
iaddr, MAX_PATTERN_LENGTH));
|
||||
error = 1;
|
||||
}
|
||||
// set pattern wait address
|
||||
for (int i = 0; i <= 2; i++)
|
||||
setPatternWaitAddress(i, MAX_PATTERN_LENGTH - 1);
|
||||
|
||||
// pattern loop
|
||||
for (int i = 0; i <= 2; i++) {
|
||||
int stop = MAX_PATTERN_LENGTH - 1, nloop = 0;
|
||||
setPatternLoop(i, &stop, &stop, &nloop);
|
||||
}
|
||||
|
||||
// pattern limits
|
||||
{
|
||||
int start = 0, nloop = 0;
|
||||
setPatternLoop(-1, &start, &iaddr, &nloop);
|
||||
}
|
||||
// send pattern to the chips
|
||||
startPattern();
|
||||
|
||||
if (error != 0) {
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
return OK;
|
||||
|
||||
}
|
||||
|
||||
@ -3,6 +3,7 @@
|
||||
|
||||
#define REQRD_FRMWRE_VRSN (0x200925)
|
||||
#define KERNEL_DATE_VRSN "Wed May 20 13:58:38 CEST 2020"
|
||||
#define ID_FILE "detid_mythen3.txt"
|
||||
|
||||
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
|
||||
|
||||
@ -25,24 +26,35 @@
|
||||
#define MAX_EXT_SIGNALS (8)
|
||||
|
||||
/** Default Parameters */
|
||||
#define DEFAULT_PATTERN_FILE ("DefaultPattern_mythen3.txt")
|
||||
#define DEFAULT_INTERNAL_GATES (1)
|
||||
#define DEFAULT_EXTERNAL_GATES (1)
|
||||
#define DEFAULT_DYNAMIC_RANGE (32)
|
||||
#define DEFAULT_NUM_FRAMES (1)
|
||||
#define DEFAULT_NUM_CYCLES (1)
|
||||
#define DEFAULT_GATE_WIDTH (100 * 1000 * 1000) // ns
|
||||
#define DEFAULT_GATE_DELAY (0)
|
||||
#define DEFAULT_PERIOD (2 * 1000 * 1000) // ns
|
||||
#define DEFAULT_DELAY_AFTER_TRIGGER (0)
|
||||
#define DEFAULT_HIGH_VOLTAGE (0)
|
||||
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
|
||||
#define DEFAULT_READOUT_C0 (10) //(100000000) // rdo_clk, 100 MHz
|
||||
#define DEFAULT_READOUT_C1 (10) //(100000000) // smp sample clk (x2), 100 MHz
|
||||
#define DEFAULT_SYSTEM_C0 (10) //(100000000) // run_clk, 100 MHz
|
||||
#define DEFAULT_SYSTEM_C1 (10) //(100000000) // sync_clk, 100 MHz
|
||||
#define DEFAULT_SYSTEM_C2 (10) //(100000000) // str_clk, 100 MHz
|
||||
#define DEFAULT_SYSTEM_C3 (5) //(200000000) // smp_clk, 200 MHz
|
||||
#define DEFAULT_PATTERN_FILE ("DefaultPattern_mythen3.txt")
|
||||
#define DEFAULT_INTERNAL_GATES (1)
|
||||
#define DEFAULT_EXTERNAL_GATES (1)
|
||||
#define DEFAULT_DYNAMIC_RANGE (32)
|
||||
#define DEFAULT_NUM_FRAMES (1)
|
||||
#define DEFAULT_NUM_CYCLES (1)
|
||||
#define DEFAULT_GATE_WIDTH (100 * 1000 * 1000) // ns
|
||||
#define DEFAULT_GATE_DELAY (0)
|
||||
#define DEFAULT_PERIOD (2 * 1000 * 1000) // ns
|
||||
#define DEFAULT_DELAY_AFTER_TRIGGER (0)
|
||||
#define DEFAULT_HIGH_VOLTAGE (0)
|
||||
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
|
||||
#define DEFAULT_SETTINGS (STANDARD)
|
||||
#define DEFAULT_TRIMBIT_VALUE (0)
|
||||
#define DEFAULT_COUNTER_DISABLED_VTH_VAL (2800)
|
||||
|
||||
#define DEFAULT_STANDARD_VRPREAMP (1100)
|
||||
#define DEFAULT_FAST_VRPREAMP (300)
|
||||
#define DEFAULT_HIGHGAIN_VRPREAMP (1300)
|
||||
#define DEFAULT_STANDARD_VRSHAPER (1280)
|
||||
#define DEFAULT_FAST_VRSHAPER (1500)
|
||||
#define DEFAULT_HIGHGAIN_VRSHAPER (900)
|
||||
|
||||
#define DEFAULT_READOUT_C0 (10) //(100000000) // rdo_clk, 100 MHz
|
||||
#define DEFAULT_READOUT_C1 (10) //(100000000) // smp sample clk (x2), 100 MHz
|
||||
#define DEFAULT_SYSTEM_C0 (10) //(100000000) // run_clk, 100 MHz
|
||||
#define DEFAULT_SYSTEM_C1 (10) //(100000000) // sync_clk, 100 MHz
|
||||
#define DEFAULT_SYSTEM_C2 (10) //(100000000) // str_clk, 100 MHz
|
||||
#define DEFAULT_SYSTEM_C3 (5) //(200000000) // smp_clk, 200 MHz
|
||||
// (DEFAULT_SYSTEM_C3 only for timing receiver) should not be changed
|
||||
#define DEFAULT_TRIMMING_RUN_CLKDIV (40) // (25000000) // 25 MHz
|
||||
|
||||
@ -174,3 +186,19 @@ typedef struct udp_header_struct {
|
||||
#define SIGNAL_resCounter (23)
|
||||
#define SIGNAL_CHSclk (24)
|
||||
#define SIGNAL_exposing (25)
|
||||
|
||||
//CHIP STARTUS REGISTER BITS
|
||||
#define CSR_spypads 0
|
||||
#define CSR_invpol 4
|
||||
#define CSR_dpulse 5
|
||||
#define CSR_interp 6
|
||||
#define CSR_C10pre 7 //#default
|
||||
#define CSR_pumprobe 8
|
||||
#define CSR_apulse 9
|
||||
#define CSR_C15sh 10
|
||||
#define CSR_C30sh 11 //#default
|
||||
#define CSR_C50sh 12
|
||||
#define CSR_C225ACsh 13 // Connects 225fF SHAPER AC cap (1: 225 to shaper, 225 to GND. 0: 450 to shaper)
|
||||
#define CSR_C15pre 14
|
||||
|
||||
#define CSR_default (1<<CSR_C10pre )|(1<< CSR_C30sh)
|
||||
|
||||
Reference in New Issue
Block a user