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flatfield directory field added to shared memory - Server works with newest firmware versions

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git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@22 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
bergamaschi
2011-01-28 13:24:03 +00:00
parent 9f64dd01d8
commit f882a61802
18 changed files with 709 additions and 314 deletions
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3
slsDetectorSoftware/mythenDetectorServer/Makefile
View File

@ -13,7 +13,8 @@ INSTMODE= 0777
SRCS= server.c server_funcs.c communication_funcs.c firmware_funcs.c mcb_funcs.c trimming_funcs.c sharedmemory.c
OBJS= $(SRCS:%.c=%.o)
CFLAGS+= -Wall -DC_ONLY -DMCB_FUNCS -DVERBOSE
CFLAGS+= -Wall -DC_ONLY -DMCB_FUNCS
#-DVERBOSE
#-DVERYVERBOSE
#-Werror

2
slsDetectorSoftware/mythenDetectorServer/communication_funcs.c
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@ -1 +1 @@
/afs/psi.ch/project/mythen/slsDetectorSoftware/commonFiles/communication_funcs.c
/afs/psi.ch/project/mythen/newMythenSoftware/slsDetectorSoftware/commonFiles/communication_funcs.c

2
slsDetectorSoftware/mythenDetectorServer/communication_funcs.h
View File

@ -1 +1 @@
/afs/psi.ch/project/mythen/slsDetectorSoftware/commonFiles/communication_funcs.h
/afs/psi.ch/project/mythen/newMythenSoftware/slsDetectorSoftware/commonFiles/communication_funcs.h

282
slsDetectorSoftware/mythenDetectorServer/firmware_funcs.c
View File

@ -37,6 +37,10 @@ int *ram_values=NULL;
char *now_ptr=NULL;
int ram_size=0;
int64_t totalTime=1;
u_int32_t progressMask=0;
int ififostart, ififostop, ififostep, ififo;
@ -182,18 +186,21 @@ u_int32_t getSetLength() {
u_int32_t setWaitStates(int d1) {
u_int32_t c;
int d=d1-2;
//int d=d1-3;
char cmd[100];
sprintf(cmd,"bus -a 0xb0000000 -w 0x%x0008",d1);
c=bus_r(SPEED_REG);
bus_w(SPEED_REG,(d<<WAIT_STATES_OFFSET)|(c&~(WAIT_STATES_MASK)));
system(cmd);
return ((bus_r(SPEED_REG)& WAIT_STATES_MASK)>>WAIT_STATES_OFFSET);
if (d1<=0xf) {
sprintf(cmd,"bus -a 0xb0000000 -w 0x%x0008",d1);
c=bus_r(SPEED_REG);
bus_w(SPEED_REG,(d<<WAIT_STATES_OFFSET)|(c&~(WAIT_STATES_MASK)));
system(cmd);
}
return ((bus_r(SPEED_REG)& WAIT_STATES_MASK)>>WAIT_STATES_OFFSET)+2;
}
u_int32_t getWaitStates() {
u_int32_t clk_div;
clk_div=((bus_r(SPEED_REG)& WAIT_STATES_MASK)>>WAIT_STATES_OFFSET);
return clk_div;
return clk_div+2;
}
@ -247,8 +254,6 @@ int getExtSignal(int d) {
int off=d*SIGNAL_OFFSET;
int mode=((bus_r(EXT_SIGNAL_REG)&(SIGNAL_MASK<<off))>>off);
if (mode<RO_TRIGGER_OUT_FALLING_EDGE)
return modes[mode];
else
@ -366,18 +371,18 @@ u_int32_t testFpga(void) {
//fixed pattern
val=bus_r(FIX_PATT_REG);
if (val==FIXED_PATT_VAL) {
printf("fixed pattern ok!! %x\n",val);
printf("fixed pattern ok!! %08x\n",val);
} else {
printf("fixed pattern wrong!! %x\n",val);
printf("fixed pattern wrong!! %08x\n",val);
result=FAIL;
// return FAIL;
}
//FPGA code version
val=bus_r(FPGA_VERSION_REG)&0x00ffffff;
if (val>=(FPGA_VERSION_VAL&0x00ffffff)) {
printf("FPGA version ok!! %x\n",val);
printf("FPGA version ok!! %06x\n",val);
} else {
printf("FPGA version too old! %x\n",val);
printf("FPGA version too old! %06x\n",val);
return FAIL;
}
//dummy register
@ -387,7 +392,7 @@ u_int32_t testFpga(void) {
if (val==0xF0F0F0F0) {
printf("FPGA dummy register ok!! %x\n",val);
} else {
printf("FPGA dummy register wrong!! %x\n",val);
printf("FPGA dummy register wrong!! %x instead of 0xF0F0F0F0 \n",val);
result=FAIL;
// return FAIL;
}
@ -398,7 +403,7 @@ u_int32_t testFpga(void) {
if (val==0x0F0F0F0F) {
printf("FPGA dummy register ok!! %x\n",val);
} else {
printf("FPGA dummy register wrong!! %x\n",val);
printf("FPGA dummy register wrong!! %x instead of 0x0F0F0F0F \n",val);
result=FAIL;
// return FAIL;
}
@ -423,10 +428,12 @@ int getNModBoard() {
int nmodboard;
u_int32_t val;
val=bus_r(FPGA_VERSION_REG)&0xff000000;
printf("version register %08x\n",val);
nmodboard=val >> 24;
#ifdef VERY_VERBOSE
//#ifdef VERY_VERBOSE
printf("The board hosts %d modules\n",nmodboard);
#endif
//#endif
nModBoard=nmodboard;
//getNModBoard()=nmodboard;
return nmodboard;
@ -439,26 +446,28 @@ int setNMod(int n) {
int imod;
int rval;
int reg;
int nf=0;
int shiftfifo=SHIFTFIFO;
int ntot=getNModBoard();
switch (dynamicRange) {
case 16:
shiftfifo=SHIFTFIFO-1;
break;
case 8:
shiftfifo=SHIFTFIFO-2;
break;
case 4:
shiftfifo=SHIFTFIFO-3;
break;
case 1:
shiftfifo=SHIFTFIFO-5;
break;
default:
if (getProbes()==0) {
switch (dynamicRange) {
case 16:
shiftfifo=SHIFTFIFO-1;
break;
case 8:
shiftfifo=SHIFTFIFO-2;
break;
case 4:
shiftfifo=SHIFTFIFO-3;
break;
case 1:
shiftfifo=SHIFTFIFO-5;
break;
default:
shiftfifo=SHIFTFIFO;
}
} else
shiftfifo=SHIFTFIFO;
}
#ifdef VERBOSE
@ -466,80 +475,77 @@ int setNMod(int n) {
#endif
if (n>0 && n<=ntot) {
nModX=n;
// dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
//allocateRAM();
/* should enable all fifos*/
/* // bus_w(FIFO_CNTRL_REG_OFF+(ALLFIFO<<SHIFTFIFO), FIFO_RESET_BIT | FIFO_DISABLE_TOGGLE_BIT);
bus_w(FIFO_CNTRL_REG_OFF+(ALLFIFO<<shiftfifo), FIFO_RESET_BIT | FIFO_DISABLE_TOGGLE_BIT);
#ifdef VERBOSE
printf("a %08x r %08x\n",FIFO_CNTRL_REG_OFF+(ALLFIFO<<shiftfifo),FIFO_RESET_BIT | FIFO_DISABLE_TOGGLE_BIT);
for (ififo=0; ififo<ntot*NCHIP; ififo++) {
printf("%d %08x\n",ififo,bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo)));
}
#endif
ifste=dynamicRange/32;
ifsta=nModX*NCHIP*ifste;
ifsto=ntot*NCHIP*ifste;
*/
/*d isable the fifos relative to the unused modules */
for (ififo=0; ififo<ntot*NCHIP; ififo++) {
//for (ififo=ifsta; ififo<ifsto; ififo+=ifste) {
//fifocntrl[ififo]=FIFO_DISABLE_TOGGLE_BIT;
reg=bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo));
#ifdef VERBOSE
printf("Fifo %d is %x",ififo,reg);
#endif
if (ififo<n*NCHIP) {
if (reg&FIFO_DISABLED_BIT)
if (reg&FIFO_DISABLED_BIT) {
bus_w(FIFO_CNTRL_REG_OFF+(ififo<<shiftfifo), FIFO_DISABLE_TOGGLE_BIT);
} else {
if ((reg&FIFO_DISABLED_BIT)==0)
bus_w(FIFO_CNTRL_REG_OFF+(ififo<<shiftfifo), FIFO_DISABLE_TOGGLE_BIT);
}
#ifdef VERBOSE
printf(" done %x\n",bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo)));
if (bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo))&FIFO_DISABLED_BIT) {
printf("Fifo %d is %x (nm %d nc %d addr %08x)",ififo,reg, (reg&FIFO_NM_MASK)>>FIFO_NM_OFF, (reg&FIFO_NC_MASK)>>FIFO_NC_OFF, FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo));
printf(" enabling %08x\n",bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo)));
}
#endif
}
//#ifdef VERBOSE
//else printf(" unmodified ",ififo,reg);
//#endif
} else {
if ((reg&FIFO_ENABLED_BIT)) {
bus_w(FIFO_CNTRL_REG_OFF+(ififo<<shiftfifo), FIFO_DISABLE_TOGGLE_BIT);
#ifdef VERBOSE
if ((bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo))&FIFO_ENABLED_BIT)) {
printf("Fifo %d is %x (nm %d nc %d addr %08x)",ififo,reg, (reg&FIFO_NM_MASK)>>FIFO_NM_OFF, (reg&FIFO_NC_MASK)>>FIFO_NC_OFF, FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo));
printf(" disabling %08x\n",bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo)));
}
#endif
}
//#ifdef VERBOSE
//else printf(" unmodified ",ififo,reg);
//#endif
}
//#ifdef VERBOSE
//printf(" done %x\n",bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo)));
//#endif
}
}
// ifste=dynamicRange/32;
nModX=0;
nf=0;
for (imod=0; imod<ntot; imod++) {
rval=0;
for (ififo=imod*NCHIP; ififo<(imod+1)*NCHIP; ififo++) {//
//for (ififo=imod*NCHIP*ifste; ififo<(imod+1)*NCHIP*ifste; ififo+=ifste) {
if ((bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo))&FIFO_DISABLED_BIT)==0){
for (ififo=imod*NCHIP; ififo<(imod+1)*NCHIP; ififo++) {
bus_w(FIFO_CNTRL_REG_OFF+(ififo<<shiftfifo), FIFO_RESET_BIT);
#ifdef VERBOSE
printf("%08x ",(bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo))));
#endif
if ((bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo))&FIFO_ENABLED_BIT)){
rval=1; // checks if at least one fifo of the module is enabled
#ifdef VERBOSE
printf("%x Fifo %d is enabled\n",(bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo))), ififo);
printf("Fifo %d is enabled\n",ififo);
#endif
nf++;
}
#ifdef VERBOSE
else printf("%x Fifo %d is disabled\n",(bus_r(FIFO_COUNTR_REG_OFF+(ififo<<shiftfifo))),ififo);
else printf("Fifo %d is disabled\n",ififo);
#endif
}
if (rval) {
nModX++;
#ifdef VERBOSE
printf("Module %d is enabled --total %d\n",imod,nModX );
printf("Module %d is enabled --total %d (%d fifos)\n",imod,nModX,nf );
#endif
}
#ifdef VERBOSE
else printf("Module %d is disabled --total %d\n",imod,nModX );
else printf("Module %d is disabled --total %d (%d fifos)\n",imod,nModX,nf );
#endif
}
#ifdef VERBOSE
printf("There are %d modules enabled\n",nModX);
printf("There are %d modules enabled (%d fifos)\n",nModX, nf);
#endif
// dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
// allocateRAM();
getDynamicRange();
return nModX;
@ -591,10 +597,9 @@ int64_t getFrames(){
int64_t setExposureTime(int64_t value){
/* time is in ns */
if (value!=-1) {
if (value!=-1)
value*=(1E-9*CLK_FREQ);
}
return set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-9*CLK_FREQ);
return set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-9*CLK_FREQ);
}
int64_t getExposureTime(){
@ -614,6 +619,9 @@ int64_t setPeriod(int64_t value){
if (value!=-1) {
value*=(1E-9*CLK_FREQ);
}
return set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-9*CLK_FREQ);
}
@ -644,6 +652,7 @@ int64_t getTrains(){
int64_t setProbes(int64_t value){
int ow;
int nm=setNMod(-1);
switch (getDynamicRange()) {
case 32:
ow=1;
@ -652,25 +661,45 @@ int64_t setProbes(int64_t value){
ow=2;
break;
case 8:
ow=4;
ow=3;
break;
case 4:
ow=8;
ow=4;
break;
case 1:
ow=5;
break;
default:
ow=1;
}
if (value>=0) {
setCSregister(ALLMOD);
initChipWithProbes(0, ow,value, ALLMOD);
putout("0000000000000000",ALLMOD);
setNMod(nm);
getDynamicRange(); // needed to change dataBytes
}
return getProbes();
}
int64_t setProgress() {
//????? eventually call after setting the registers
}
int64_t getProgress() {
//should be done in firmware!!!!
}
int64_t getProbes(){
u_int32_t shiftin=bus_r(GET_SHIFT_IN_REG);
u_int32_t np=(shiftin >>PROBES_OFF) & PROBES_MASK;
@ -729,6 +758,9 @@ u_int32_t runState(void) {
write_status_sm("Running");
else
write_status_sm("Stopped");
#endif
#ifdef VERBOSE
printf("status %08x\n",s);
#endif
return s;
}
@ -836,7 +868,7 @@ u_int32_t fifoReadCounter(int fifonum)
rval=bus_r(FIFO_COUNTR_REG_OFF+(fifonum<<shiftfifo));
#ifdef VERBOSE
printf("FIFO %d contains %x words\n",fifonum, rval);
//printf("FIFO %d contains %x words\n",fifonum, rval);
#endif
return rval;
}
@ -861,6 +893,7 @@ u_int32_t* fifo_read_event()
#ifdef VERBOSE
int ichip;
int ichan;
#endif
#ifdef VIRTUAL
return NULL;
@ -868,43 +901,65 @@ u_int32_t* fifo_read_event()
#ifdef VERYVERBOSE
printf("before looping\n");
for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
fifoReadCounter(ichip);
if ((fifoReadCounter(ichip)&FIFO_COUNTER_MASK)%128)
printf("FIFO %d contains %d words\n",ichip,(fifoReadCounter(ichip)&FIFO_COUNTER_MASK));
}
#endif
while(bus_r(LOOK_AT_ME_REG)==0) {
//#ifdef VERYVERBOSE
#ifdef VERYVERBOSE
printf("Waiting for data status %x\n",runState());
//#endif
#endif
if (runBusy()==0) {
if (bus_r(LOOK_AT_ME_REG)==0) {
#ifdef VERBOSE
printf("no frame found %x status %x\n", bus_r(LOOK_AT_ME_REG),runState());
#ifdef VERYVERBOSE
for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
fifoReadCounter(ichip);
}
#endif
printf("no frame found - exiting ");
printf("%08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
/* for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
if ((fifoReadCounter(ichip)&FIFO_COUNTER_MASK)%128)
printf("FIFO %d contains %d words\n",ichip,(fifoReadCounter(ichip)&FIFO_COUNTER_MASK));
}
*/
#endif
return NULL;
} else {
#ifdef VERYVERBOSE
printf("no frame found %x status %x\n", bus_r(LOOK_AT_ME_REG),runState());
#endif
break;
}
}
}
#ifdef VERBOSE
printf("before readout\n");
#ifdef VERYVERBOSE
printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
fifoReadCounter(ichip);
if ((fifoReadCounter(ichip)&FIFO_COUNTER_MASK)%128)
printf("FIFO %d contains %d words\n",ichip,(fifoReadCounter(ichip)&FIFO_COUNTER_MASK));
}
#endif
memcpy(now_ptr, values, dataBytes);
#ifdef VERBOSE
/*
#ifdef VERBOSE
for (ichip=0;ichip<dataBytes/4; ichip++) {
now_ptr[ichip*4]=values[ichip];
#ifdef VERBOSE
if (((fifoReadCounter(ichip/128)&FIFO_COUNTER_MASK)+(ichip%128))>128)
printf("chip %d ch %d %d\n",ichip/128, ichip%128, (fifoReadCounter(ichip/128)&FIFO_COUNTER_MASK));
#endif
}
//#endif
*/
#ifdef VERYVERBOSE
printf("Copying to ptr %x %d\n",now_ptr, dataBytes);
#endif
#ifdef VERYVERBOSE
printf("after readout\n");
printf("after readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
fifoReadCounter(ichip);
if ((fifoReadCounter(ichip)&FIFO_COUNTER_MASK)%128)
printf("FIFO %d contains %d words\n",ichip,(fifoReadCounter(ichip)&FIFO_COUNTER_MASK));
}
#endif
if (storeInRAM>0) {
@ -1023,9 +1078,10 @@ int getDynamicRange() {
int dr;
u_int32_t shiftin=bus_r(GET_SHIFT_IN_REG);
u_int32_t outmux=(shiftin >> OUTMUX_OFF) & OUTMUX_MASK;
u_int32_t probes=(shiftin >> PROBES_OFF) & PROBES_MASK;
#ifdef VERYVERBOSE
printf("%08x ",shiftin);
printf("outmux==%02x\n",outmux);
printf("outmux=%02x probes=%d\n",outmux,probes);
#endif
switch (outmux) {
@ -1045,7 +1101,14 @@ int getDynamicRange() {
dr=32;
}
dynamicRange=dr;
dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
if (probes==0) {
dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
} else {
dataBytes=nModX*nModY*NCHIP*NCHAN*4;///
}
#ifdef VERBOSE
printf("Number of data bytes %d - probes %d dr %d\n", dataBytes, probes, dr);
#endif
if (allocateRAM()==OK) {
;
} else
@ -1059,6 +1122,7 @@ int testBus() {
u_int32_t j, i;
char cmd[100];
u_int32_t val=0x0;
int ifail=OK;
// printf("%s\n",cmd);
// system(cmd);
i=0;
@ -1066,18 +1130,20 @@ int testBus() {
while (i<10000000) {
// val=bus_r(FIX_PATT_REG);
bus_w(DUMMY_REG,val);
bus_w(FIX_PATT_REG,0x0);
bus_w(FIX_PATT_REG,0);
j=bus_r(DUMMY_REG);
if (i%10000==1)
printf("value 0x%x\n",j);
//if (i%10000==1)
if (j!=val){
printf("read wrong value %x instead of %x\n",j, val);
return FAIL;
}
printf("%d : read wrong value %08x instead of %08x\n",i,j, val);
ifail++;
//return FAIL;
}// else
// printf("%d : value OK 0x%08x\n",i,j);
val+=0xbbbbb;
i++;
}
return OK;
return ifail;
}

5
slsDetectorSoftware/mythenDetectorServer/firmware_funcs.h
View File

@ -75,6 +75,11 @@ int64_t getTrains();
int64_t setProbes(int64_t value);
int64_t getProbes();
int64_t getProgress();
int64_t setProgress();
u_int32_t runBusy(void);
u_int32_t runState(void);
u_int32_t dataPresent(void);

50
slsDetectorSoftware/mythenDetectorServer/mcb_funcs.c
View File

@ -52,9 +52,10 @@ int initDetector() {
int imod;
// sls_detector_module *myModule;
int n=getNModBoard();
#ifdef VERBOSE
nModX=n;
//#ifdef VERBOSE
printf("Board is for %d modules\n",n);
#endif
//#endif
detectorModules=malloc(n*sizeof(sls_detector_module));
detectorChips=malloc(n*NCHIP*sizeof(int));
@ -1446,9 +1447,8 @@ int initChipWithProbes(int obe, int ow,int nprobes, int imod){
int im, ichip;
int chipmi, chipma, modmi, modma;
int64_t regval, dum;
int64_t regval=0, dum;
int omask;
switch (ow) {
case 2:
omask=2;
@ -1466,10 +1466,16 @@ int initChipWithProbes(int obe, int ow,int nprobes, int imod){
omask=0;//1;
break;
}
regval=(omask<<OUTMUX_OFFSET)|(nprobes<<PROBES_OFFSET)|(obe<<OUTBUF_OFFSET);
#ifdef VERBOSE
printf("\n \n \n",regval);
printf("initChip ow=%d omask=%d probes=%d\n",ow, omask,nprobes);
#endif
regval|=(omask<<OUTMUX_OFFSET);
regval|=(nprobes<<PROBES_OFFSET);
regval|=(obe<<OUTBUF_OFFSET);
#ifdef VERBOSE
printf("initChip: shift in will be %08x\n",regval);
printf("initChip : shift in will be %08x\n",regval);
#endif
/* clearing shift in register */
@ -1909,6 +1915,7 @@ int testShiftIn(int imod) {
}
putout("0000000000000000", ALLMOD);
printf("Shift in module %d : %d errors\n", imod,result);
if (result)
return 1;
else
@ -1922,7 +1929,7 @@ int testShiftOut(int imod) {
printf("testing shift out for module %d\n", imod);
setCSregister(254);
setCSregister(ALLMOD);
for (i=0; i<24; i++) {
if (dum & 1<<i) {
putout("0100010000000000",ALLMOD);
@ -1962,6 +1969,7 @@ int testShiftOut(int imod) {
putout("0010010000000000",ALLMOD);
}
putout("0000000000000000", ALLMOD);
printf("Shift out module %d : %d errors\n", imod,result);
if (result)
return 1;
else
@ -2010,7 +2018,8 @@ int testShiftStSel(int imod) {
putout("0010011000000000",ALLMOD);
}
putout("0000011000000000",ALLMOD);
putout("0000011000000000",ALLMOD);
printf("Shift stsel module %d : %d errors\n", imod,result);
if (result)
return 1;
else
@ -2103,7 +2112,7 @@ int testExtPulse(int imod) {
int testExtPulseMux(int imod, int ow) {
int i, ichan, ichip, result=0, ind;
int i, ichan, ichip, result=0, ind, chipr=0;
int *values, *v1;
int vright,v;
int nbit_mask=0xffffff;
@ -2157,19 +2166,25 @@ int testExtPulseMux(int imod, int ow) {
return 1;
}
for (ichip=0; ichip<NCHIP; ichip++) {
chipr=0;
for (ichan=0; ichan<NCHAN; ichan++) {
ind=ichan+(ichip+imod*NCHIP)*NCHAN;
v=values[ind];
vright=(ichan*(ichip+1))&nbit_mask;
if (v!=vright) {
result++;
printf("Counter test mux %d mode: channel %d (%x) read %d instead of %d\n",ow, ichan+(ichip+imod*NCHIP)*NCHAN, ind, v, vright);
chipr++;
printf("Counter test mux %d mode: channel %d chip %d read %d instead of %d\n",ow, ichan+(ichip+imod*NCHIP)*NCHAN, ichip, v, vright);
//break;
}
//printf("\n");
}
if (chipr)
printf("Test Counter module %d chip%d mux %d: %d errors\n", imod,ichip, ow,chipr);
}
free(values);
if (result)
printf("Test Counter module %d mux %d: %d errors\n", imod,ow,result);
if (result)
return 1;
@ -2180,7 +2195,7 @@ int testExtPulseMux(int imod, int ow) {
int testDataInOutMux(int imod, int ow, int num) {
int ichan, ichip, result=0, ind;
int ichan, ichip, result=0, chipr=0, ind;
int vright,v;
int nbit_mask=0xffffff;
int *values, *v1;
@ -2226,18 +2241,23 @@ int testDataInOutMux(int imod, int ow, int num) {
return 1;
}
for (ichip=0; ichip<NCHIP; ichip++) {
chipr=0;
for (ichan=0; ichan<NCHAN; ichan++) {
ind=ichan+(ichip+imod*NCHIP)*NCHAN;
v=values[ind];
if (v!=vright) {
result++;
printf("Counter test mux %d mode: channel %d (%x) read %d instead of %d\n",ow, ichan+(ichip+imod*NCHIP)*NCHAN, ind, v, vright);
chipr++;
printf("DataInOut test mux %d mode: channel %d chip %d read %d instead of %d\n",ow, ichan+(ichip+imod*NCHIP)*NCHAN, ichip, v, vright);
//break;
}
//printf("\n");
}
if (chipr)
printf("Test DatInOut module %d chip %d mux %d: %d errors\n", imod,ichip, ow,chipr);
}
if (result)
printf("Test DatInOut module %d mux %d: %d errors\n", imod,ow,result);
free(values);
if (result)
return 1;
@ -2426,6 +2446,7 @@ int testOutMux(int imod) {
putout("0000000000000000",ALLMOD);
}
printf("Test OutMux module %d : %d errors\n", imod,result);
if (result)
return 1;
else
@ -2544,6 +2565,7 @@ int testFpgaMux(int imod) {
putout("0000000000000000",ALLMOD);
}
printf("Test FpgaMux module %d : %d errors\n", imod,result);
if (result)
return 1;
else

9
slsDetectorSoftware/mythenDetectorServer/registers.h
View File

@ -104,11 +104,16 @@
#define ALL_FIFO_EMPTY_BIT 0x00010000 // data ready
/* for fifo status register */
#define FIFO_DISABLED_BIT 0x81000000
#define FIFO_ENABLED_BIT 0x80000000
#define FIFO_DISABLED_BIT 0x01000000
#define FIFO_ERROR_BIT 0x08000000
#define FIFO_EMPTY_BIT 0x04000000
#define FIFO_DATA_READY_BIT 0x02000000
#define FIFO_COUNTER_MASK 0x00ffffff
#define FIFO_COUNTER_MASK 0x000001ff
#define FIFO_NM_MASK 0x00e00000
#define FIFO_NM_OFF 21
#define FIFO_NC_MASK 0x001ffe00
#define FIFO_NC_OFF 9
/* for config register */

46
slsDetectorSoftware/mythenDetectorServer/server_funcs.c
View File

@ -589,19 +589,36 @@ int digital_test(int fnum) {
#endif
retval=0;
#ifdef MCB_FUNCS
if (testShiftIn(imod)) retval|=(1<<(ibit++));
if (testShiftOut(imod)) retval|=(1<<(ibit++));
if (testShiftStSel(imod)) retval|=(1<<(ibit++));
if (testShiftIn(imod)) retval|=(1<<(ibit));
ibit++;
if (testShiftOut(imod)) retval|=(1<<(ibit));
ibit++;
if (testShiftStSel(imod)) retval|=(1<<(ibit));
ibit++;
//if ( testDataInOut(0x123456, imod)) retval|=(1<<(ibit++));
//if ( testExtPulse(imod)) retval|=(1<<(ibit++));
// for (ow=0; ow<6; ow++)
for (ow=0; ow<5; ow++)
if (testDataInOutMux(imod, ow, 0x789abc)) retval|=(1<<ibit++);
// ow=1;
//#ifndef PICASSOD
for (ow=0; ow<5; ow++) {
//#endif
if (testDataInOutMux(imod, ow, 0x789abc)) retval|=(1<<ibit);
ibit++;
}
//for (ow=0; ow<6; ow++)
for (ow=0; ow<5; ow++)
if (testExtPulseMux(imod, ow)) retval|=(1<<ibit++);
if ( testOutMux(imod)) retval|=(1<<(ibit++));
if (testFpgaMux(imod)) retval|=(1<<(ibit++));
// ow=1;
//#ifndef PICASSOD
for (ow=0; ow<5; ow++) {
//#endif
if (testExtPulseMux(imod, ow)) retval|=(1<<ibit);
ibit++;
}
//#ifndef PICASSOD
if ( testOutMux(imod)) retval|=(1<<(ibit));
ibit++;
if (testFpgaMux(imod)) retval|=(1<<(ibit));
ibit++;
//#endif
#endif
break;
@ -1670,7 +1687,13 @@ int read_frame(int fnum) {
printf("Sending ptr %x %d\n",dataretval, dataBytes);
#endif
sendDataOnly(&dataret,sizeof(dataret));
#ifdef VERBOSE
n=sendDataOnly(dataretval,dataBytes);
printf("sent %d bytes\n",n);
#else
sendDataOnly(dataretval,dataBytes);
#endif
return OK;
} else {
//might add delay????
@ -1892,7 +1915,7 @@ int get_time_left(int fnum) {
int64_t retval;
int ret=OK;
sprintf(mess,"can't set timer\n");
sprintf(mess,"can't get timer\n");
n = receiveDataOnly(&ind,sizeof(ind));
if (n < 0) {
sprintf(mess,"Error reading from socket\n");
@ -1928,6 +1951,9 @@ int get_time_left(int fnum) {
case CYCLES_NUMBER:
retval=getTrains();
break;
case PROGRESS:
retval=getProgress();
break;
default:
ret=FAIL;
sprintf(mess,"timer index unknown %d\n",ind);

2
slsDetectorSoftware/mythenDetectorServer/sls_detector_defs.h
View File

@ -1 +1 @@
/afs/psi.ch/project/mythen/slsDetectorSoftware/commonFiles/sls_detector_defs.h
/afs/psi.ch/project/mythen/newMythenSoftware/slsDetectorSoftware/commonFiles/sls_detector_defs.h