diff --git a/docs/images_src/detector_data_format.drawio b/docs/images_src/detector_data_format.drawio index 6f11489de..5245aeaf5 100644 --- a/docs/images_src/detector_data_format.drawio +++ b/docs/images_src/detector_data_format.drawio @@ -1,6 +1,6 @@ - + @@ -355,7 +355,7 @@ - + @@ -385,7 +385,7 @@ - + @@ -950,7 +950,7 @@ - + @@ -1364,6 +1364,9 @@ + + + diff --git a/docs/images_src/system_communication_architecture.drawio b/docs/images_src/system_communication_architecture.drawio index 3143dd72e..5f3b7c845 100644 --- a/docs/images_src/system_communication_architecture.drawio +++ b/docs/images_src/system_communication_architecture.drawio @@ -1,13 +1,13 @@ - + - + @@ -295,7 +295,7 @@ - + @@ -316,7 +316,7 @@ - + @@ -427,7 +427,7 @@ - + @@ -682,8 +682,8 @@ - - + + @@ -712,7 +712,7 @@ - + diff --git a/docs/src/images/Client_architecture.svg b/docs/src/images/Client_architecture.svg index 0332f9175..abd7e4159 100644 --- a/docs/src/images/Client_architecture.svg +++ b/docs/src/images/Client_architecture.svg @@ -1,3 +1,3 @@ -
<<class>> Module
<<class>> Module
<<class>> Module
<<class>> Module (s)
C++ API
Python API%3CmxGraphModel%3E%3Croot%3E%3CmxCell%20id%3D%220%22%2F%3E%3CmxCell%20id%3D%221%22%20parent%3D%220%22%2F%3E%3CmxCell%20id%3D%222%22%20value%3D%22%26lt%3Bfont%20face%3D%26quot%3BCourier%20New%26quot%3B%26gt%3BC%2B%2B%20API%26lt%3B%2Ffont%26gt%3B%22%20style%3D%22rounded%3D1%3BwhiteSpace%3Dwrap%3Bhtml%3D1%3BfillColor%3D%2377AADD%3BstrokeColor%3D%2377AADD%3BlabelPosition%3Dcenter%3BverticalLabelPosition%3Dmiddle%3Balign%3Dcenter%3BverticalAlign%3Dmiddle%3BfontSize%3D17%3BgradientColor%3Dnone%3BfontColor%3D%23FFFFFF%3B%22%20vertex%3D%221%22%20parent%3D%221%22%3E%3CmxGeometry%20x%3D%22-180%22%20y%3D%224998%22%20width%3D%22146%22%20height%3D%2284%22%20as%3D%22geometry%22%2F%3E%3C%2FmxCell%3E%3C%2Froot%3E%3C%2FmxGraphModel%3E
CLI
Qt GUI
<<class>> Detector
slsDetectorPackage
Client (C++17)
CLIENT
Shared Memory(s)
Module 3
Module 2
Module 1
Module (s)
Module 3
Module 2
Module 1
Receiver (s)
\ No newline at end of file +
<<class>> Module
<<class>> Module
<<class>> Module
<<class>> Module
<<class>> Module
<<class>> Module
<<class>> Module (s)
<<class>> Module (s)
C++ API
C++ API
Python API%3CmxGraphModel%3E%3Croot%3E%3CmxCell%20id%3D%220%22%2F%3E%3CmxCell%20id%3D%221%22%20parent%3D%220%22%2F%3E%3CmxCell%20id%3D%222%22%20value%3D%22%26lt%3Bfont%20face%3D%26quot%3BCourier%20New%26quot%3B%26gt%3BC%2B%2B%20API%26lt%3B%2Ffont%26gt%3B%22%20style%3D%22rounded%3D1%3BwhiteSpace%3Dwrap%3Bhtml%3D1%3BfillColor%3D%2377AADD%3BstrokeColor%3D%2377AADD%3BlabelPosition%3Dcenter%3BverticalLabelPosition%3Dmiddle%3Balign%3Dcenter%3BverticalAlign%3Dmiddle%3BfontSize%3D17%3BgradientColor%3Dnone%3BfontColor%3D%23FFFFFF%3B%22%20vertex%3D%221%22%20parent%3D%221%22%3E%3CmxGeometry%20x%3D%22-180%22%20y%3D%224998%22%20width%3D%22146%22%20height%3D%2284%22%20as%3D%22geometry%22%2F%3E%3C%2FmxCell%3E%3C%2Froot%3E%3C%2FmxGraphModel%3E
Python API%3CmxGr...
CLI
CLI
Qt GUI
Qt GUI
<<class>> Detector
<<class>> Detector
slsDetectorPackage
Client (C++17)
slsDetectorPackage...
CLIENT
CLIENT
Shared Memory(s)
Shared Memory(s)
Module 3
Module 3
Module 2
Module 2
Module 1
Module 1
Module (s)
Module (s)
Module 3
Module 3
Module 2
Module 2
Module 1
Module 1
Receiver (s)
Receiver (s)
\ No newline at end of file diff --git a/docs/src/images/Client_module_commands.svg b/docs/src/images/Client_module_commands.svg index 8d761aae5..d12ca0615 100644 --- a/docs/src/images/Client_module_commands.svg +++ b/docs/src/images/Client_module_commands.svg @@ -1,3 +1,3 @@ -
TCP
Client
TCP
Control
Module
1952 / 1953
bchip101
port     = 1952
stopport = 1953
hostname = bchip101
Module
1952 / 1953
bchip100
port     = 1952
stopport = 1953
hostname = bchip100
\ No newline at end of file +
TCP
TCP
Client
Client
TCP
TCP
Control
Control
Module
1952 / 1953
bchip101
Module...
port     = 1952
stopport = 1953
hostname = bchip101
port     = 1952...
Module
1952 / 1953
bchip100
Module...
port     = 1952
stopport = 1953
hostname = bchip100
port     = 1952...
\ No newline at end of file diff --git a/docs/src/images/Client_receiver_commands.svg b/docs/src/images/Client_receiver_commands.svg index a1f521ee0..086fbf338 100644 --- a/docs/src/images/Client_receiver_commands.svg +++ b/docs/src/images/Client_receiver_commands.svg @@ -1,3 +1,3 @@ -
Client
TCP
Control
Receiver
1955
pc1234
rx_tcpport = 1955
rx_hostname = pc1234
Receiver
1954
pc1234
rx_tcpport = 1954
rx_hostname = pc1234
TCP
\ No newline at end of file +
Client
Client
TCP
TCP
Control
Control
Receiver
1955
pc1234
Receiver...
rx_tcpport = 1955
rx_hostname = pc1234
rx_tcpport = 1955...
Receiver
1954
pc1234
Receiver...
rx_tcpport = 1954
rx_hostname = pc1234
rx_tcpport = 1954...
TCP
TCP
\ No newline at end of file diff --git a/docs/src/images/Eiger_bottom_1.svg b/docs/src/images/Eiger_bottom_1.svg index 697765dc2..c724ed26c 100644 --- a/docs/src/images/Eiger_bottom_1.svg +++ b/docs/src/images/Eiger_bottom_1.svg @@ -1,3 +1,3 @@ -
UDP Port 1
UDP Port 2
1
3
2
4
\ No newline at end of file +
UDP Port 1
UDP...
UDP Port 2
UDP...
1
1
3
3
2
2
4
4
\ No newline at end of file diff --git a/docs/src/images/Eiger_bottom_2.svg b/docs/src/images/Eiger_bottom_2.svg index 984406558..f9cf84dd6 100644 --- a/docs/src/images/Eiger_bottom_2.svg +++ b/docs/src/images/Eiger_bottom_2.svg @@ -1,3 +1,3 @@ -
UDP Port 1
UDP Port 2
\ No newline at end of file +
UDP Port 1
UDP...
UDP Port 2
UDP...
\ No newline at end of file diff --git a/docs/src/images/Eiger_bottom_3.svg b/docs/src/images/Eiger_bottom_3.svg index 7cead35bc..1217b9120 100644 --- a/docs/src/images/Eiger_bottom_3.svg +++ b/docs/src/images/Eiger_bottom_3.svg @@ -1,3 +1,3 @@ -
UDP Port 1
UDP Port 2
\ No newline at end of file +
UDP Port 1
UDP...
UDP Port 2
UDP...
\ No newline at end of file diff --git a/docs/src/images/Eiger_bottom_4.svg b/docs/src/images/Eiger_bottom_4.svg index 3bebad3ac..8b89a09f7 100644 --- a/docs/src/images/Eiger_bottom_4.svg +++ b/docs/src/images/Eiger_bottom_4.svg @@ -1,3 +1,3 @@ -
UDP Port 1
UDP Port 2
1
2
3
4
\ No newline at end of file +
UDP Port 1
UDP...
UDP Port 2
UDP...
1
1
2
2
3
3
4
4
\ No newline at end of file diff --git a/docs/src/images/Eiger_module.svg b/docs/src/images/Eiger_module.svg index 8d0c37b78..a8f4c9a4a 100644 --- a/docs/src/images/Eiger_module.svg +++ b/docs/src/images/Eiger_module.svg @@ -1,3 +1,3 @@ -
Top Half Module
1
2
UDP Port 1
256 pixels
3
4
UDP Port 2
Control Port
256 pixels
Bottom Half Module
UDP Port 1
256 pixels
UDP Port 2
1
3
2
4
256 pixels
Control Port
Single Module
\ No newline at end of file +
Top Half Module
Top Half Module
1
1
2
2
UDP Port 1
UDP...
256 pixels
256 pixels
3
3
4
4
UDP Port 2
UDP...
Control Port
Cont...
256 pixels
256 pixels
Bottom Half Module
Bottom Half Module
UDP Port 1
UDP...
256 pixels
256 pixels
UDP Port 2
UDP...
1
1
3
3
2
2
4
4
256 pixels
256 pixels
Control Port
Cont...
Single Module
Single Module
\ No newline at end of file diff --git a/docs/src/images/Eiger_quad.svg b/docs/src/images/Eiger_quad.svg index 35d268b39..cfa951382 100644 --- a/docs/src/images/Eiger_quad.svg +++ b/docs/src/images/Eiger_quad.svg @@ -1,3 +1,3 @@ -
1
2
256 pixels
4
3
256 pixels
UDP Port 1
Control Port
Quad
(Top Half Module)
UDP Port 2
\ No newline at end of file +
1
1
2
2
256 pixels
256 pixels
4
4
3
3
256 pixels
256 pixels
UDP Port 1
UDP Po...
Control Port
Control...
Quad
(Top Half Module)
Quad...
UDP Port 2
UDP Port...
\ No newline at end of file diff --git a/docs/src/images/Eiger_read_rows.svg b/docs/src/images/Eiger_read_rows.svg index e4e74025e..c2f4ff59e 100644 --- a/docs/src/images/Eiger_read_rows.svg +++ b/docs/src/images/Eiger_read_rows.svg @@ -1,3 +1,3 @@ -
1
2
UDP Port 1
3
4
UDP Port 2
UDP Port 1
UDP Port 2
3
2
4
1
\ No newline at end of file +
1
1
2
2
UDP Port 1
UDP...
3
3
4
4
UDP Port 2
UDP...
UDP Port 1
UDP...
UDP Port 2
UDP...
3
3
2
2
4
4
1
1
\ No newline at end of file diff --git a/docs/src/images/Gotthard2_module.svg b/docs/src/images/Gotthard2_module.svg index ae1f29c7c..f59b24e63 100644 --- a/docs/src/images/Gotthard2_module.svg +++ b/docs/src/images/Gotthard2_module.svg @@ -1,3 +1,3 @@ -
Single Module
2
3
4
5
6
7
8
9
10
10 Chips
1
128 channels
Control Port
Veto Data Port
Data Port
\ No newline at end of file +
Single Module
Single Module
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
10 Chips
10 Chips
1
1
128 channels
128 channels
Control Port
Control Po...
Veto Data Port
Veto Data P...
Data Port
Data Port
\ No newline at end of file diff --git a/docs/src/images/Jungfrau_module.svg b/docs/src/images/Jungfrau_module.svg index a4f744a7a..90f438373 100644 --- a/docs/src/images/Jungfrau_module.svg +++ b/docs/src/images/Jungfrau_module.svg @@ -1,3 +1,3 @@ -
Single Module
3
1
2
4
7
5
6
8
256 pixels
256 pixels
8 Chips
Outer Data Port
Inner Data Port
Control Port
\ No newline at end of file +
Single Module
Single Module
3
3
1
1
2
2
4
4
7
7
5
5
6
6
8
8
256 pixels
256 pixels
256 pixels
256 pixels
8 Chips
8 Chips
Outer Data Port
Outer Data...
Inner Data Port
Inner Data...
Control Port
Control Po...
\ No newline at end of file diff --git a/docs/src/images/Jungfrau_read_rows.svg b/docs/src/images/Jungfrau_read_rows.svg index e1d9c163b..66f5784e4 100644 --- a/docs/src/images/Jungfrau_read_rows.svg +++ b/docs/src/images/Jungfrau_read_rows.svg @@ -1,3 +1,3 @@ -
3
1
2
4
7
5
6
8
Outer Data Port
Inner Data Port
\ No newline at end of file +
3
3
1
1
2
2
4
4
7
7
5
5
6
6
8
8
Outer Data Port
Outer Data...
Inner Data Port
Inner Data...
\ No newline at end of file diff --git a/docs/src/images/Jungfrau_two_port.svg b/docs/src/images/Jungfrau_two_port.svg index 3c52f9fe1..545c9dfb4 100644 --- a/docs/src/images/Jungfrau_two_port.svg +++ b/docs/src/images/Jungfrau_two_port.svg @@ -1,3 +1,3 @@ -
3
1
2
4
7
5
6
8
Inner Data Port
Outer Data Port
\ No newline at end of file +
3
3
1
1
2
2
4
4
7
7
5
5
6
6
8
8
Inner Data Port
Inner Data...
Outer Data Port
Outer Data...
\ No newline at end of file diff --git a/docs/src/images/Module_architecture.svg b/docs/src/images/Module_architecture.svg index d9697aeb3..c654a1ee5 100644 --- a/docs/src/images/Module_architecture.svg +++ b/docs/src/images/Module_architecture.svg @@ -1,3 +1,3 @@ -
Client
Control Server
(C98)
Stop Server
(C98)
Client 
On-board CPU
Registers
FPGA (VHDL)
UDP Generator
Readout and Processing Logic
Stop
Control
Sensor & Chip
Control
Data
MODULE
Spawns
UDP Port
UDP Port 2
TCP Port
Control
TCP Port
Stop
Receiver
Receiver
Data
\ No newline at end of file +
Client
Client
Control Server
(C98)
Control Server...
Stop Server
(C98)
Stop Server...
Client 
Client 
On-board CPU
On-board CPU
Registers
Registers
FPGA (VHDL)
FPGA (VHDL)
UDP Generator
UDP Generator
Readout and Processing Logic
Readout and Proces...
Stop
Stop
Control
Control
Sensor & Chip
Sensor & Chip
Control
Control
Data
Data
MODULE
MODULE
Spawns
Spawns
UDP Port
UDP Port
UDP Port 2
UDP Port 2
TCP Port
Control
TCP Port...
TCP Port
Stop
TCP Port...
Receiver
Receiver
Receiver
Receiver
Data
Data
\ No newline at end of file diff --git a/docs/src/images/Module_receiver_commands.svg b/docs/src/images/Module_receiver_commands.svg index 2dbe45c03..8a5788b65 100644 --- a/docs/src/images/Module_receiver_commands.svg +++ b/docs/src/images/Module_receiver_commands.svg @@ -1,3 +1,3 @@ -
UDP
Receiver
pc1234
10.0.1.100
Raw Data 
Packets
udp src port: hardcoded (32410)
udp_srcip  : 10.0.1.15
Module
bchip100
udp_dstport: 50001
udp_dstip  : 10.0.1.100
udp_dstmac : (specify for
custom receivers)
UDP
Receiver
pc1234
10.0.2.100
Raw Data 
Packets
Module
bchip101
udp src port: hardcoded (32410)
udp_srcip  : 10.0.2.15
udp_dstport: 50002
udp_dstip  : 10.0.2.100
udp_dstmac : (specify for
custom receivers)
\ No newline at end of file +
UDP
UDP
Receiver
pc1234
10.0.1.100
Receiver...
Raw Data 
Packets
Raw Data...
udp src port: hardcoded (32410)
udp_srcip  : 10.0.1.15
udp src port: hardcoded (32410)...
Module
bchip100
Module...
udp_dstport: 50001
udp_dstip  : 10.0.1.100
udp_dstmac : (specify for
custom receivers)
udp_dstport: 50001...
UDP
UDP
Receiver
pc1234
10.0.2.100
Receiver...
Raw Data 
Packets
Raw Data...
Module
bchip101
Module...
udp src port: hardcoded (32410)
udp_srcip  : 10.0.2.15
udp src port: hardcoded (32410)...
udp_dstport: 50002
udp_dstip  : 10.0.2.100
udp_dstmac : (specify for
custom receivers)
udp_dstport: 50002...
\ No newline at end of file diff --git a/docs/src/images/Moench_module.svg b/docs/src/images/Moench_module.svg index e98e1568d..f6a3bb867 100644 --- a/docs/src/images/Moench_module.svg +++ b/docs/src/images/Moench_module.svg @@ -1,3 +1,3 @@ -
Single Module
400 pixels
400 pixels
Control Port
Outer Data Port
Inner Data Port
\ No newline at end of file +
400 pixels
400 pixels
400 pixels
400 pixels
Control Port
Control Port
Outer Data Port
Outer Data...
Inner Data Port
Inner Data...
Single Module
Single Module
\ No newline at end of file diff --git a/docs/src/images/Moench_read_rows.svg b/docs/src/images/Moench_read_rows.svg index 6e097e351..c6b3f7ad3 100644 --- a/docs/src/images/Moench_read_rows.svg +++ b/docs/src/images/Moench_read_rows.svg @@ -1,3 +1,3 @@ -
Outer Data Port
Inner Data Port
\ No newline at end of file +
Outer Data Port
Outer Data...
Inner Data Port
Inner Data...
\ No newline at end of file diff --git a/docs/src/images/Moench_two_port.svg b/docs/src/images/Moench_two_port.svg index 1eca321ed..468c45925 100644 --- a/docs/src/images/Moench_two_port.svg +++ b/docs/src/images/Moench_two_port.svg @@ -1,3 +1,3 @@ -
Inner Data Port
Outer Data Port
\ No newline at end of file +
Inner Data Port
Inner Data...
Outer Data Port
Outer Data...
\ No newline at end of file diff --git a/docs/src/images/Mythen3_module.svg b/docs/src/images/Mythen3_module.svg index 0c255f3ac..2fd79812d 100644 --- a/docs/src/images/Mythen3_module.svg +++ b/docs/src/images/Mythen3_module.svg @@ -1,3 +1,3 @@ -
Single Module
2
3
4
5
6
7
8
9
10
10 Chips
128 channels
x
3 counters
Control Port
Data Port
\ No newline at end of file +
Single Module
Single Module
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
10 Chips
10 Chips
128 channels
x
3 counters
128 channels...
Control Port
Control Po...
Data Port
Data Port
\ No newline at end of file diff --git a/docs/src/images/Receiver_architecture.svg b/docs/src/images/Receiver_architecture.svg index f704007a5..cf59f0a6f 100644 --- a/docs/src/images/Receiver_architecture.svg +++ b/docs/src/images/Receiver_architecture.svg @@ -1,3 +1,3 @@ -
Data Streamer
Data Processor
Listener
Listener
Data Processor
Data Streamer
TCP Server
Client 
TCP Port
Control
Module
UDP Port
Assembles 
into images in memory
Optional callbacks 
for online processing
Optional File
Optional Data Streaming
Module
UDP Port 2
RECEIVER
Data packets
ZMQ Port
ZMQ Port 2
GUI
GUI
Frames
\ No newline at end of file +
Data Streamer
Data Streamer
Data Processor
Data Processor
Listener
Listener
Listener
Listener
Data Processor
Data Processor
Data Streamer
Data Streamer
TCP Server
TCP Server
Client 
Client 
TCP Port
Control
TCP Port...
Module
Module
UDP Port
UDP Port
Assembles 
into images in memory
Assembles...
Optional callbacks 
for online processing
Optional callbacks...
Optional File
Optional File
Optional Data Streaming
Optional Data Streaming
Module
Module
UDP Port 2
UDP Port 2
RECEIVER
RECEIVER
Data packets
Data packets
ZMQ Port
ZMQ Port
ZMQ Port 2
ZMQ Port 2
GUI
GUI
GUI
GUI
Frames
Frames
\ No newline at end of file diff --git a/docs/src/images/Receiver_external_process_commands.svg b/docs/src/images/Receiver_external_process_commands.svg index 7dca372d2..56c43bf05 100644 --- a/docs/src/images/Receiver_external_process_commands.svg +++ b/docs/src/images/Receiver_external_process_commands.svg @@ -1,3 +1,3 @@ -
Client/GUI
External
Process
129.129.200.175
Processed Data
ZMQ
Receiver streaming out
rx_zmqport = 30001

Receiver
pc1234
129.129.100.115
Receiver
pc1234
129.129.100.115
Receiver streaming out
rx_zmqport = 30002
ZMQ

Client listening to 
zmqport : 30004
zmqip   : 129.129.200.175

External Process:
rx_zmqport (30001) != zmqport (30004)
ZMQ

Client listening to 
zmqport : 30003
zmqip   : 129.129.200.175

ZMQ
Assembled Data

External Process listening to 
Ports : 30001, 30002
Ip    : 129.129.100.115

External Process streaming out 
Ports : 30003, 30004

\ No newline at end of file +
Client / GUI
Client / GUI
External
Process
129.129.200.175
External...
Processed Data
Processed Data
ZMQ
ZMQ
Receiver streaming out
rx_zmqport = 30001

Receiver streaming out...
Receiver
pc1234
129.129.100.115
Receiver...
Receiver
pc1234
129.129.100.115
Receiver...
Receiver streaming out
rx_zmqport = 30002
Receiver streaming out...
ZMQ
ZMQ

Client listening to 
zmqport : 30004
zmqip   : 129.129.200.175

Client listening to...
External Process:
rx_zmqport (30001) != zmqport (30004)
External Process:...
ZMQ
ZMQ

Client listening to 
zmqport : 30003
zmqip   : 129.129.200.175

Client listening to...
ZMQ
ZMQ
Assembled Data
Assembled Data

External Process listening to 
Ports : 30001, 30002
Ip    : 129.129.100.115

External Process listening to...

External Process streaming out 
Ports : 30003, 30004

External Process streaming out...
\ No newline at end of file diff --git a/docs/src/images/Receiver_gui_commands.svg b/docs/src/images/Receiver_gui_commands.svg index 8494f3ddf..5e0146754 100644 --- a/docs/src/images/Receiver_gui_commands.svg +++ b/docs/src/images/Receiver_gui_commands.svg @@ -1,3 +1,3 @@ -
ZMQ
ZMQ
GUI:  
zmqport (30001) = rx_zmqport (30001)
Assembled Data
Receiver streaming out
rx_zmqport = 30001

Receiver
pc1234
129.129.100.115
Receiver
pc1234
129.129.100.115
Receiver streaming out
rx_zmqport = 30002
Client/GUI

Client listening to 
zmqport : 30002
zmqip   : 129.129.100.115

Client listening to 
zmqport : 30001
zmqip   : 129.129.100.115

\ No newline at end of file +
ZMQ
ZMQ
ZMQ
ZMQ
GUI:  
zmqport (30001) = rx_zmqport (30001)
GUI:...
Assembled Data
Assembled Data
Receiver streaming out
rx_zmqport = 30001

Receiver streaming out...
Receiver
pc1234
129.129.100.115
Receiver...
Receiver
pc1234
129.129.100.115
Receiver...
Receiver streaming out
rx_zmqport = 30002
Receiver streaming out...
Client / GUI
Client / GUI

Client listening to 
zmqport : 30002
zmqip   : 129.129.100.115

Client listening to...

Client listening to 
zmqport : 30001
zmqip   : 129.129.100.115

Client listening to...
\ No newline at end of file diff --git a/docs/src/images/Soft_upgrade_components.svg b/docs/src/images/Soft_upgrade_components.svg index 79fe0cb6c..1ece21d25 100644 --- a/docs/src/images/Soft_upgrade_components.svg +++ b/docs/src/images/Soft_upgrade_components.svg @@ -1,3 +1,3 @@ -
Blackfin 
Detector Server
FPGA firmware 
(*.bit,*.pof,*.rbf)
slsDetectorPackage
(Client & Receiver)
UPGRADE COMPONENTS
\ No newline at end of file +
Blackfin on-board 
Detector Server
Blackfin on-board...
FPGA firmware 
(*.bit,*.pof,*.rbf)
FPGA firmware...
slsDetectorPackage
(Client & Receiver)
slsDetectorPackage...
UPGRADE COMPONENTS
UPGRADE COMPONENTS
\ No newline at end of file diff --git a/docs/src/images/System_communication_architecture.svg b/docs/src/images/System_communication_architecture.svg index 6edb75f58..af7ae4438 100644 --- a/docs/src/images/System_communication_architecture.svg +++ b/docs/src/images/System_communication_architecture.svg @@ -1,3 +1,3 @@ -
Module 3
Module 2
Module 1
Module (s)
UDP
Client / GUI
ZMQ
ZMQ
ZMQ
External 
Processing
Chain
TCP
TCP
Control 1:N
Control 1:N
Raw Data Packets 1:1
Image Data 1:N
Assembled Data 1:N
Processed Data 1:1
Module 3
Module 2
Module 1
Receiver (s)
Option 1: Directly 
Option 2: Indirectly
Detector
\ No newline at end of file +
Module 3
Module 3
Module 2
Module 2
Module 1
Module 1
Module (s)
Module (s)
UDP
UDP
Client / GUI
Client / GUI
ZMQ
ZMQ
ZMQ
ZMQ
ZMQ
ZMQ
External 
Processing
Chain
External...
TCP
TCP
TCP
TCP
Control 1:N
Control 1:N
Control 1:N
Control 1:N
Raw Data Packets 1:1
Raw Data Packets 1:1
Image Data 1:N
Image Data 1:N
Assembled Data 1:N
Assembled Data 1:N
Processed Data 1:1
Processed Data 1:1
Module 3
Module 3
Module 2
Module 2
Module 1
Module 1
Receiver (s)
Receiver (s)
Option 1: Directly 
Option 1: Directly 
Option 2: Indirectly
Option 2: Indirectly
Detector
Detector
\ No newline at end of file