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mostly to do with better testing methods in eiger server and separating acquisition, inclding start receiver etc

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This commit is contained in:
Maliakal Dhanya 2014-11-28 14:26:47 +01:00
commit f79f8558f0
17 changed files with 1639 additions and 768 deletions
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4
slsDetectorSoftware/commonFiles/sls_detector_defs.h
View File

@ -399,7 +399,9 @@ enum speedVariable {
TOT_DUTY_CYCLE, /**< wait states for bus read */ TOT_DUTY_CYCLE, /**< wait states for bus read */
SET_SIGNAL_LENGTH, /**< set/clear signal length */ SET_SIGNAL_LENGTH, /**< set/clear signal length */
PHASE_SHIFT, /**< adds phase shift */ PHASE_SHIFT, /**< adds phase shift */
OVERSAMPLING /**< oversampling for analog detectors */ OVERSAMPLING, /**< oversampling for analog detectors */
ADC_CLOCK, /**< adc clock divider */
ADC_PHASE /**< adc clock phase */
}; };

704
slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c
View File

@ -4,6 +4,10 @@
#include "mcb_funcs.h" #include "mcb_funcs.h"
#include "registers_m.h" #include "registers_m.h"
//#define VERBOSE
//#define VERYVERBOSE
#ifdef SHAREDMEMORY #ifdef SHAREDMEMORY
#include "sharedmemory.h" #include "sharedmemory.h"
#endif #endif
@ -32,7 +36,7 @@ int dataBytes=NMAXMOD*NCHIP*NCHAN*2;
int storeInRAM=0; int storeInRAM=0;
int ROI_flag=0; int ROI_flag=0;
int adcConfigured=-1; int adcConfigured=-1;
u_int32_t *ram_values=NULL; u_int16_t *ram_values=NULL;
volatile char *now_ptr=NULL; volatile char *now_ptr=NULL;
volatile u_int16_t *values; volatile u_int16_t *values;
int ram_size=0; int ram_size=0;
@ -44,6 +48,8 @@ int phase_shift=0;//DEFAULT_PHASE_SHIFT;
int ipPacketSize=DEFAULT_IP_PACKETSIZE; int ipPacketSize=DEFAULT_IP_PACKETSIZE;
int udpPacketSize=DEFAULT_UDP_PACKETSIZE; int udpPacketSize=DEFAULT_UDP_PACKETSIZE;
u_int32_t clkDivider[2]={32,32};
int ififostart, ififostop, ififostep, ififo; int ififostart, ififostop, ififostep, ififo;
@ -176,7 +182,7 @@ int mapCSP0(void) {
printf("CSPOBASE=from %08x to %x\n",CSP0BASE,CSP0BASE+MEM_SIZE); printf("CSPOBASE=from %08x to %x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
u_int32_t address; u_int32_t address;
address = FIFO_DATA_REG_OFF; address = FIFO_DATA_REG;//_OFF;
values=(u_int16_t*)(CSP0BASE+address*2); values=(u_int16_t*)(CSP0BASE+address*2);
printf("statusreg=%08x\n",bus_r(STATUS_REG)); printf("statusreg=%08x\n",bus_r(STATUS_REG));
printf("\n\n"); printf("\n\n");
@ -254,31 +260,6 @@ int setPhaseShiftOnce(){
return OK; return OK;
} }
int phaseStep(int st){
u_int32_t addr;
int i;
addr=MULTI_PURPOSE_REG;
if (st>0) {
bus_w(PLL_CNTRL_REG, 1);//reset PLL
bus_w(PLL_CNTRL_REG, 0);
phase_shift=0;
for (i=0;i<st;i++) {
bus_w(addr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT|PHASE_STEP_BIT));//0x2821
bus_w(addr,(INT_RSTN_BIT|ENET_RESETN_BIT|(SW1_BIT&~PHASE_STEP_BIT)));//0x2820
phase_shift++;
}
}
#ifdef VERBOSE
printf("Multipupose reg now:%x\n",bus_r(addr));
#endif
return phase_shift;
}
int cleanFifo(){ int cleanFifo(){
@ -380,149 +361,200 @@ u_int32_t readin(int modnum) {
return 0; return 0;
} }
u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val) { u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) {
u_int32_t vv=reg<<PLL_CNTR_ADDR_OFF;
bus_w(PLL_PARAM_REG,val); bus_w(PLL_PARAM_REG,val);
bus_w(PLL_CNTRL_REG,(reg<<PLL_CNTR_ADDR_OFF)); printf("param: %x\n",val);
usleep(1000);
bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_WRITE_BIT)|(reg<<PLL_CNTR_ADDR_OFF));
usleep(1000);
bus_w(PLL_CNTRL_REG,(reg<<PLL_CNTR_ADDR_OFF));
usleep(1000);
bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_READ_BIT)|(reg<<PLL_CNTR_ADDR_OFF));
usleep(1000);
val=bus_r(PLL_PARAM_OUT_REG);
printf("counter %x reg: %x\n",reg,val);
bus_w(PLL_CNTRL_REG,(reg<<PLL_CNTR_ADDR_OFF));
bus_w(PLL_CNTRL_REG,vv);
printf("wrote: %08x\n",vv);
usleep(1000);
vv=(1<<PLL_CNTR_WRITE_BIT)|(reg<<PLL_CNTR_ADDR_OFF)|(trig<<15);
bus_w(PLL_CNTRL_REG,vv);//15 is trigger for the tap
printf("wrote: %08x\n",vv);
usleep(1000);
vv=(reg<<PLL_CNTR_ADDR_OFF);
printf("wrote: %08x\n",vv);
bus_w(PLL_CNTRL_REG,vv);
usleep(1000);
while(bus_r(STATUS_REG)&PLL_RECONFIG_BUSY) {
printf("set: reconfig busy");
}
// bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_READ_BIT)|(reg<<PLL_CNTR_ADDR_OFF));
// usleep(1000);
// val=bus_r(PLL_PARAM_OUT_REG);
// printf("counter %x reg: %x\n",reg,val);
// bus_w(PLL_CNTRL_REG,(reg<<PLL_CNTR_ADDR_OFF));
/* usleep(100); */
/* bus_w(PLL_CNTRL_REG,PLL_CNTR_PLL_RESET_BIT); */
/* usleep(100); */
/* bus_w(PLL_CNTRL_REG,0); */
return val; return val;
} }
u_int32_t getPllReconfigReg(u_int32_t reg) { u_int32_t getPllReconfigReg(u_int32_t reg, int trig) {
int i; int i;
u_int32_t val; u_int32_t val=reg<<PLL_CNTR_ADDR_OFF;
bus_w(PLL_CNTRL_REG,(reg<<PLL_CNTR_ADDR_OFF)); u_int32_t vv;
usleep(1000);
bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_READ_BIT)|(reg<<PLL_CNTR_ADDR_OFF));
usleep(1000);
for (i=0; i<10; i++) {
val=bus_r(PLL_PARAM_OUT_REG);
printf("counter %x reg: %x\n",reg,val);
}
bus_w(PLL_CNTRL_REG,(reg<<PLL_CNTR_ADDR_OFF));
return val; printf("cntrlreg: %08x\n",PLL_CNTRL_REG);
printf("wrote: %08x\n",val);
bus_w(PLL_CNTRL_REG,val);
// printf("read: %08x\n",bus_r(PLL_CNTRL_REG));
usleep(100);
val=(1<<PLL_CNTR_READ_BIT)|(reg<<PLL_CNTR_ADDR_OFF)|(trig<<15);
printf("wrote: %08x\n",val);
bus_w(PLL_CNTRL_REG,val);//15 is trigger for the tap
// printf("read: %08x\n",bus_r(PLL_CNTRL_REG));
usleep(100);
/* for (i=0; i<10; i++) { */
vv=bus_r(PLL_PARAM_OUT_REG);
printf("addr %x reg: %x\n",reg,vv);
/* usleep(100); */
/* } */
val=(reg<<PLL_CNTR_ADDR_OFF);
printf("wrote: %08x\n",val);
bus_w(PLL_CNTRL_REG,val);
usleep(100);
val=0;
printf("wrote: %08x\n",val);
bus_w(PLL_CNTRL_REG,val);
while(bus_r(STATUS_REG)&PLL_RECONFIG_BUSY) {
printf("get: reconfig busy");
}
return vv;
} }
void resetPLL() {
bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_RECONFIG_RESET_BIT)|(1<<PLL_CNTR_PLL_RESET_BIT)); //reset PLL and pll reconfig
usleep(100);
bus_w(PLL_CNTRL_REG, 0);
}
u_int32_t setClockDivider(int d) { u_int32_t setClockDivider(int d, int ic) {
int nc; u_int32_t l=0x0c;
if (d>1) nc=d;// nc=161/d; u_int32_t h=0x0d;
else return -1; u_int32_t val;
if (nc>255)
return -1;
int addr, addr1, addr0;
u_int32_t pat,pat1,pat0;
addr= PLL_PARAM_REG;
addr0= PLL_PARAM_OUT_REG;
addr1=PLL_CNTRL_REG;
pat1=0x10;
//write high count c0 u_int32_t tot=800/d;
/* pat=(1<<12)|(7<<9)|nc; */ u_int32_t odd=0;
/* bus_w(addr, pat); */
/* bus_w(addr1, pat1); */
/* bus_w(addr1, 0); */ // int ic=0 is run clk; ic=1 is adc clk
/* usleep (1000); */ printf("set clk divider %d to %d\n", ic, d);
/* pat=bus_r(addr0); */ if (ic>1)
/* bus_w(addr1, 0x4); */ return -1;
/* bus_w(addr1, 0); */
/* pat=bus_r(addr0); */
/* printf("M nominal count read %x (%d)\n",pat,(pat&0x1ff)); */
//write low count c0 l=tot/2;
pat=(nc-1)|(4<<12)|(1<<9); h=l;
bus_w(addr, pat); if (tot>2*l) {
bus_w(addr1, pat1); h=l+1;
bus_w(addr1, 0); odd=1;
pat0=bus_r(PLL_PARAM_OUT_REG); }
usleep (1000); printf("Low is %d, High is %d\n",l,h);
printf("C0 low count status %x\n",pat0);
//write high count c0 if (l>255 || h>255)
pat=(nc)|(4<<12)|(0<<9); return -1; //values out of range
bus_w(addr, pat);
bus_w(addr1, pat1);
bus_w(addr1, 0);
pat0=bus_r(PLL_PARAM_OUT_REG);
printf("C0 high count status %x\n",pat0);
usleep (1000);
//write low count c1
pat=(nc-1)|(5<<12)|(1<<9);
bus_w(addr, pat);
bus_w(addr1, pat1);
bus_w(addr1, 0);
pat0=bus_r(PLL_PARAM_OUT_REG);
printf("C1 high count status %x\n",pat0);
usleep (1000);
//write high count c1
pat=(nc)|(5<<12)|(0<<9);
bus_w(addr, pat);
bus_w(addr1, pat1);
bus_w(addr1, 0);
pat0=bus_r(PLL_PARAM_OUT_REG);
printf("C1 low count status %x\n",pat0);
usleep (1000);
//reconfigure pll
pat1=0x8;
bus_w(addr1, pat1);
bus_w(addr1, 0);
pat0=bus_r(PLL_PARAM_OUT_REG);
printf("configure status %d\n",pat0);
sleep (1);
printf("finish status %x\n",pat0);
bus_w(PLL_CNTRL_REG, 1); //reset PLL
setPllReconfigReg(PLL_MODE_REG,1,0);
getPllReconfigReg(PLL_MODE_REG,0);
val= (ic<<18)| (odd<<17) | l | (h<<8); //odd division
printf("val: %08x\n", val);
setPllReconfigReg(PLL_C_COUNTER_REG, val,1);
setPllReconfigReg(PLL_START_REG, 1,1);
usleep(100000);
bus_w(PLL_CNTRL_REG, 0); bus_w(PLL_CNTRL_REG, 0);
return 0; clkDivider[ic]=d;
return clkDivider[ic];
}
int phaseStep(int st, int ic){
u_int32_t addr;
/* int ic=0 is run clk; ic=1 is adc clk */
/* if (st>0) */
/* ic=1; */
/* else { */
/* ic=0; */
/* st*=-1; */
/* } */
bus_w(PLL_CNTRL_REG, 0);
setPllReconfigReg(PLL_MODE_REG,1,0);
getPllReconfigReg(PLL_MODE_REG,0);
setPllReconfigReg(PLL_PHASE_SHIFT_REG,st|(ic<<21),0); //shifts counter 0
printf("shift %08x\n",st|(ic<<21));
setPllReconfigReg(PLL_START_REG, 1,1);
usleep(100000);
bus_w(PLL_CNTRL_REG, 0);
setClockDivider(clkDivider[ic],ic);
return st;
} }
u_int32_t getClockDivider(int ic) {
u_int32_t getClockDivider() { if (ic>1)
return -1;
return clkDivider[ic];
/* int ic=0; */
/* u_int32_t val; */
/* u_int32_t l,h; */
/* printf("get clk divider\n"); */
/* setPllReconfigReg(PLL_MODE_REG,1,0); */
/* getPllReconfigReg(PLL_MODE_REG,0); */
/* u_int32_t addr=0xa; //c0 */
/* if (ic>0) */
/* addr=0xb; //c1 */
/* val=getPllReconfigReg(PLL_N_COUNTER_REG,0); */
/* printf("Getting N counter %08x\n",val); */
/* l=val&0xff; */
/* h=(val>>8)&0xff; */
/* //getPllReconfigReg(PLL_STATUS_REG,0); */
/* val=getPllReconfigReg(addr,0); */
/* printf("Getting C counter %08x\n",val); */
int ic=0; /* return 800/(l+h); */
//reset pll_reconfig to initial values
bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_RECONFIG_RESET_BIT));
usleep(1000);
// bus_w(PLL_CNTRL_REG,0);
setPllReconfigReg(PLL_MODE_REG,1);
getPllReconfigReg(PLL_MODE_REG);
getPllReconfigReg(PLL_N_COUNTER_REG);
getPllReconfigReg(PLL_M_COUNTER_REG);
return 0;
} }
@ -1156,16 +1188,33 @@ int64_t getActualTime(){
int64_t getMeasurementTime(){ int64_t getMeasurementTime(){
int64_t v=get64BitReg(GET_MEASUREMENT_TIME_LSB_REG, GET_MEASUREMENT_TIME_MSB_REG); int64_t v=get64BitReg(GET_MEASUREMENT_TIME_LSB_REG, GET_MEASUREMENT_TIME_MSB_REG);
int64_t mask=0x8000000000000000; // int64_t mask=0x8000000000000000;
if (v & mask ) { // if (v & mask ) {
#ifdef VERBOSE //#ifdef VERBOSE
printf("no measurement time left\n"); // printf("no measurement time left\n");
#endif //#endif
return -1E+9; // return -1E+9;
} else // } else
return v/(1E-9*CLK_FREQ); return v/(1E-9*CLK_FREQ);
} }
int64_t getFramesFromStart(){
int64_t v=get64BitReg(FRAMES_FROM_START_LSB_REG, FRAMES_FROM_START_MSB_REG);
int64_t v1=get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG);
printf("Frames from start data streaming %lld\n",v);
printf("Frames from start run control %lld\n",v1);
// int64_t mask=0x8000000000000000;
// if (v & mask ) {
//#ifdef VERBOSE
// printf("no measurement time left\n");
//#endif
// return -1E+9;
// } else
return v;
}
@ -1684,6 +1733,8 @@ int i;
for(i=0;i<100;i++){ for(i=0;i<100;i++){
//start state machine //start state machine
bus_w16(CONTROL_REG, FIFO_RESET_BIT);
bus_w16(CONTROL_REG, 0x0);
bus_w16(CONTROL_REG, START_ACQ_BIT | START_EXPOSURE_BIT); bus_w16(CONTROL_REG, START_ACQ_BIT | START_EXPOSURE_BIT);
bus_w16(CONTROL_REG, 0x0); bus_w16(CONTROL_REG, 0x0);
//verify //verify
@ -1794,21 +1845,23 @@ u_int32_t fifo_full(void)
} }
u_int32_t* fifo_read_event() u_int16_t* fifo_read_event()
{ {
int i=0;
int i=0;
#ifdef VIRTUAL #ifdef VIRTUAL
return NULL; return NULL;
#endif #endif
#ifdef VERBOSE #ifdef VERBOSE
printf("before looping\n"); printf("before looping\n");
volatile u_int32_t fs;
#endif #endif
volatile u_int32_t t = bus_r(LOOK_AT_ME_REG); volatile u_int32_t t = bus_r16(LOOK_AT_ME_REG);
#ifdef VERBOSE #ifdef VERBOSE
printf("Data bytes is %d\n", dataBytes);
printf("lookatmereg=x%x\n",t); printf("lookatmereg=x%x\n",t);
#endif #endif
/* /*
@ -1821,7 +1874,7 @@ u_int32_t* fifo_read_event()
} }
*/ */
while((t&0x1)==0) { while(t==0) {
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG)); printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
#endif #endif
@ -1833,27 +1886,27 @@ u_int32_t* fifo_read_event()
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf("status should be idle!..look at me reg:%08x\n",bus_r(LOOK_AT_ME_REG)); printf("status should be idle!..look at me reg:%08x\n",bus_r(LOOK_AT_ME_REG));
#endif #endif
if ((t&0x1)==0) { if (t==0) {
#ifdef VERBOSE //#ifdef VERBOSE
printf("no frame found - exiting\n"); printf("no frame found - exiting\n");
printf("%08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG)); printf("%08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
#endif //#endif
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf("returning null\n"); printf("returning null\n");
#endif
printf("lookatmereg=x%x\n",t); printf("lookatmereg=x%x\n",t);
#endif
return NULL; return NULL;
} else { } else {
#ifdef VERBOSE //#ifdef VERBOSE
printf("no frame found %x status %x\n", bus_r(LOOK_AT_ME_REG),runState()); printf("no frame found %x status %x\n", bus_r(LOOK_AT_ME_REG),runState());
#endif //#endif
break; break;
} }
} }
t = bus_r(LOOK_AT_ME_REG); t = bus_r(LOOK_AT_ME_REG);
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf("before starting while loop again: look at me reg:%08x\n\n",bus_r(LOOK_AT_ME_REG)); printf("before starting while loop again: look at me reg:%08x\n\n",bus_r(LOOK_AT_ME_REG));
#endif #endif
if (i%1000==0) if (i%1000==0)
printf("%08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG)); printf("%08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
i++; i++;
@ -1863,21 +1916,37 @@ u_int32_t* fifo_read_event()
#endif #endif
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG)); printf("before readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
i=0;
for (i=0; i<32; i++) {
printf("Fifo %d (%04x) status :\n", i,FIFO_STATUS_REG | i);
fs=bus_r16(FIFO_STATUS_REG | i);
printf("before: %x\n",fs);
}
#endif #endif
dma_memcpy(now_ptr,values ,dataBytes); dma_memcpy(now_ptr,values ,dataBytes);
//memcpy(now_ptr,values ,dataBytes); //this reads the fifo twice...
#ifdef VERYVERBOSE
for (i=0; i<32; i++) {
fs=bus_r16(FIFO_STATUS_REG | i);
printf("after %d: %x\n",i, fs);
}
#endif
#ifdef VERYVERBOSE #ifdef VERYVERBOSE
int a; int a;
for (a=0;a<8; a=a+2) for (a=0;a<8; a=a+2)
printf("\n%d %d: x%04x x%04x ",a+1,a,*(now_ptr+a+1),*(now_ptr+a) ); printf("\n%d %d: x%04x x%04x ",a+1,a,*(now_ptr+a+1),*(now_ptr+a) );
for (a=2554;a<2560; a=a+2) // for (a=2554;a<2560; a=a+2)
printf("\n%d %d: x%04x x%04x ",a+1,a,*(now_ptr+a+1),*(now_ptr+a) ); // printf("\n%d %d: x%04x x%04x ",a+1,a,*(now_ptr+a+1),*(now_ptr+a) );
printf("********\n"); printf("********\n");
//memcpy(now_ptr, values, dataBytes); //memcpy(now_ptr, values, dataBytes);
#endif //#endif
#ifdef VERYVERBOSE //#ifdef VERYVERBOSE
printf("Copying to ptr %08x %d\n",(unsigned int)(now_ptr), dataBytes); printf("Copying to ptr %08x %d\n",(unsigned int)(now_ptr), dataBytes);
printf("after readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG)); printf("after readout %08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
#endif #endif
@ -1885,7 +1954,9 @@ u_int32_t* fifo_read_event()
if (storeInRAM>0) { if (storeInRAM>0) {
now_ptr+=dataBytes; now_ptr+=dataBytes;
} }
#ifdef VERYVERBOSE
printf("lookatmereg=x%x\n",t); printf("lookatmereg=x%x\n",t);
#endif
return ram_values; return ram_values;
} }
@ -2091,26 +2162,36 @@ int prepareADC(){
codata=0; codata=0;
codata=(0x14<<8)+(0x0); //command and value; codata=(0x14<<8)+(0x0); //command and value;
valw=0xff; bus_w(ADC_WRITE_REG,(valw)); // start point valw=0xff;
valw=((0xffffffff&(~csmask)));bus_w(ADC_WRITE_REG,valw); //chip sel bar down bus_w(ADC_WRITE_REG,(valw)); // start point
valw=((0xffffffff&(~csmask)));
bus_w(ADC_WRITE_REG,valw); //chip sel bar down
for (i=0;i<24;i++) { for (i=0;i<24;i++) {
valw=valw&(~(0x1<<cdx));bus_w(ADC_WRITE_REG,valw);usleep(0); //cldwn valw=valw&(~(0x1<<cdx));//cldwn
bus_w(ADC_WRITE_REG,valw);
usleep(0);
#ifdef VERBOSE #ifdef VERBOSE
printf("DOWN 0x%x \n",valw); printf("DOWN 0x%x \n",valw);
#endif #endif
valw=(valw&(~(0x1<<ddx)))+(((codata>>(23-i))&0x1)<<ddx); bus_w(ADC_WRITE_REG,valw); usleep(0); //write data (i) valw=(valw&(~(0x1<<ddx)))+(((codata>>(23-i))&0x1)<<ddx); //write data (i)
bus_w(ADC_WRITE_REG,valw);
usleep(0);
#ifdef VERBOSE #ifdef VERBOSE
printf("LOW 0x%x \n",valw); printf("LOW 0x%x \n",valw);
#endif #endif
valw=valw+(0x1<<cdx);bus_w(ADC_WRITE_REG,valw); usleep(0); //clkup valw=valw+(0x1<<cdx);bus_w(ADC_WRITE_REG,valw); //clkup
usleep(0);
#ifdef VERBOSE #ifdef VERBOSE
printf("up 0x%x \n",valw); printf("up 0x%x \n",valw);
#endif #endif
} }
valw=valw&(~(0x1<<cdx));usleep(0); valw=valw&(~(0x1<<cdx));usleep(0);
valw=0xff; bus_w(ADC_WRITE_REG,(valw)); // stop point =start point */ valw=0xff; bus_w(ADC_WRITE_REG,(valw)); // stop point =start point */
return;
bus_w(ADC_LATCH_DISABLE_REG,0x0); // enable all ADCs
bus_w(DAQ_REG,0xd);
return;
} }
@ -2611,22 +2692,52 @@ int calibratePedestal(int frames){
printf("---------------------------\n"); printf("---------------------------\n");
return 0; return 0;
} }
uint64_t readPatternWord(int addr) {
uint64_t word=0;
int cntrl=0;
if (addr>=MAX_PATTERN_LENGTH)
return -1;
printf("read %x\n",addr);
cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET;
bus_w(PATTERN_CNTRL_REG, cntrl);
usleep(1000);
bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_READ_BIT) );
usleep(1000);
printf("reading\n");
word=get64BitReg(PATTERN_OUT_LSB_REG,PATTERN_OUT_MSB_REG);
printf("read %llx\n", word);
usleep(1000);
bus_w(PATTERN_CNTRL_REG, cntrl);
printf("done\n");
return word;
}
uint64_t writePatternWord(int addr, uint64_t word) { uint64_t writePatternWord(int addr, uint64_t word) {
int cntrl=0; int cntrl=0;
if (addr>=MAX_PATTERN_LENGTH) if (addr>=MAX_PATTERN_LENGTH)
return -1; return -1;
if (word=!-1){ printf("write %x %llx\n",addr, word);
if (word!=-1){
set64BitReg(word,PATTERN_IN_REG_LSB,PATTERN_IN_REG_MSB); set64BitReg(word,PATTERN_IN_REG_LSB,PATTERN_IN_REG_MSB);
cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET; cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET;
bus_w(PATTERN_CNTRL_REG, cntrl); bus_w(PATTERN_CNTRL_REG, cntrl);
usleep(1000);
bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_WRITE_BIT) ); bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_WRITE_BIT) );
usleep(1000);
bus_w(PATTERN_CNTRL_REG, cntrl); bus_w(PATTERN_CNTRL_REG, cntrl);
} return word;
return word; } else
return readPatternWord(addr);
} }
uint64_t writePatternIOControl(uint64_t word) { uint64_t writePatternIOControl(uint64_t word) {
if (word>=0)set64BitReg(word,PATTERN_IOCTRL_REG_LSB,PATTERN_IOCTRL_REG_MSB); if (word>=0)set64BitReg(word,PATTERN_IOCTRL_REG_LSB,PATTERN_IOCTRL_REG_MSB);
@ -2643,89 +2754,246 @@ int setPatternLoop(int level, int *start, int *stop, int *n) {
int ret=OK; int ret=OK;
int lval=0; int lval=0;
int nreg;
int areg;
switch (level) { switch (level ) {
case 0: case 0:
if (*n>=0) bus_w(*n,PATTERN_N_LOOP0_REG); nreg=PATTERN_N_LOOP0_REG;
*n=bus_r(PATTERN_N_LOOP0_REG); areg=PATTERN_LOOP0_AREG;
lval=bus_r(PATTERN_LOOP0_AREG);
if (*start==-1) *start=(lval>> ASTART_OFFSET) & APATTERN_MASK;
if (*stop==-1) *start=(lval>> ASTOP_OFFSET) & APATTERN_MASK;
lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET);
bus_w(lval, PATTERN_LOOP0_AREG);
break; break;
case 1: case 1:
if (*n>=0) bus_w(*n,PATTERN_N_LOOP1_REG); nreg=PATTERN_N_LOOP1_REG;
*n=bus_r(PATTERN_N_LOOP1_REG); areg=PATTERN_LOOP1_AREG;
lval=bus_r(PATTERN_LOOP1_AREG);
if (*start==-1) *start=(lval>> ASTART_OFFSET) & APATTERN_MASK;
if (*stop==-1) *start=(lval>> ASTOP_OFFSET) & APATTERN_MASK;
lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET);
bus_w(lval, PATTERN_LOOP1_AREG);
break; break;
case 2: case 2:
if (*n>=0) bus_w(*n,PATTERN_N_LOOP2_REG); nreg=PATTERN_N_LOOP2_REG;
*n=bus_r(PATTERN_N_LOOP2_REG); areg=PATTERN_LOOP2_AREG;
lval=bus_r(PATTERN_LOOP2_AREG);
if (*start==-1) *start=(lval>> ASTART_OFFSET) & APATTERN_MASK;
if (*stop==-1) *start=(lval>> ASTOP_OFFSET) & APATTERN_MASK;
lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET);
bus_w(lval, PATTERN_LOOP2_AREG);
break; break;
case -1: case -1:
nreg=-1;
lval=bus_r(PATTERN_LIMITS_AREG); areg=PATTERN_LIMITS_AREG;
if (*start==-1) start=(lval>> ASTART_OFFSET) & APATTERN_MASK;
if (*stop==-1) start=(lval>> ASTOP_OFFSET) & APATTERN_MASK;
lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET);
bus_w(lval, PATTERN_LIMITS_AREG);
break; break;
default: default:
ret=FAIL; return FAIL;
}
printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n);
if (nreg>=0) {
if ((*n)>=0) bus_w(nreg, *n);
printf ("n %d\n",*n);
*n=bus_r(nreg);
printf ("n %d\n",*n);
} }
printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n);
lval=bus_r(areg);
printf("lval %x\n",lval);
if (*start==-1) *start=(lval>> ASTART_OFFSET) & APATTERN_MASK;
printf("start %x\n",*start);
if (*stop==-1) *stop=(lval>> ASTOP_OFFSET) & APATTERN_MASK;
printf("stop %x\n",*start);
lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET);
printf("lval %x\n",lval);
bus_w(areg,lval);
printf("lval %x\n",lval);
return ret; return ret;
} }
int setPatternWaitAddress(int level, int addr) { int setPatternWaitAddress(int level, int addr) {
int ret=-1; int ret=-1;
int reg;
switch (level) { switch (level) {
case 0: case 0:
if (addr>=0) bus_w(addr,PATTERN_WAIT0_AREG); reg=PATTERN_WAIT0_AREG;
return bus_r(PATTERN_WAIT0_AREG); break;
case 1: case 1:
if (addr>=0) bus_w(addr,PATTERN_WAIT1_AREG); reg=PATTERN_WAIT1_AREG;
return bus_r(PATTERN_WAIT1_AREG); break;
case 2: case 2:
if (addr>=0) bus_w(addr,PATTERN_WAIT2_AREG); reg=PATTERN_WAIT2_AREG;
return bus_r(PATTERN_WAIT2_AREG); break;
default:
return -1;
}; };
printf ("%d addr %x\n",level,addr);
return ret; if (addr>=0) bus_w(reg, addr);
printf ("%d addr %x %x\n",level,addr, bus_r(reg));
return bus_r(reg);
} }
uint64_t setPatternWaitTime(int level, uint64_t t) { uint64_t setPatternWaitTime(int level, uint64_t t) {
uint64_t ret=-1; uint64_t ret=-1;
int reglsb;
int regmsb;
switch (level) { switch (level) {
case 0: case 0:
if (t>=0) set64BitReg(t,PATTERN_WAIT0_TIME_REG_LSB,PATTERN_WAIT0_TIME_REG_MSB); reglsb=PATTERN_WAIT0_TIME_REG_LSB;
return get64BitReg(PATTERN_WAIT0_TIME_REG_LSB,PATTERN_WAIT0_TIME_REG_MSB); regmsb=PATTERN_WAIT0_TIME_REG_MSB;
break;
case 1: case 1:
if (t>=0) set64BitReg(t,PATTERN_WAIT1_TIME_REG_LSB,PATTERN_WAIT1_TIME_REG_MSB); reglsb=PATTERN_WAIT1_TIME_REG_LSB;
return get64BitReg(PATTERN_WAIT1_TIME_REG_LSB,PATTERN_WAIT1_TIME_REG_MSB); regmsb=PATTERN_WAIT1_TIME_REG_MSB;
break;
case 2: case 2:
if (t>=0) set64BitReg(t,PATTERN_WAIT2_TIME_REG_LSB,PATTERN_WAIT2_TIME_REG_MSB); reglsb=PATTERN_WAIT2_TIME_REG_LSB;
return get64BitReg(PATTERN_WAIT2_TIME_REG_LSB,PATTERN_WAIT2_TIME_REG_MSB); regmsb=PATTERN_WAIT2_TIME_REG_MSB;
break;
default:
return -1;
} }
return ret;
if (t>=0) set64BitReg(t,reglsb,regmsb);
return get64BitReg(reglsb,regmsb);
}
void initDac(int dacnum) {
u_int32_t offw,codata;
u_int16_t valw;
int iru,i,ddx,csdx,cdx;
//setting int reference
offw=DAC_REG;
ddx=0; cdx=1;
csdx=dacnum/8+2;
printf("data bit=%d, clkbit=%d, csbit=%d",ddx,cdx,csdx);
codata=((((0x6)<<4)+((0xf))<<16)+((0x0<<4)&0xfff0));
valw=0xffff; bus_w(offw,(valw)); // start point
valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
for (i=1;i<25;i++) {
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
// printf("%d ", ((codata>>(24-i))&0x1));
valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
}
// printf("\n ");
valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course */
//end of setting int reference
}
int setDacRegister(int dacnum,int dacvalue) {
int val;
if (dacnum%2) {
val=((dacvalue & 0xffff)<<16) | getDacRegister(dacnum-1);
} else {
val=(getDacRegister(dacnum+1)<<16) | (dacvalue & 0xffff);
}
printf("Dac register %x wrote %08x\n",(128+dacnum/2)<<11,val);
bus_w((128+dacnum/2)<<11, val);
return getDacRegister(dacnum);
}
int getDacRegister(int dacnum) {
int retval;
retval=bus_r((128+dacnum/2)<<11);
printf("Dac register %x read %08x\n",(128+dacnum/2)<<11,retval);
if (dacnum%2)
return (retval>>16)&0xffff;
else
return retval&0xffff;
}
int setDac(int dacnum,int dacvalue){
u_int32_t offw,codata;
u_int16_t valw;
int iru,i,ddx,csdx,cdx;
int retval;
int dacch=0;
if (dacvalue>=0) {
//setting int reference
offw=DAC_REG;
ddx=0; cdx=1;
csdx=dacnum/8+2;
dacch=dacnum%8;
printf("data bit=%d, clkbit=%d, csbit=%d",ddx,cdx,csdx);
codata=((((0x2)<<4)+((dacch)&0xf))<<16)+((dacvalue<<4)&0xfff0);
valw=0xffff; bus_w(offw,(valw)); // start point
valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
for (i=1;i<25;i++) {
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
// printf("%d ", ((codata>>(24-i))&0x1));
valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
}
// printf("\n ");
valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course */
printf("Writing %d in DAC(0-15) %d \n",dacvalue,dacnum);
setDacRegister(dacnum,dacvalue);
}
return getDacRegister(dacnum);
} }

18
slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h
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@ -29,14 +29,19 @@ u_int32_t bus_w(u_int32_t offset, u_int32_t data);
u_int32_t bus_r(u_int32_t offset); u_int32_t bus_r(u_int32_t offset);
int setPhaseShiftOnce(); int setPhaseShiftOnce();
int phaseStep(int st); int phaseStep(int st, int ic);
int cleanFifo(); int cleanFifo();
int setDAQRegister(); int setDAQRegister();
u_int32_t putout(char *s, int modnum); u_int32_t putout(char *s, int modnum);
u_int32_t readin(int modnum); u_int32_t readin(int modnum);
u_int32_t setClockDivider(int d); u_int32_t setClockDivider(int d, int ic);
u_int32_t getClockDivider(); u_int32_t getClockDivider(int ic);
void resetPLL();
u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig);
u_int32_t getPllReconfigReg(u_int32_t reg, int trig);
u_int32_t setSetLength(int d); u_int32_t setSetLength(int d);
u_int32_t getSetLength(); u_int32_t getSetLength();
u_int32_t setWaitStates(int d); u_int32_t setWaitStates(int d);
@ -109,7 +114,7 @@ int64_t setProgress();
int64_t getActualTime(); int64_t getActualTime();
int64_t getMeasurementTime(); int64_t getMeasurementTime();
int64_t getFramesFromStart();
u_int32_t runBusy(void); u_int32_t runBusy(void);
u_int32_t runState(void); u_int32_t runState(void);
@ -128,7 +133,7 @@ u_int32_t fifo_full(void);
u_int32_t* fifo_read_event(); u_int16_t* fifo_read_event();
u_int32_t* decode_data(int* datain); u_int32_t* decode_data(int* datain);
//u_int32_t move_data(u_int64_t* datain, u_int64_t* dataout); //u_int32_t move_data(u_int64_t* datain, u_int64_t* dataout);
int setDynamicRange(int dr); int setDynamicRange(int dr);
@ -157,7 +162,8 @@ int setPatternWaitAddress(int level, int addr);
uint64_t setPatternWaitTime(int level, uint64_t t); uint64_t setPatternWaitTime(int level, uint64_t t);
void initDac(int dacnum);
int setDac(int dacnum,int dacvalue);
/* /*

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slsDetectorSoftware/jungfrauDetectorServer/jungfrauDetectorServer
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slsDetectorSoftware/jungfrauDetectorServer/jungfrauDetectorServer.gdb
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650
slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c
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@ -235,47 +235,47 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
/* Register commands */ /* Register commands */
int clearDACSregister(int imod) { /* int clearDACSregister(int imod) { */
putout("1111111111111111",imod);//reset /* putout("1111111111111111",imod);//reset */
putout("1111111111111110",imod);//cs down /* putout("1111111111111110",imod);//cs down */
/* commented out by dhanya /* /\* commented out by dhanya */
putout("0000000001000000",imod); /* putout("0000000001000000",imod); */
putout("0000000101000000",imod); /* putout("0000000101000000",imod); */
putout("0000000101000000",imod); /* putout("0000000101000000",imod); */
putout("0000000001000000",imod); /* putout("0000000001000000",imod); */
*/ /* *\/ */
#ifdef DEBUG /* #ifdef DEBUG */
fprintf(stdout, "Clearing DAC shiftregister\n"); /* fprintf(stdout, "Clearing DAC shiftregister\n"); */
#endif /* #endif */
// sDac=0; /* // sDac=0; */
sMod=imod; /* sMod=imod; */
if (imod==ALLMOD) /* if (imod==ALLMOD) */
sMod=allSelected; /* sMod=allSelected; */
return OK; /* return OK; */
} /* } */
int nextDAC(int imod) { /* int nextDAC(int imod) { */
putout("1111111111111011",imod);//cs up /* putout("1111111111111011",imod);//cs up */
putout("1111111111111001",imod);//clk down /* putout("1111111111111001",imod);//clk down */
putout("1111111111111111",imod);//reset /* putout("1111111111111111",imod);//reset */
/*commented out by dhanya /* /\*commented out by dhanya */
putout("0000000001000000",imod); /* putout("0000000001000000",imod); */
putout("0000000001001000",imod); /* putout("0000000001001000",imod); */
putout("0000000001000000",imod); /* putout("0000000001000000",imod); */
*/ /* *\/ */
#ifdef DEBUG /* #ifdef DEBUG */
fprintf(stdout, "Next DAC\n"); /* fprintf(stdout, "Next DAC\n"); */
#endif /* #endif */
// sDac++; /* // sDac++; */
sMod=imod; /* sMod=imod; */
if (imod==ALLMOD) /* if (imod==ALLMOD) */
sMod=allSelected; /* sMod=allSelected; */
return OK; /* return OK; */
} /* } */
int clearCSregister(int imod) { int clearCSregister(int imod) {
@ -428,320 +428,320 @@ int selChip(const int chip,int imod) {
/* DACs routines */ /* DACs routines */
int program_one_dac(int addr, int value, int imod) { /* int program_one_dac(int addr, int value, int imod) { */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("programming dac %d value %d module %d\n",addr, value,imod); /* printf("programming dac %d value %d module %d\n",addr, value,imod); */
#endif /* #endif */
int i,im,idac,bit, control; /* int i,im,idac,bit, control; */
int v=value; /* int v=value; */
// codata=((((0x2)<<4)+((addr)&0xf))<<16)+((value<<4)&0xfff0); /* // codata=((((0x2)<<4)+((addr)&0xf))<<16)+((value<<4)&0xfff0); */
control=32+addr; /* control=32+addr; */
value=(value<<4) | (control<< 16); /* value=(value<<4) | (control<< 16); */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"value=%d\n",value); /* fprintf(stdout,"value=%d\n",value); */
#endif /* #endif */
for (i=0;i<24;i++) { /* for (i=0;i<24;i++) { */
bit=value & (1<<(23-i)); /* bit=value & (1<<(23-i)); */
if (bit) { /* if (bit) { */
putout("1111111111111100",imod);//clk down /* putout("1111111111111100",imod);//clk down */
putout("1111111111111100",imod);//write data /* putout("1111111111111100",imod);//write data */
putout("1111111111111110",imod);//clk up /* putout("1111111111111110",imod);//clk up */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"1"); /* fprintf(stdout,"1"); */
#endif /* #endif */
} /* } */
else /* else */
{ /* { */
putout("1111111111111000",imod);//clk down /* putout("1111111111111000",imod);//clk down */
putout("1111111111111000",imod);//write data /* putout("1111111111111000",imod);//write data */
putout("1111111111111010",imod);//clk up /* putout("1111111111111010",imod);//clk up */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"0"); /* fprintf(stdout,"0"); */
#endif /* #endif */
} /* } */
} /* } */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"\n"); /* fprintf(stdout,"\n"); */
#endif /* #endif */
idac=addr;//sDac*2+addr; /* idac=addr;//sDac*2+addr; */
if (detectorDacs) { /* if (detectorDacs) { */
sMod=imod; /* sMod=imod; */
if (imod==ALLMOD) /* if (imod==ALLMOD) */
sMod=allSelected; /* sMod=allSelected; */
if (imod>=0 && imod<nModX) { /* if (imod>=0 && imod<nModX) { */
detectorDacs[idac+NDAC*imod]=v; /* detectorDacs[idac+NDAC*imod]=v; */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("module=%d index=%d, val=%d addr=%x\n",imod, idac, v, (unsigned int)(detectorDacs+idac+NDAC*imod)); /* printf("module=%d index=%d, val=%d addr=%x\n",imod, idac, v, (unsigned int)(detectorDacs+idac+NDAC*imod)); */
#endif /* #endif */
setDACRegister(idac,v,imod); /* setDACRegister(idac,v,imod); */
} else if (imod==ALLMOD) { /* } else if (imod==ALLMOD) { */
for (im=0; im<nModX; im++) { /* for (im=0; im<nModX; im++) { */
detectorDacs[idac+NDAC*im]=v; /* detectorDacs[idac+NDAC*im]=v; */
setDACRegister(idac,v,im); /* setDACRegister(idac,v,im); */
} /* } */
} /* } */
} /* } */
return OK; /* return OK; */
} /* } */
int set_one_dac(int imod) { /* int set_one_dac(int imod) { */
int control, ibit; /* int control, ibit; */
int bit, value; /* int bit, value; */
control=13; /* control=13; */
value=(DAC_REFOUT<<10) | (control<< 12); /* value=(DAC_REFOUT<<10) | (control<< 12); */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"value=%d\n",value); /* fprintf(stdout,"value=%d\n",value); */
#endif /* #endif */
for (ibit=0; ibit<6; ibit++) { /* for (ibit=0; ibit<6; ibit++) { */
bit=value & (1<<(15-ibit)); /* bit=value & (1<<(15-ibit)); */
if (bit) { /* if (bit) { */
putout("0000010001000000",imod); /* putout("0000010001000000",imod); */
putout("0000011001000000",imod); /* putout("0000011001000000",imod); */
putout("0000010001000000",imod); /* putout("0000010001000000",imod); */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"1"); /* fprintf(stdout,"1"); */
#endif /* #endif */
} else { /* } else { */
putout("0000000001000000",imod); /* putout("0000000001000000",imod); */
putout("0000001001000000",imod); /* putout("0000001001000000",imod); */
putout("0000000001000000",imod); /* putout("0000000001000000",imod); */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"0"); /* fprintf(stdout,"0"); */
#endif /* #endif */
} /* } */
} /* } */
for (ibit=0; ibit<10; ibit++) { /* for (ibit=0; ibit<10; ibit++) { */
putout("0000000001000000",imod); /* putout("0000000001000000",imod); */
putout("0000001001000000",imod); /* putout("0000001001000000",imod); */
putout("0000000001000000",imod); /* putout("0000000001000000",imod); */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"0"); /* fprintf(stdout,"0"); */
#endif /* #endif */
} /* } */
#ifdef DEBUGOUT /* #ifdef DEBUGOUT */
fprintf(stdout,"\n"); /* fprintf(stdout,"\n"); */
#endif /* #endif */
return OK; /* return OK; */
} /* } */
int initDACbyIndex(int ind,int val, int imod) { /* int initDACbyIndex(int ind,int val, int imod) { */
int v; /* int v; */
const int partref[NDAC]=PARTREF; /* const int partref[NDAC]=PARTREF; */
const int partr1[NDAC]=PARTR1; /* const int partr1[NDAC]=PARTR1; */
const int partr2[NDAC]=PARTR2; /* const int partr2[NDAC]=PARTR2; */
int ref=partref[ind]; /* int ref=partref[ind]; */
int r1=partr1[ind]; /* int r1=partr1[ind]; */
int r2=partr2[ind]; /* int r2=partr2[ind]; */
v=(val+(val-ref)*r1/r2)*DAC_DR/DAC_MAX; /* v=(val+(val-ref)*r1/r2)*DAC_DR/DAC_MAX; */
v=initDACbyIndexDACU(ind,v,imod); /* v=initDACbyIndexDACU(ind,v,imod); */
return (v*DAC_MAX/DAC_DR+ref*r1/r2)/(1+r1/r2); /* return (v*DAC_MAX/DAC_DR+ref*r1/r2)/(1+r1/r2); */
} /* } */
int initDACbyIndexDACU(int ind, int val, int imod) { /* int initDACbyIndexDACU(int ind, int val, int imod) { */
// const double daccs[NDAC]=DACCS; /* // const double daccs[NDAC]=DACCS; */
// const double dacaddr[NDAC]=DACADDR; /* // const double dacaddr[NDAC]=DACADDR; */
// int cs=daccs[ind]; /* // int cs=daccs[ind]; */
// int addr=dacaddr[ind]; /* // int addr=dacaddr[ind]; */
// int iv; /* // int iv; */
int im; /* int im; */
if (val>=0) /* if (val>=0) */
initDAC(ind,val, imod); /* initDAC(ind,val, imod); */
if (imod>=0 && imod<nModX) { /* if (imod>=0 && imod<nModX) { */
// return detectorDacs[ind+imod*NDAC]; /* // return detectorDacs[ind+imod*NDAC]; */
return setDACRegister(ind, -1, imod); /* return setDACRegister(ind, -1, imod); */
} /* } */
else { /* else { */
//iv=detectorDacs[ind]; /* //iv=detectorDacs[ind]; */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("mod 0 of %d dac %d val %d\n",nModX,ind,setDACRegister(ind, -1, 0)); /* printf("mod 0 of %d dac %d val %d\n",nModX,ind,setDACRegister(ind, -1, 0)); */
#endif /* #endif */
for (im=1; im<nModX; im++) { /* for (im=1; im<nModX; im++) { */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("mod %d dac %d val %d\n",im,ind,setDACRegister(ind, -1, im)); /* printf("mod %d dac %d val %d\n",im,ind,setDACRegister(ind, -1, im)); */
#endif /* #endif */
//if (detectorDacs[ind+im*NDAC]!=detectorDacs[ind]) { /* //if (detectorDacs[ind+im*NDAC]!=detectorDacs[ind]) { */
if (setDACRegister(ind, -1, im)!=setDACRegister(ind, -1, 0)) { /* if (setDACRegister(ind, -1, im)!=setDACRegister(ind, -1, 0)) { */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("mod %d returning -1\n",im); /* printf("mod %d returning -1\n",im); */
#endif /* #endif */
return -1; /* return -1; */
} /* } */
} /* } */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("returning %d\n",setDACRegister(ind, -1, 0)); /* printf("returning %d\n",setDACRegister(ind, -1, 0)); */
#endif /* #endif */
return setDACRegister(ind, -1, 0); /* return setDACRegister(ind, -1, 0); */
} /* } */
} /* } */
int getThresholdEnergy() { /* int getThresholdEnergy() { */
double g[3]=DEFAULTGAIN; /* double g[3]=DEFAULTGAIN; */
double o[3]=DEFAULTOFFSET; /* double o[3]=DEFAULTOFFSET; */
double myg=-1, myo=-1; /* double myg=-1, myo=-1; */
// int dacu; /* // int dacu; */
int imod; /* int imod; */
int ethr=-1; /* int ethr=-1; */
int ret=FAIL; /* int ret=FAIL; */
if (detectorModules) { /* if (detectorModules) { */
// for (imod=0; imod<getNModBoard(); imod++) { /* // for (imod=0; imod<getNModBoard(); imod++) { */
for (imod=0; imod<nModX; imod++) { /* for (imod=0; imod<nModX; imod++) { */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("module=%d settings=%d, gain=%f, offset=%f\n",imod,thisSettings, (detectorModules+imod)->gain,(detectorModules+imod)->offset); /* printf("module=%d settings=%d, gain=%f, offset=%f\n",imod,thisSettings, (detectorModules+imod)->gain,(detectorModules+imod)->offset); */
#endif /* #endif */
if ((detectorModules+imod)->gain>0) /* if ((detectorModules+imod)->gain>0) */
myg=(detectorModules+imod)->gain; /* myg=(detectorModules+imod)->gain; */
else { /* else { */
if (thisSettings>=0 && thisSettings<3) /* if (thisSettings>=0 && thisSettings<3) */
myg=g[thisSettings]; /* myg=g[thisSettings]; */
// else /* // else */
//myg=-1; /* //myg=-1; */
} /* } */
if ((detectorModules+imod)->offset>0) /* if ((detectorModules+imod)->offset>0) */
myo=(detectorModules+imod)->offset; /* myo=(detectorModules+imod)->offset; */
else { /* else { */
if (thisSettings>=0 && thisSettings<3) /* if (thisSettings>=0 && thisSettings<3) */
myo=o[thisSettings]; /* myo=o[thisSettings]; */
// else /* // else */
//myo=-1; /* //myo=-1; */
} /* } */
if (myg>0 && myo>0) { /* if (myg>0 && myo>0) { */
//ethr=(myo-detectorDacs[VTHRESH+imod*NDAC])*1000/myg; /* //ethr=(myo-detectorDacs[VTHRESH+imod*NDAC])*1000/myg; */
ethr=(myo-setDACRegister(VDAC0,-1,imod))*1000/myg;//edited by dhanya /* ethr=(myo-setDACRegister(VDAC0,-1,imod))*1000/myg;//edited by dhanya */
// else /* // else */
// ethr=-1; /* // ethr=-1; */
} /* } */
#ifdef VERBOSE /* #ifdef VERBOSE */
//printf("module=%d gain=%f, offset=%f, dacu=%f\n",imod, myg, myo, detectorDacs[VTHRESH+imod*NDAC]); /* //printf("module=%d gain=%f, offset=%f, dacu=%f\n",imod, myg, myo, detectorDacs[VTHRESH+imod*NDAC]); */
printf("module=%d gain=%f, offset=%f, dacu=%d\n",imod, myg, myo,(int)(setDACRegister(VDAC0,-1,imod)));//edited by dhanya /* printf("module=%d gain=%f, offset=%f, dacu=%d\n",imod, myg, myo,(int)(setDACRegister(VDAC0,-1,imod)));//edited by dhanya */
printf("Threshold energy of module %d is %d eV\n", imod, ethr); /* printf("Threshold energy of module %d is %d eV\n", imod, ethr); */
#endif /* #endif */
if (imod==0) /* if (imod==0) */
ret=ethr; /* ret=ethr; */
else { /* else { */
if (ethr>(ret+100) || ethr<(ret-100)) /* if (ethr>(ret+100) || ethr<(ret-100)) */
return FAIL; /* return FAIL; */
} /* } */
} /* } */
} /* } */
return ret; /* return ret; */
} /* } */
int setThresholdEnergy(int ethr) { /* int setThresholdEnergy(int ethr) { */
double g[3]=DEFAULTGAIN; /* double g[3]=DEFAULTGAIN; */
double o[3]=DEFAULTOFFSET; /* double o[3]=DEFAULTOFFSET; */
double myg=-1, myo=-1; /* double myg=-1, myo=-1; */
int dacu; /* int dacu; */
int imod; /* int imod; */
int ret=ethr; /* int ret=ethr; */
setSettings(GET_SETTINGS,-1);//-1 added by dhanya /* setSettings(GET_SETTINGS,-1);//-1 added by dhanya */
if (thisSettings>=0 || thisSettings<3){ /* if (thisSettings>=0 || thisSettings<3){ */
myg=g[thisSettings]; /* myg=g[thisSettings]; */
myo=o[thisSettings]; /* myo=o[thisSettings]; */
} /* } */
for (imod=0; imod<nModX; imod++) { /* for (imod=0; imod<nModX; imod++) { */
if (detectorModules) { /* if (detectorModules) { */
if ((detectorModules+imod)->gain>0) /* if ((detectorModules+imod)->gain>0) */
myg=(detectorModules+imod)->gain; /* myg=(detectorModules+imod)->gain; */
else /* else */
if (thisSettings>=0 && thisSettings<3) /* if (thisSettings>=0 && thisSettings<3) */
myg=g[thisSettings]; /* myg=g[thisSettings]; */
else /* else */
myg=-1; /* myg=-1; */
if ((detectorModules+imod)->offset>0) /* if ((detectorModules+imod)->offset>0) */
myo=(detectorModules+imod)->offset; /* myo=(detectorModules+imod)->offset; */
else /* else */
if (thisSettings>=0 && thisSettings<3) /* if (thisSettings>=0 && thisSettings<3) */
myo=o[thisSettings]; /* myo=o[thisSettings]; */
else /* else */
myo=-1; /* myo=-1; */
} else { /* } else { */
if (thisSettings>=0 && thisSettings<3) /* if (thisSettings>=0 && thisSettings<3) */
myo=o[thisSettings]; /* myo=o[thisSettings]; */
else /* else */
myo=-1; /* myo=-1; */
if (thisSettings>=0 && thisSettings<3) /* if (thisSettings>=0 && thisSettings<3) */
myg=g[thisSettings]; /* myg=g[thisSettings]; */
else /* else */
myg=-1; /* myg=-1; */
} /* } */
if (myg>0 && myo>0) { /* if (myg>0 && myo>0) { */
dacu=myo-myg*((double)ethr)/1000.; /* dacu=myo-myg*((double)ethr)/1000.; */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("module %d (%x): gain %f, off %f, energy %d eV, dac %d\n",imod,(unsigned int)((detectorModules+imod)),(detectorModules+imod)->gain,(detectorModules+imod)->offset, ethr,dacu); /* printf("module %d (%x): gain %f, off %f, energy %d eV, dac %d\n",imod,(unsigned int)((detectorModules+imod)),(detectorModules+imod)->gain,(detectorModules+imod)->offset, ethr,dacu); */
#endif /* #endif */
} else { /* } else { */
dacu=ethr; /* dacu=ethr; */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("could not set threshold energy for module %d, settings %d (offset is %f; gain is %f)\n",imod,thisSettings,myo,myg); /* printf("could not set threshold energy for module %d, settings %d (offset is %f; gain is %f)\n",imod,thisSettings,myo,myg); */
#endif /* #endif */
} /* } */
initDACbyIndexDACU(VDAC0, dacu, imod); ///needs to be fixed dhanya /* initDACbyIndexDACU(VDAC0, dacu, imod); ///needs to be fixed dhanya */
} /* } */
return ret; /* return ret; */
} /* } */
int getDACbyIndexDACU(int ind, int imod) { /* int getDACbyIndexDACU(int ind, int imod) { */
/* /* /\* */
if (detectorDacs) { /* if (detectorDacs) { */
if (imod<getNModBoard()) /* if (imod<getNModBoard()) */
if (ind<(detectorModules+imod)->ndac) /* if (ind<(detectorModules+imod)->ndac) */
return (detectorDacs[ind+imod*NDAC]); /* return (detectorDacs[ind+imod*NDAC]); */
} /* } */
return FAIL; /* return FAIL; */
*/ /* *\/ */
return setDACRegister(ind, -1, imod); /* return setDACRegister(ind, -1, imod); */
} /* } */
int initDAC(int dac_addr, int value, int imod) { /* int initDAC(int dac_addr, int value, int imod) { */
// int i; /* // int i; */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("Programming dac %d with value %d\n", dac_addr, value); /* printf("Programming dac %d with value %d\n", dac_addr, value); */
#endif /* #endif */
clearDACSregister(imod); /* clearDACSregister(imod); */
program_one_dac(dac_addr,value,imod); /* program_one_dac(dac_addr,value,imod); */
nextDAC(imod); /* nextDAC(imod); */
clearDACSregister(imod); /* clearDACSregister(imod); */
return 0; /* return 0; */
} /* } */
int getTemperatureByModule(int tempSensor, int imod) int getTemperatureByModule(int tempSensor, int imod)
{ {
@ -811,31 +811,31 @@ void showbits(int h)
} }
int initDACs(int* v,int imod) /* int initDACs(int* v,int imod) */
{ /* { */
#ifdef VERBOSE /* #ifdef VERBOSE */
printf("\n..inside initdacs\n"); /* printf("\n..inside initdacs\n"); */
#endif /* #endif */
int iaddr; /* int iaddr; */
// sDac=0; /* // sDac=0; */
for (iaddr=0; iaddr<8; iaddr++) { /* for (iaddr=0; iaddr<8; iaddr++) { */
clearDACSregister(imod); /* clearDACSregister(imod); */
if (v[iaddr]>=0) { /* if (v[iaddr]>=0) { */
#ifdef VERBOSE /* #ifdef VERBOSE */
fprintf(stdout, "voltage %d\n", *(v+iaddr)); /* fprintf(stdout, "voltage %d\n", *(v+iaddr)); */
#endif /* #endif */
program_one_dac(iaddr, *(v+iaddr),imod); /* program_one_dac(iaddr, *(v+iaddr),imod); */
} /* } */
nextDAC(imod); /* nextDAC(imod); */
} /* } */
clearDACSregister(imod); /* clearDACSregister(imod); */
return 0; /* return 0; */
} /* } */
@ -1582,7 +1582,7 @@ int initModulebyNumber(sls_detector_module myMod) {
#endif #endif
initDACs(v,imod); // initDACs(v,imod);
// initMCBregisters(myMod.reg,imod); // initMCBregisters(myMod.reg,imod);
if (detectorModules) { if (detectorModules) {

24
slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.h
View File

@ -89,8 +89,8 @@ int copyChip(sls_detector_chip *destChip, sls_detector_chip *srcChip);
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod); int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
/* Register commands */ /* Register commands */
int clearDACSregister(int imod ); /* int clearDACSregister(int imod ); */
int nextDAC(int imod ); /* int nextDAC(int imod ); */
int clearCSregister(int imod ); int clearCSregister(int imod );
int setCSregister(int imod ); int setCSregister(int imod );
int nextChip(int imod ); int nextChip(int imod );
@ -103,16 +103,16 @@ int selChip(int chip,int imod );
int selMod(int mod,int imod ); int selMod(int mod,int imod );
/* DACs routines */ /* DACs routines */
int program_one_dac(int addr, int value,int imod ); /* int program_one_dac(int addr, int value,int imod ); */
int set_one_dac(int imod); /* int set_one_dac(int imod); */
int initDAC(int dac_addr, int value,int imod ); /* int initDAC(int dac_addr, int value,int imod ); */
int initDACs(int* v,int imod ); /* int initDACs(int* v,int imod ); */
int setSettings(int i,int imod); /* int setSettings(int i,int imod); */
int initDACbyIndex(int ind,int val, int imod); /* int initDACbyIndex(int ind,int val, int imod); */
int initDACbyIndexDACU(int ind,int val, int imod); /* int initDACbyIndexDACU(int ind,int val, int imod); */
int getDACbyIndexDACU(int ind, int imod); /* int getDACbyIndexDACU(int ind, int imod); */
int getThresholdEnergy(); /* int getThresholdEnergy(); */
int setThresholdEnergy(int ethr); /* int setThresholdEnergy(int ethr); */
/* Other DAC index routines*/ /* Other DAC index routines*/
int getTemperatureByModule(int tempSensor, int imod); int getTemperatureByModule(int tempSensor, int imod);

111
slsDetectorSoftware/jungfrauDetectorServer/registers_m.h
View File

@ -101,14 +101,15 @@
/* --constant SetGatesReg_c : integer:= 107; MSB */ /* --constant SetGatesReg_c : integer:= 107; MSB */
/* registers defined in FPGA */
#define PCB_REV_REG 0x2c<<11
#define GAIN_REG 0x10<<11
//#define FLOW_CONTROL_REG 0x11<<11
//#define FLOW_STATUS_REG 0x12<<11
//#define FRAME_REG 0x13<<11
#define MULTI_PURPOSE_REG 0x14<<11
//#define TIME_FROM_START_REG 0x16<<11
#define DAC_REG 64<<11//0x17<<11// control the dacs #define DAC_REG 64<<11//0x17<<11// control the dacs
//ADC //ADC
#define ADC_WRITE_REG 65<<11//0x18<<11 #define ADC_WRITE_REG 65<<11//0x18<<11
@ -127,6 +128,7 @@
#define DUMMY_REG 68<<11//0x21<<11 #define DUMMY_REG 68<<11//0x21<<11
#define FPGA_VERSION_REG 0<<11 //0x22<<11 #define FPGA_VERSION_REG 0<<11 //0x22<<11
#define PCB_REV_REG 0<<11
#define FIX_PATT_REG 1<<11 //0x23<<11 #define FIX_PATT_REG 1<<11 //0x23<<11
#define CONTROL_REG 79<<11//0x24<<11 #define CONTROL_REG 79<<11//0x24<<11
#define STATUS_REG 2<<11 //0x25<<11 #define STATUS_REG 2<<11 //0x25<<11
@ -141,9 +143,11 @@
#define LOOK_AT_ME_REG 3<<11 //0x28<<11 #define LOOK_AT_ME_REG 3<<11 //0x28<<11
#define SYSTEM_STATUS_REG 4<<11 #define SYSTEM_STATUS_REG 4<<11
#define FIFO_DATA_REG 6<<11
#define FIFO_STATUS_REG 7<<11
#define FIFO_DATA_REG_OFF 0x50<<11 /////// #define FIFO_DATA_REG_OFF 0x50<<11 ///////
//to read back dac registers //to read back dac registers
#define MOD_DACS1_REG 0x65<<11 #define MOD_DACS1_REG 0x65<<11
#define MOD_DACS2_REG 0x66<<11 #define MOD_DACS2_REG 0x66<<11
@ -158,6 +162,9 @@
#define GET_ACTUAL_TIME_LSB_REG 16<<11 #define GET_ACTUAL_TIME_LSB_REG 16<<11
#define GET_ACTUAL_TIME_MSB_REG 17<<11 #define GET_ACTUAL_TIME_MSB_REG 17<<11
#define GET_MEASUREMENT_TIME_LSB_REG 38<<11
#define GET_MEASUREMENT_TIME_MSB_REG 38<<11
#define SET_DELAY_LSB_REG 96<<11 //0x68<<11 #define SET_DELAY_LSB_REG 96<<11 //0x68<<11
#define SET_DELAY_MSB_REG 97<<11 //0x69<<11 #define SET_DELAY_MSB_REG 97<<11 //0x69<<11
@ -189,6 +196,18 @@
#define GET_GATES_LSB_REG 28<<11//0x7e<<11 #define GET_GATES_LSB_REG 28<<11//0x7e<<11
#define GET_GATES_MSB_REG 29<<11//0x7f<<11 #define GET_GATES_MSB_REG 29<<11//0x7f<<11
#define DATA_IN_LSB_REG 30<<11
#define DATA_IN_MSB_REG 31<<11
#define PATTERN_OUT_LSB_REG 32<<11
#define PATTERN_OUT_MSB_REG 33<<11
#define FRAMES_FROM_START_LSB_REG 34<<11
#define FRAMES_FROM_START_MSB_REG 35<<11
#define FRAMES_FROM_START_PG_LSB_REG 36<<11
#define FRAMES_FROM_START_PG_MSB_REG 37<<11
@ -228,7 +247,7 @@
#define DAQ_REG 93<<11 #define DAQ_REG 93<<11
#define ADC_LATCH_ENABLE_REG 94<<11 #define ADC_LATCH_DISABLE_REG 94<<11
#define PATTERN_IOCTRL_REG_LSB 108<<11 #define PATTERN_IOCTRL_REG_LSB 108<<11
@ -245,6 +264,14 @@
#define PATTERN_WAIT2_TIME_REG_MSB 119<<11 #define PATTERN_WAIT2_TIME_REG_MSB 119<<11
#define DAC_0_1_VAL_REG 128<<11
#define DAC_2_3_VAL_REG 129<<11
#define DAC_4_5_VAL_REG 130<<11
#define DAC_6_7_VAL_REG 131<<11
#define DAC_8_9_VAL_REG 132<<11
#define DAC_10_11_VAL_REG 133<<11
#define DAC_12_13_VAL_REG 134<<11
#define DAC_14_15_VAL_REG 135<<11
@ -254,6 +281,15 @@
/* registers defined in FPGA */
#define GAIN_REG 0
//#define FLOW_CONTROL_REG 0x11<<11
//#define FLOW_STATUS_REG 0x12<<11
//#define FRAME_REG 0x13<<11
#define MULTI_PURPOSE_REG 0
//#define TIME_FROM_START_REG 0x16<<11
#define ROI_REG 0 // 0x35<<11 #define ROI_REG 0 // 0x35<<11
#define OVERSAMPLING_REG 0 // 0x36<<11 #define OVERSAMPLING_REG 0 // 0x36<<11
#define MOENCH_CNTR_REG 0 // 0x31<<11 #define MOENCH_CNTR_REG 0 // 0x31<<11
@ -270,13 +306,6 @@
#define COUNTER_MEMORY_REG 0 // 0x85<<11 #define COUNTER_MEMORY_REG 0 // 0x85<<11
#define GET_MEASUREMENT_TIME_LSB_REG 0 // 0x023000
#define GET_MEASUREMENT_TIME_MSB_REG 0 // 0x024000
//#define GET_ACTUAL_TIME_LSB_REG 0 // 0x025000
//#define GET_ACTUAL_TIME_MSB_REG 0 // 0x026000
//not used //not used
//#define MCB_DOUT_REG_OFF 0 // 0x200000 //#define MCB_DOUT_REG_OFF 0 // 0x200000
//#define FIFO_CNTRL_REG_OFF 0 // 0x300000 //#define FIFO_CNTRL_REG_OFF 0 // 0x300000
@ -293,26 +322,30 @@
#define SHIFTFIFO 9 #define SHIFTFIFO 9
/** for PCB_REV_REG */ /** for PCB_REV_REG */
#define DETECTOR_TYPE_MASK 0xF0000 #define DETECTOR_TYPE_MASK 0xFF000000
#define DETECTOR_TYPE_OFFSET 16 #define DETECTOR_TYPE_OFFSET 24
#define BOARD_REVISION_MASK 0xFFFF #define BOARD_REVISION_MASK 0xFFFFFF
#define MOENCH_MODULE 2 #define MOENCH03_MODULE_ID 2
#define JUNGFRAU_MODULE_ID 1
#define JUNGFRAU_CTB_ID 3
/* for control register */ /* for control register (16bit only)*/
#define START_ACQ_BIT 0x00000001 #define START_ACQ_BIT 0x0001
#define STOP_ACQ_BIT 0x00000002 #define STOP_ACQ_BIT 0x0002
#define START_FIFOTEST_BIT 0x00000004 // ????? #define START_FIFOTEST_BIT 0x0004 // ?????
#define STOP_FIFOTEST_BIT 0x00000008 // ?????? #define STOP_FIFOTEST_BIT 0x0008 // ??????
#define START_READOUT_BIT 0x00000010 #define START_READOUT_BIT 0x0010
#define STOP_READOUT_BIT 0x00000020 #define STOP_READOUT_BIT 0x0020
#define START_EXPOSURE_BIT 0x00000040 #define START_EXPOSURE_BIT 0x0040
#define STOP_EXPOSURE_BIT 0x00000080 #define STOP_EXPOSURE_BIT 0x0080
#define START_TRAIN_BIT 0x00000100 #define START_TRAIN_BIT 0x0100
#define STOP_TRAIN_BIT 0x00000200 #define STOP_TRAIN_BIT 0x0200
#define SYNC_RESET 0x00000400 #define FIFO_RESET_BIT 0x8000
#define SYNC_RESET 0x0400
#define GB10_RESET_BIT 0x0800
/* for status register */ /* for status register */
#define RUN_BUSY_BIT 0x00000001 #define RUN_BUSY_BIT 0x00000001
@ -326,7 +359,7 @@
#define READSTATE_0_BIT 0x00000100 #define READSTATE_0_BIT 0x00000100
#define READSTATE_1_BIT 0x00000200 #define READSTATE_1_BIT 0x00000200
#define READSTATE_2_BIT 0x00000400 #define READSTATE_2_BIT 0x00000400
#define PLL_RECONFIG_BUSY 0x00100000
#define RUNSTATE_0_BIT 0x00001000 #define RUNSTATE_0_BIT 0x00001000
#define RUNSTATE_1_BIT 0x00002000 #define RUNSTATE_1_BIT 0x00002000
#define RUNSTATE_2_BIT 0x00004000 #define RUNSTATE_2_BIT 0x00004000
@ -397,8 +430,8 @@
/* fifo control register */ /* fifo control register */
#define FIFO_RESET_BIT 0x00000001 //#define FIFO_RESET_BIT 0x00000001
#define FIFO_DISABLE_TOGGLE_BIT 0x00000002 //#define FIFO_DISABLE_TOGGLE_BIT 0x00000002
//chip shiftin register meaning //chip shiftin register meaning
@ -462,6 +495,7 @@
#define PLL_CNTR_RECONFIG_RESET_BIT 0 #define PLL_CNTR_RECONFIG_RESET_BIT 0
#define PLL_CNTR_READ_BIT 1 #define PLL_CNTR_READ_BIT 1
#define PLL_CNTR_WRITE_BIT 2 #define PLL_CNTR_WRITE_BIT 2
#define PLL_CNTR_PLL_RESET_BIT 3
#define PLL_MODE_REG 0x0 #define PLL_MODE_REG 0x0
#define PLL_STATUS_REG 0x1 #define PLL_STATUS_REG 0x1
@ -469,7 +503,7 @@
#define PLL_N_COUNTER_REG 0x3 #define PLL_N_COUNTER_REG 0x3
#define PLL_M_COUNTER_REG 0x4 #define PLL_M_COUNTER_REG 0x4
#define PLL_C_COUNTER_REG 0x5 //which ccounter stands in param 22:18; 7:0 lowcount 15:8 highcount; 16 bypassenable; 17 oddivision #define PLL_C_COUNTER_REG 0x5 //which ccounter stands in param 22:18; 7:0 lowcount 15:8 highcount; 16 bypassenable; 17 oddivision
#define PLL_PHASE_SHIFT_REG 0x6 #define PLL_PHASE_SHIFT_REG 0x6 // which ccounter stands in param 16:20; 21 updown (1 up, 0 down)
#define PLL_K_COUNTER_REG 0x7 #define PLL_K_COUNTER_REG 0x7
#define PLL_BANDWIDTH_REG 0x8 #define PLL_BANDWIDTH_REG 0x8
#define PLL_CHARGEPUMP_REG 0x9 #define PLL_CHARGEPUMP_REG 0x9
@ -497,6 +531,7 @@
#define ASTART_OFFSET 0 #define ASTART_OFFSET 0
#define ASTOP_OFFSET 16 #define ASTOP_OFFSET 16
#define PATTERN_CTRL_WRITE_BIT 0 #define PATTERN_CTRL_WRITE_BIT 0
#define PATTERN_CTRL_READ_BIT 1
#define PATTERN_CTRL_ADDR_OFFSET 16 #define PATTERN_CTRL_ADDR_OFFSET 16
#define MAX_PATTERN_LENGTH 1024 #define MAX_PATTERN_LENGTH 1024

7
slsDetectorSoftware/jungfrauDetectorServer/server_defs.h
View File

@ -8,12 +8,12 @@
// Hardware definitions // Hardware definitions
#define NCHAN (160*160) #define NCHAN 32
#define NCHIP 1 #define NCHIP 1
#define NMAXMODX 1 #define NMAXMODX 1
#define NMAXMODY 1 #define NMAXMODY 1
#define NMAXMOD (NMAXMODX*NMAXMODY) #define NMAXMOD (NMAXMODX*NMAXMODY)
#define NDAC 8 #define NDAC 16
#define NADC 1 #define NADC 1
/**when moench readout tested with gotthard module*/ /**when moench readout tested with gotthard module*/
@ -57,7 +57,8 @@
#define DEBUGOUT #define DEBUGOUT
#endif #endif
#define CLK_FREQ 65.6E+6 #define CLK_FREQ 156.25E+6
#define ADC_CLK_FREQ 32E+6
#endif #endif

332
slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c
View File

@ -1,10 +1,7 @@
#include "sls_detector_defs.h" #include "sls_detector_defs.h"
#include "sls_receiver_defs.h"
#include "server_funcs.h" #include "server_funcs.h"
#ifndef PICASSOD
#include "server_defs.h" #include "server_defs.h"
#else
#include "picasso_defs.h"
#endif
#include "firmware_funcs.h" #include "firmware_funcs.h"
#include "mcb_funcs.h" #include "mcb_funcs.h"
#include "trimming_funcs.h" #include "trimming_funcs.h"
@ -12,7 +9,6 @@
#include "gitInfoMoench.h" #include "gitInfoMoench.h"
#define FIFO_DATA_REG_OFF 0x50<<11 #define FIFO_DATA_REG_OFF 0x50<<11
//#define CONTROL_REG 0x24<<11
// Global variables // Global variables
@ -20,19 +16,19 @@ int (*flist[256])(int);
//defined in the detector specific file //defined in the detector specific file
#ifdef MYTHEND /* #ifdef MYTHEND */
const enum detectorType myDetectorType=MYTHEN; /* const enum detectorType myDetectorType=MYTHEN; */
#elif GOTTHARDD /* #elif GOTTHARDD */
const enum detectorType myDetectorType=GOTTHARD; /* const enum detectorType myDetectorType=GOTTHARD; */
#elif EIGERD /* #elif EIGERD */
const enum detectorType myDetectorType=EIGER; /* const enum detectorType myDetectorType=EIGER; */
#elif PICASSOD /* #elif PICASSOD */
const enum detectorType myDetectorType=PICASSO; /* const enum detectorType myDetectorType=PICASSO; */
#elif MOENCHD /* #elif MOENCHD */
const enum detectorType myDetectorType=MOENCH; /* const enum detectorType myDetectorType=MOENCH; */
#else /* #else */
const enum detectorType myDetectorType=GENERIC; enum detectorType myDetectorType=GENERIC;
#endif /* #endif */
extern int nModX; extern int nModX;
@ -70,7 +66,7 @@ int init_detector(int b, int checkType) {
printf("fp: 0x%x\n",bus_r(FIX_PATT_REG)); printf("fp: 0x%x\n",bus_r(FIX_PATT_REG));
if (checkType) { if (checkType) {
printf("Bus test..."); printf("Bus test... (checktype is %d; b is %d)",checkType,b );
for (i=0; i<1000000; i++) { for (i=0; i<1000000; i++) {
bus_w(SET_DELAY_LSB_REG, i*100); bus_w(SET_DELAY_LSB_REG, i*100);
bus_r(FPGA_VERSION_REG); bus_r(FPGA_VERSION_REG);
@ -78,57 +74,75 @@ int init_detector(int b, int checkType) {
printf("ERROR: wrote 0x%x, read 0x%x\n",i*100,bus_r(SET_DELAY_LSB_REG)); printf("ERROR: wrote 0x%x, read 0x%x\n",i*100,bus_r(SET_DELAY_LSB_REG));
} }
printf("Finished\n"); printf("Finished\n");
} }else
return 0; printf("(checktype is %d; b is %d)",checkType,b );
bus_w16(CONTROL_REG, SYNC_RESET);
bus_w16(CONTROL_REG, 0x0);
//confirm if it is really moench //confirm if it is really moench
if(((bus_r(PCB_REV_REG) & DETECTOR_TYPE_MASK)>>DETECTOR_TYPE_OFFSET) != MOENCH_MODULE ){ switch ((bus_r(PCB_REV_REG) & DETECTOR_TYPE_MASK)>>DETECTOR_TYPE_OFFSET) {
if(checkType){ case MOENCH03_MODULE_ID:
printf("This is a Gotthard detector. Exiting Moench Server.\n\n"); myDetectorType=MOENCH;
exit(-1); printf("This is a MOENCH03 module %d\n",MOENCH);
} break;
//no check required as specified in command line arguments
else if(b){ case JUNGFRAU_MODULE_ID:
printf("***This is a GOTTHARD detector with %d chips per module***\n",GOTTHARDNCHIP); myDetectorType=JUNGFRAU;
printf("***Assuming this to be a MOENCH detector***\n"); printf("This is a Jungfrau module %d\n", JUNGFRAU);
} break;
withGotthard = 1;
} else if(b){ case JUNGFRAU_CTB_ID:
printf("***This is a MOENCH detector with %d chips per module***\n",NCHIP); myDetectorType=JUNGFRAUCTB;
printf("This is a Jungfrau CTB %d\n", JUNGFRAUCTB);
break;
default:
myDetectorType=GENERIC;
printf("Unknown detector type %02x\n",(bus_r(PCB_REV_REG) & DETECTOR_TYPE_MASK)>>DETECTOR_TYPE_OFFSET);
} }
printf("Detector type is %d\n", myDetectorType);
// return OK;
if (b) { if (b) {
resetPLL();
bus_w16(CONTROL_REG, SYNC_RESET);
bus_w16(CONTROL_REG, 0);
bus_w16(CONTROL_REG, GB10_RESET_BIT);
bus_w16(CONTROL_REG, 0);
#ifdef MCB_FUNCS #ifdef MCB_FUNCS
printf("\nBoard Revision:0x%x\n",(bus_r(PCB_REV_REG)&BOARD_REVISION_MASK)); printf("\nBoard Revision:0x%x\n",(bus_r(PCB_REV_REG)&BOARD_REVISION_MASK));
initDetector(); // initDetector();
printf("Initializing Detector\n"); printf("Initializing Detector\n");
bus_w16(CONTROL_REG, SYNC_RESET); // reset registers //bus_w16(CONTROL_REG, SYNC_RESET); // reset registers
#endif #endif
testFpga(); // testFpga();
testRAM(); // testRAM();
printf("ADC_SYNC_REG:%x\n",bus_r(ADC_SYNC_REG)); // printf("ADC_SYNC_REG:%x\n",bus_r(ADC_SYNC_REG));
//moench specific //moench specific
// setPhaseShiftOnce(); //firmware.h // setPhaseShiftOnce(); //firmware.h
prepareADC(); // server_funcs prepareADC(); // server_funcs
setADC(-1); //already does setdaqreg and clean fifo //setADC(-1); //already does setdaqreg and clean fifo
setSettings(GET_SETTINGS,-1); // setSettings(GET_SETTINGS,-1);
initDac(0); initDac(8); //initializes the two dacs
//Initialization //Initialization
setFrames(1); setFrames(-1);
setTrains(1); setTrains(-1);
setExposureTime(1e3); setExposureTime(-1);
setPeriod(1E6); setPeriod(-1);
setDelay(0); setDelay(-1);
setGates(0); setGates(-1);
setTiming(GET_EXTERNAL_COMMUNICATION_MODE); setTiming(GET_EXTERNAL_COMMUNICATION_MODE);
setMaster(GET_MASTER); setMaster(GET_MASTER);
@ -161,9 +175,9 @@ int decode_function(int file_des) {
printf("size of data received %d\n",n); printf("size of data received %d\n",n);
#endif #endif
#ifdef VERBOSE //#ifdef VERBOSE
printf( "calling function fnum = %d %x\n",fnum,(unsigned int)(flist[fnum])); printf( "calling function fnum = %d %x %x %x\n",fnum,(unsigned int)(flist[fnum]), (unsigned int)(flist[F_READ_REGISTER]),(unsigned int)(&read_register));
#endif //#endif
if (fnum<0 || fnum>255) if (fnum<0 || fnum>255)
fnum=255; fnum=255;
retval=(*flist[fnum])(file_des); retval=(*flist[fnum])(file_des);
@ -941,7 +955,7 @@ int set_dac(int file_des) {
int n; int n;
int val; int val;
int idac=0; int idac=0;
int mV=0;
sprintf(mess,"Can't set DAC\n"); sprintf(mess,"Can't set DAC\n");
n = receiveDataOnly(file_des,arg,sizeof(arg)); n = receiveDataOnly(file_des,arg,sizeof(arg));
@ -951,82 +965,101 @@ int set_dac(int file_des) {
} }
ind=arg[0]; ind=arg[0];
imod=arg[1]; imod=arg[1];
mV=arg[3];
n = receiveDataOnly(file_des,&val,sizeof(val)); n = receiveDataOnly(file_des,&val,sizeof(val));
if (n < 0) { if (n < 0) {
sprintf(mess,"Error reading from socket\n"); sprintf(mess,"Error reading from socket\n");
ret=FAIL; ret=FAIL;
} }
#ifdef VERBOSE //#ifdef VERBOSE
printf("Setting DAC %d of module %d to %d V\n", ind, imod, val); printf("Setting DAC %d of module %d to %d , mode %d\n", ind, imod, val, mV);
#endif //#endif
if (imod>=getNModBoard()) if (imod>=getNModBoard())
ret=FAIL; ret=FAIL;
if (imod<0) if (imod<0)
imod=ALLMOD; imod=ALLMOD;
#ifdef MCB_FUNCS
switch (ind) {
case V_DAC0 :
idac=VDAC0;
break;
case V_DAC1:
idac=VDAC1;
break;
case V_DAC2:
idac=VDAC2;
break;
case V_DAC3:
idac=VDAC3;
break;
case V_DAC4:
idac=VDAC4;
break;
case V_DAC5:
idac=VDAC5;
break;
case V_DAC6:
idac=VDAC6;
break;
case V_DAC7:
idac=VDAC7;
break;
case HV_POT:
idac=HIGH_VOLTAGE;
break;
default:
printf("Unknown DAC index %d for Moench\n",ind);
sprintf(mess,"Unknown DAC index %d for Moench\n",ind); #ifdef MCB_FUNCS
ret=FAIL;
break; /* switch (ind) { */
} /* case V_DAC0 : */
/* idac=VDAC0; */
/* break; */
/* case V_DAC1: */
/* idac=VDAC1; */
/* break; */
/* case V_DAC2: */
/* idac=VDAC2; */
/* break; */
/* case V_DAC3: */
/* idac=VDAC3; */
/* break; */
/* case V_DAC4: */
/* idac=VDAC4; */
/* break; */
/* case V_DAC5: */
/* idac=VDAC5; */
/* break; */
/* case V_DAC6: */
/* idac=VDAC6; */
/* break; */
/* case V_DAC7: */
/* idac=VDAC7; */
/* break; */
/* case HV_POT: */
/* idac=HIGH_VOLTAGE; */
/* break; */
/* default: */
/* printf("Unknown DAC index %d for Moench\n",ind); */
/* sprintf(mess,"Unknown DAC index %d for Moench\n",ind); */
/* ret=FAIL; */
/* break; */
/* } */
if (ret==OK) { if (ret==OK) {
if (differentClients==1 && lockStatus==1) { if (differentClients==1 && lockStatus==1) {
ret=FAIL; ret=FAIL;
sprintf(mess,"Detector locked by %s\n",lastClientIP); sprintf(mess,"Detector locked by %s\n",lastClientIP);
} else{ } else{
if(idac==HIGH_VOLTAGE)
retval=initHighVoltageByModule(val,imod); if (mV) {
else if (val>2500)
retval=initDACbyIndexDACU(idac,val,imod); val=-1;
if (val>0)
val=16535*val/2500;
} else if (val>16535)
val=-1;
retval=setDac(ind,val);
/* if(idac==HIGH_VOLTAGE) */
/* retval=initHighVoltageByModule(val,imod); */
/* else */
/* retval=initDACbyIndexDACU(idac,val,imod); */
} }
} }
if(ret==OK){ if(ret==OK){
ret=FAIL; /* ret=FAIL; */
if(idac==HIGH_VOLTAGE){ /* if(idac==HIGH_VOLTAGE){ */
if(retval==-2) /* if(retval==-2) */
strcpy(mess,"Invalid Voltage.Valid values are 0,90,110,120,150,180,200"); /* strcpy(mess,"Invalid Voltage.Valid values are 0,90,110,120,150,180,200"); */
else if(retval==-3) /* else if(retval==-3) */
strcpy(mess,"Weird value read back or it has not been set yet\n"); /* strcpy(mess,"Weird value read back or it has not been set yet\n"); */
else /* else */
ret=OK; /* ret=OK; */
}//since v r saving only msb /* }//since v r saving only msb */
else if ((retval-val)<=3 || val==-1) /* else if ((retval-val)<=3 || val==-1) */
ret=OK; /* ret=OK; */
if (mV)
retval=2500*val/16535;
} }
#endif #endif
@ -1925,9 +1958,9 @@ int read_frame(int file_des) {
return OK; return OK;
} else { } else {
//might add delay???? //might add delay????
if(getFrames()>-2) { if(getFrames()>-1) {
dataret=FAIL; dataret=FAIL;
sprintf(mess,"no data and run stopped: %d frames left\n",(int)(getFrames()+2)); sprintf(mess,"no data and run stopped: %d frames left\n",(int)(getFrames()+1));
printf("%s\n",mess); printf("%s\n",mess);
} else { } else {
dataret=FINISHED; dataret=FINISHED;
@ -2204,6 +2237,10 @@ int get_time_left(int file_des) {
case MEASUREMENT_TIME: case MEASUREMENT_TIME:
retval=getMeasurementTime(); retval=getMeasurementTime();
break; break;
case FRAMES_FROM_START:
case FRAMES_FROM_START_PG:
retval=getFramesFromStart();
break;
default: default:
ret=FAIL; ret=FAIL;
sprintf(mess,"timer index unknown %d\n",ind); sprintf(mess,"timer index unknown %d\n",ind);
@ -2223,11 +2260,11 @@ int get_time_left(int file_des) {
//#endif //#endif
n = sendDataOnly(file_des,&ret,sizeof(ret)); n = sendDataOnly(file_des,&ret,sizeof(ret));
if (ret!=OK) { if (ret==FAIL) {
n += sendDataOnly(file_des,mess,sizeof(mess)); n += sendDataOnly(file_des,mess,sizeof(mess));
} else { } else
n = sendDataOnly(file_des,&retval,sizeof(retval)); n = sendDataOnly(file_des,&retval,sizeof(retval));
}
#ifdef VERBOSE #ifdef VERBOSE
printf("data sent\n"); printf("data sent\n");
@ -2386,24 +2423,34 @@ int set_speed(int file_des) {
if (ret==OK) { if (ret==OK) {
if (val>=0) { if (val!=-1) {
if (differentClients==1 && lockStatus==1 && val>=0) { if (differentClients==1 && lockStatus==1 && val>=0) {
ret=FAIL; ret=FAIL;
sprintf(mess,"Detector locked by %s\n",lastClientIP); sprintf(mess,"Detector locked by %s\n",lastClientIP);
} else { } else {
switch (arg) { switch (arg) {
case CLOCK_DIVIDER: case CLOCK_DIVIDER:
retval=setClockDivider(val); retval=setClockDivider(val,0);
break; break;
case PHASE_SHIFT: case PHASE_SHIFT:
retval=phaseStep(val); retval=phaseStep(val,0);
break; break;
case OVERSAMPLING: case OVERSAMPLING:
retval=setOversampling(val); retval=setOversampling(val);
break; break;
case ADC_CLOCK:
retval=setClockDivider(val,1);
break;
case ADC_PHASE:
retval=phaseStep(val,1);
break;
default: default:
ret=FAIL; ret=FAIL;
sprintf(mess,"Unknown speed parameter %d",arg); sprintf(mess,"Unknown speed parameter %d",arg);
@ -2414,16 +2461,24 @@ int set_speed(int file_des) {
switch (arg) { switch (arg) {
case CLOCK_DIVIDER: case CLOCK_DIVIDER:
retval=getClockDivider(); retval=getClockDivider(0);
break; break;
case PHASE_SHIFT: case PHASE_SHIFT:
retval=phaseStep(-1); // retval=phaseStep(-1);
//ret=FAIL;
//sprintf(mess,"Cannot read phase",arg);
retval=-1;
break;
case OVERSAMPLING:
retval=setOversampling(-1);
break;
case ADC_CLOCK:
retval=getClockDivider(1);
break; break;
case OVERSAMPLING:
retval=setOversampling(-1);
break;
default: default:
ret=FAIL; ret=FAIL;
@ -3109,17 +3164,19 @@ int calibrate_pedestal(int file_des){
int set_ctb_pattern(int file_des){ int set_ctb_pattern(int file_des){
int ret=FAIL; int ret=OK;//FAIL;
int retval=-1; int retval=-1;
int n; int n;
int mode; int mode;
uint64_t word, retval64, t; uint64_t word, retval64, t;
int addr; int addr;
int level, start, stop, nl; int level, start, stop, nl;
uint64_t pat[1024];
sprintf(mess,"Could not set pattern\n"); sprintf(mess,"Could not set pattern\n");
n = receiveDataOnly(file_des,&mode,sizeof(mode)); n = receiveDataOnly(file_des,&mode,sizeof(mode));
printf("pattern mode is %d\n",mode);
switch (mode) { switch (mode) {
case 0: //sets word case 0: //sets word
@ -3157,6 +3214,8 @@ int set_ctb_pattern(int file_des){
n = receiveDataOnly(file_des,&nl,sizeof(nl)); n = receiveDataOnly(file_des,&nl,sizeof(nl));
printf("level %d start %x stop %x nl %d\n",level, start, stop, nl);
/** Sets the pattern or loop limits in the CTB /** Sets the pattern or loop limits in the CTB
@param level -1 complete pattern, 0,1,2, loop level @param level -1 complete pattern, 0,1,2, loop level
@param start start address if >=0 @param start start address if >=0
@ -3189,8 +3248,11 @@ int set_ctb_pattern(int file_des){
@param addr wait address, -1 gets @param addr wait address, -1 gets
@returns actual value @returns actual value
*/ */
printf("wait addr %d %x\n",level, addr);
retval=setPatternWaitAddress(level,addr); retval=setPatternWaitAddress(level,addr);
printf("ret: wait addr %d %x\n",level, retval);
ret=OK; ret=OK;
n = sendDataOnly(file_des,&ret,sizeof(ret));
if (ret==FAIL) if (ret==FAIL)
n += sendDataOnly(file_des,mess,sizeof(mess)); n += sendDataOnly(file_des,mess,sizeof(mess));
else { else {
@ -3226,8 +3288,28 @@ int set_ctb_pattern(int file_des){
break; break;
case 4:
n = receiveDataOnly(file_des,pat,sizeof(pat));
for (addr=0; addr<1024; addr++)
writePatternWord(addr,word);
ret=OK;
retval=0;
n = sendDataOnly(file_des,&ret,sizeof(ret));
if (ret==FAIL)
n += sendDataOnly(file_des,mess,sizeof(mess));
else
n += sendDataOnly(file_des,&retval64,sizeof(retval64));
break;
default: default:
ret=FAIL; ret=FAIL;
printf(mess);
sprintf(mess,"%s - wrong mode %d\n",mess, mode); sprintf(mess,"%s - wrong mode %d\n",mess, mode);
n = sendDataOnly(file_des,&ret,sizeof(ret)); n = sendDataOnly(file_des,&ret,sizeof(ret));
n += sendDataOnly(file_des,mess,sizeof(mess)); n += sendDataOnly(file_des,mess,sizeof(mess));

21
slsDetectorSoftware/multiSlsDetector/multiSlsDetector.cpp
View File

@ -4843,10 +4843,31 @@ int multiSlsDetector::enableTenGigabitEthernet(int i){
*/ */
int multiSlsDetector::setCTBPattern(string fname) { int multiSlsDetector::setCTBPattern(string fname) {
uint64_t word;
int addr=0;
FILE *fd=fopen(fname.c_str(),"r");
if (fd>0) {
while (fread(&word, sizeof(word), 1,fd)) {
for (int idet=0; idet<thisMultiDetector->numberOfDetectors; idet++)
if (detectors[idet]){
detectors[idet]->setCTBWord(addr,word);
}
// cout << hex << addr << " " << word << dec << endl;
addr++;
}
fclose(fd);
} else
return -1;
return addr;
} }

3
slsDetectorSoftware/patternGenerator/generate.sh
View File

@ -4,6 +4,7 @@ if [ "$#" -eq 0 ]; then
fi fi
infile=$1 infile=$1
outfile=$infile"at" outfile=$infile"at"
outfilebin=$infile"bin"
if [ "$#" -ge 2 ]; then if [ "$#" -ge 2 ]; then
outfile=$2 outfile=$2
fi fi
@ -14,7 +15,7 @@ fi
if [ -f "$infile" ] if [ -f "$infile" ]
then then
gcc -DINFILE="\"$infile\"" -DOUTFILE="\"$outfile\"" -o $exe generator.c ; ./$exe ; rm $exe gcc -DINFILE="\"$infile\"" -DOUTFILE="\"$outfile\"" -DOUTFILEBIN="\"$outfilebin\"" -o $exe generator.c ; ./$exe ; rm $exe
else else
echo "$infile not found." echo "$infile not found."
fi fi

15
slsDetectorSoftware/patternGenerator/generator.c
View File

@ -43,7 +43,9 @@ int nloop[3]={0,0,0};
char infile[10000], outfile[10000]; char infile[10000], outfile[10000];
FILE *fd; FILE *fd, *fd1;
uint64_t PAT[MAXWORDS];
int i,ii,iii,j,jj,jjj,pixx,pixy,memx,memy,muxout,memclk,colclk,rowclk,muxclk,memcol,memrow,loopcounter; int i,ii,iii,j,jj,jjj,pixx,pixy,memx,memy,muxout,memclk,colclk,rowclk,muxclk,memcol,memrow,loopcounter;
//int W[33]; //int W[33];
@ -129,18 +131,22 @@ void setwaittime(int iloop, uint64_t t) {
void pw(){ void pw(){
if (iaddr<MAXWORDS)
PAT[iaddr]= pat;
fprintf(fd,"patword %04x %016llx\n",iaddr, pat); fprintf(fd,"patword %04x %016llx\n",iaddr, pat);
iaddr++; iaddr++;
if (iaddr>=MAXWORDS) printf("ERROR: too many word in the pattern (%d instead of %d)!",iaddr, MAXWORDS); if (iaddr>=MAXWORDS) printf("ERROR: too many word in the pattern (%d instead of %d)!",iaddr, MAXWORDS);
} }
main(void) { main(void) {
int iloop=0; int iloop=0;
fd=fopen(OUTFILE,"w"); fd=fopen(OUTFILE,"w");
#include INFILE #include INFILE
fprintf(fd,"patctrl %016llx\n",iopat); fprintf(fd,"patioctrl %016llx\n",iopat);
fprintf(fd,"patclkctrl %016llx\n",clkpat); fprintf(fd,"patclkctrl %016llx\n",clkpat);
fprintf(fd,"patlimits %04x %04x\n",start, stop); fprintf(fd,"patlimits %04x %04x\n",start, stop);
@ -157,4 +163,7 @@ main(void) {
} }
close((int)fd); close((int)fd);
fd1=fopen(OUTFILEBIN,"w");
fwrite(PAT,sizeof(uint64_t),iaddr, fd1);
close((int)fd1);
} }

2
slsDetectorSoftware/patternGenerator/test.p
View File

@ -85,7 +85,7 @@ setoutput(adc_ena);
setclk(CLKBIT); setclk(CLKBIT);
#define adc_sync 19 #define adc_sync 63
setoutput(adc_sync); setoutput(adc_sync);

72
slsDetectorSoftware/slsDetector/slsDetector.cpp
View File

@ -56,6 +56,12 @@ int slsDetector::initSharedMemory(detectorType type, int id) {
nc=1; //chips nc=1; //chips
nd=9; //dacs+adcs nd=9; //dacs+adcs
break; break;
case JUNGFRAUCTB:
nch=32;
nm=1; //modules/detector
nc=1; //chips
nd=16; //dacs+adcs
break;
default: default:
nch=0; // dum! nch=0; // dum!
nm=0; //modules/detector nm=0; //modules/detector
@ -558,6 +564,17 @@ int slsDetector::initializeDetectorSize(detectorType type) {
thisDetector->nModMax[Y]=1; thisDetector->nModMax[Y]=1;
thisDetector->dynamicRange=16; thisDetector->dynamicRange=16;
break; break;
case JUNGFRAUCTB:
thisDetector->nChan[X]=32;
thisDetector->nChan[Y]=1;
thisDetector->nChip[X]=1;
thisDetector->nChip[Y]=1;
thisDetector->nDacs=16;
thisDetector->nAdcs=1;
thisDetector->nModMax[X]=1;
thisDetector->nModMax[Y]=1;
thisDetector->dynamicRange=16;
break;
case EIGER: case EIGER:
thisDetector->nChan[X]=256; thisDetector->nChan[X]=256;
thisDetector->nChan[Y]=256; thisDetector->nChan[Y]=256;
@ -758,6 +775,8 @@ int slsDetector::initializeDetectorSize(detectorType type) {
setFramesPerFile(MAX_FRAMES_PER_FILE); setFramesPerFile(MAX_FRAMES_PER_FILE);
if (thisDetector->myDetectorType==MOENCH) if (thisDetector->myDetectorType==MOENCH)
setFramesPerFile(MOENCH_MAX_FRAMES_PER_FILE); setFramesPerFile(MOENCH_MAX_FRAMES_PER_FILE);
if (thisDetector->myDetectorType==JUNGFRAUCTB)
setFramesPerFile(JFCTB_MAX_FRAMES_PER_FILE);
thisReceiver = new receiverInterface(dataSocket); thisReceiver = new receiverInterface(dataSocket);
// setAngularConversionPointer(thisDetector->angOff,&thisDetector->nMods, thisDetector->nChans*thisDetector->nChips); // setAngularConversionPointer(thisDetector->angOff,&thisDetector->nMods, thisDetector->nChans*thisDetector->nChips);
@ -872,6 +891,13 @@ slsDetectorDefs::sls_detector_module* slsDetector::createModule(detectorType t)
nd=8; //dacs nd=8; //dacs
na=1; na=1;
break; break;
case JUNGFRAUCTB:
nch=32;
nm=1;
nc=1;
nd=8; // dacs+adcs
na=1;
break;
default: default:
nch=0; // dum! nch=0; // dum!
nm=0; //modules/detector nm=0; //modules/detector
@ -2944,6 +2970,7 @@ slsDetectorDefs::detectorSettings slsDetector::setSettings( detectorSettings ise
break; break;
case MOENCH: case MOENCH:
case GOTTHARD: case GOTTHARD:
case JUNGFRAUCTB:
//settings is saved in myMod.reg //settings is saved in myMod.reg
myMod->reg=thisDetector->currentSettings; myMod->reg=thisDetector->currentSettings;
ostfn << thisDetector->settingsDir << ssettings <<"/settings.sn";// << setfill('0') << setw(3) << hex << getId(MODULE_SERIAL_NUMBER, im) << setbase(10); ostfn << thisDetector->settingsDir << ssettings <<"/settings.sn";// << setfill('0') << setw(3) << hex << getId(MODULE_SERIAL_NUMBER, im) << setbase(10);
@ -2973,6 +3000,7 @@ slsDetectorDefs::detectorSettings slsDetector::setSettings( detectorSettings ise
switch(thisDetector->myDetectorType){ switch(thisDetector->myDetectorType){
case MOENCH: case MOENCH:
case GOTTHARD: case GOTTHARD:
case JUNGFRAUCTB:
ostfn << thisDetector->settingsDir << ssettings << ssettings << ".settings"; ostfn << thisDetector->settingsDir << ssettings << ssettings << ".settings";
break; break;
case EIGER: case EIGER:
@ -3240,9 +3268,9 @@ slsDetectorDefs::runStatus slsDetector::getRunStatus(){
char mess[100]; char mess[100];
strcpy(mess,"aaaaa"); strcpy(mess,"aaaaa");
runStatus retval=ERROR; runStatus retval=ERROR;
#ifdef VERBOSE //#ifdef VERBOSE
std::cout<< "Getting status "<< std::endl; std::cout<< "Getting status "<< std::endl;
#endif //#endif
if (thisDetector->onlineFlag==ONLINE_FLAG) { if (thisDetector->onlineFlag==ONLINE_FLAG) {
if (stopSocket) { if (stopSocket) {
if (stopSocket->Connect()>=0) { if (stopSocket->Connect()>=0) {
@ -4019,18 +4047,6 @@ int slsDetector::setSpeed(speedVariable sp, int value) {
int64_t slsDetector::getTimeLeft(timerIndex index){ int64_t slsDetector::getTimeLeft(timerIndex index){
@ -6819,7 +6835,29 @@ int slsDetector::setCTBPattern(string fname) {
// setErrorMask((getErrorMask())|(RECEIVER_DET_HOSTNAME_NOT_SET)); // setErrorMask((getErrorMask())|(RECEIVER_DET_HOSTNAME_NOT_SET));
// } // }
return ret;
uint64_t word;
int addr=0;
FILE *fd=fopen(fname.c_str(),"r");
if (fd>0) {
while (fread(&word, sizeof(word), 1,fd)) {
setCTBWord(addr,word);
// cout << hex << addr << " " << word << dec << endl;
addr++;
}
fclose(fd);
} else
return -1;
return addr;
} }
@ -6939,7 +6977,7 @@ int slsDetector::setCTBPatWaitAddr(int level, int addr) {
int ret=FAIL; int ret=FAIL;
int fnum=F_SET_CTB_PATTERN; int fnum=F_SET_CTB_PATTERN;
int mode=3; //sets loop int mode=2; //sets loop
char mess[100]; char mess[100];
@ -6989,7 +7027,7 @@ int slsDetector::setCTBPatWaitTime(int level, uint64_t t) {
int ret=FAIL; int ret=FAIL;
// uint64_t retval=-1; // uint64_t retval=-1;
int fnum=F_SET_CTB_PATTERN; int fnum=F_SET_CTB_PATTERN;
int mode=4; //sets loop int mode=3; //sets loop
char mess[100]; char mess[100];

446
slsDetectorSoftware/slsDetector/slsDetectorCommand.cpp
View File

@ -694,6 +694,10 @@ slsDetectorCommand::slsDetectorCommand(slsDetectorUtils *det) {
i++; i++;
descrToFuncMap[i].m_pFuncName="dac"; //
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdDAC;
i++;
/* r/w timers */ /* r/w timers */
@ -782,6 +786,9 @@ slsDetectorCommand::slsDetectorCommand(slsDetectorUtils *det) {
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdTimeLeft; descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdTimeLeft;
i++; i++;
descrToFuncMap[i].m_pFuncName="nframes"; //
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdTimeLeft;
i++;
/* speed */ /* speed */
@ -813,6 +820,14 @@ slsDetectorCommand::slsDetectorCommand(slsDetectorUtils *det) {
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdSpeed; descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdSpeed;
i++; i++;
descrToFuncMap[i].m_pFuncName="adcclk"; //
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdSpeed;
i++;
descrToFuncMap[i].m_pFuncName="adcphase"; //
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdSpeed;
i++;
/* settings dump/retrieve */ /* settings dump/retrieve */
descrToFuncMap[i].m_pFuncName="config"; descrToFuncMap[i].m_pFuncName="config";
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdConfiguration; descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdConfiguration;
@ -959,7 +974,6 @@ slsDetectorCommand::slsDetectorCommand(slsDetectorUtils *det) {
numberOfCommands=i; numberOfCommands=i;
// #ifdef VERBOSE // #ifdef VERBOSE
@ -3353,7 +3367,12 @@ string slsDetectorCommand::cmdDAC(int narg, char *args[], int action) {
char answer[1000]; char answer[1000];
int mode=0; int mode=0;
if (cmd=="vthreshold") int idac=-1;
if (sscanf(args[0],"dac:%d",&idac)==1) {
printf("chiptestboard!\n");
dac=(dacIndex)idac;
}
else if (cmd=="vthreshold")
dac=THRESHOLD; dac=THRESHOLD;
else if (cmd=="vcalibration") else if (cmd=="vcalibration")
dac=CALIBRATION_PULSE; dac=CALIBRATION_PULSE;
@ -3391,6 +3410,7 @@ string slsDetectorCommand::cmdDAC(int narg, char *args[], int action) {
dac=G_VREF_COMP; dac=G_VREF_COMP;
else if (cmd=="ib_test_c") else if (cmd=="ib_test_c")
dac=G_IB_TESTC; dac=G_IB_TESTC;
else if (cmd=="dac0") else if (cmd=="dac0")
dac=V_DAC0; dac=V_DAC0;
else if (cmd=="dac1") else if (cmd=="dac1")
@ -3407,6 +3427,10 @@ string slsDetectorCommand::cmdDAC(int narg, char *args[], int action) {
dac=V_DAC6; dac=V_DAC6;
else if (cmd=="dac7") else if (cmd=="dac7")
dac=V_DAC7; dac=V_DAC7;
else if (cmd== "vsvp") else if (cmd== "vsvp")
dac=E_SvP; dac=E_SvP;
else if (cmd=="vsvn") else if (cmd=="vsvn")
@ -3825,6 +3849,8 @@ string slsDetectorCommand::cmdTimeLeft(int narg, char *args[], int action) {
index=ACTUAL_TIME; index=ACTUAL_TIME;
else if (cmd=="timestamp") else if (cmd=="timestamp")
index=MEASUREMENT_TIME; index=MEASUREMENT_TIME;
else if (cmd=="nframes")
index=FRAMES_FROM_START;
else else
return string("could not decode timer ")+cmd; return string("could not decode timer ")+cmd;
@ -3909,6 +3935,10 @@ string slsDetectorCommand::cmdSpeed(int narg, char *args[], int action) {
index=PHASE_SHIFT; index=PHASE_SHIFT;
else if (cmd=="oversampling") else if (cmd=="oversampling")
index=OVERSAMPLING; index=OVERSAMPLING;
else if (cmd=="adcclk")
index=ADC_CLOCK;
else if (cmd=="adcphase")
index=ADC_PHASE;
else else
return string("could not decode speed variable ")+cmd; return string("could not decode speed variable ")+cmd;
@ -4316,30 +4346,406 @@ string slsDetectorCommand::helpPattern(int narg, char *args[], int action) {
string slsDetectorCommand::cmdPattern(int narg, char *args[], int action) { string slsDetectorCommand::cmdPattern(int narg, char *args[], int action) {
if (action==HELP_ACTION)
return helpPattern(narg, args, action);
/******** /********
Must implement set ctb functions in slsDetector and multiSlsDetector Must implement set ctb functions in slsDetector and multiSlsDetector
**********/ **********/
string fname;
int addr, start, stop, n;
uint64_t word, t;
myDet->setOnline(ONLINE_FLAG);
ostringstream os; ostringstream os;
if (cmd=="pattern") ; if (cmd=="pattern") {
else if (cmd=="patword") ; //get fname fron stdin
else if (cmd=="patioctrl") ;
else if (cmd=="patclkctrl") ; if (action==PUT_ACTION) {
else if (cmd=="patlimits") ; fname=string(args[1]);
else if (cmd=="patloop0") ; os << myDet->setCTBPattern(fname);
else if (cmd=="patloop1") ; } else if (action==GET_ACTION)
else if (cmd=="patloop2") ; os << "Cannot get";
else if (cmd=="patnloop0") ; } else if (cmd=="patword") {
else if (cmd=="patnloop1") ;
else if (cmd=="patnloop2") ; if (action==PUT_ACTION) {
else if (cmd=="patwait0") ; //get addr, word from stdin
else if (cmd=="patwait1") ;
else if (cmd=="patwait2") ; if(narg<3)
else if (cmd=="patwaittime0") ; return string("wrong usage: should specify both address and value (hexadecimal fomat) ");
else if (cmd=="patwaittime1") ;
else if (cmd=="patwaittime2") ; if (sscanf(args[1],"%x",&addr))
else return helpPattern(narg, args, action); ;
else
return string("Could not scan address (hexadecimal fomat) ")+string(args[1]);
if (sscanf(args[2],"%llx",&word))
;
else
return string("Could not scan value (hexadecimal fomat) ")+string(args[2]);
os << hex << myDet->setCTBWord(addr,word) << dec;
} else if (action==GET_ACTION)
os << "Cannot get";
} else if (cmd=="patioctrl") {
//get word from stdin
if (action==PUT_ACTION) {
if (sscanf(args[1],"%llx",&word))
;
else
return string("Could not scan value (hexadecimal fomat) ")+string(args[1]);
myDet->setCTBWord(-1,word);
}
os << hex << myDet->setCTBWord(-1,-1) << dec;
} else if (cmd=="patclkctrl") {
//get word from stdin
if (action==PUT_ACTION) {
if (sscanf(args[1],"%llx",&word))
;
else
return string("Could not scan value (hexadecimal fomat) ")+string(args[1]);
myDet->setCTBWord(-2,word);
}
os << hex << myDet->setCTBWord(-2,-1) << dec;
} else if (cmd=="patlimits") {
//get start, stop from stdin
if (action==PUT_ACTION) {
if(narg<3) return string("wrong usage: should specify both start and stop address (hexadecimal fomat) ");
n=-1;
if (sscanf(args[1],"%x",&start))
;
else
return string("Could not scan start address (hexadecimal fomat) ")+string(args[1]);
if (sscanf(args[2],"%x",&stop))
;
else
return string("Could not scan stop address (hexadecimal fomat) ")+string(args[2]);
myDet->setCTBPatLoops(-1,start, stop,n);
}
start=-1;
stop=-1;
n=-1;
myDet->setCTBPatLoops(-1,start, stop,n);
os << hex << start << " " << stop;// << " "<< dec << n ;
} else if (cmd=="patloop0") {
//get start, stop from stdin
//get start, stop from stdin
if (action==PUT_ACTION) {
if(narg<3) return string("wrong usage: should specify both start and stop address (hexadecimal fomat) ");
n=-1;
if (sscanf(args[1],"%x",&start))
;
else
return string("Could not scan start address (hexadecimal fomat) ")+string(args[1]);
if (sscanf(args[2],"%x",&stop))
;
else
return string("Could not scan stop address (hexadecimal fomat) ")+string(args[2]);
myDet->setCTBPatLoops(0,start, stop,n);
}
start=-1;
stop=-1;
n=-1;
myDet->setCTBPatLoops(0,start, stop,n);
os << hex << start << " " << stop;// << " "<< dec << n ;
} else if (cmd=="patloop1") {
//get start, stop from stdin
if (action==PUT_ACTION) {
if(narg<3) return string("wrong usage: should specify both start and stop address (hexadecimal fomat) ");
n=-1;
if (sscanf(args[1],"%x",&start))
;
else
return string("Could not scan start address (hexadecimal fomat) ")+string(args[1]);
if (sscanf(args[2],"%x",&stop))
;
else
return string("Could not scan stop address (hexadecimal fomat) ")+string(args[2]);
myDet->setCTBPatLoops(1,start, stop,n);
}
start=-1;
stop=-1;
n=-1;
myDet->setCTBPatLoops(1,start, stop,n);
os << hex << start << " " << stop;// << " "<< dec << n ;
} else if (cmd=="patloop2") {
//get start, stop from stdin
if (action==PUT_ACTION) {
if(narg<3) return string("wrong usage: should specify both start and stop address (hexadecimal fomat) ");
n=-1;
if (sscanf(args[1],"%x",&start))
;
else
return string("Could not scan start address (hexadecimal fomat) ")+string(args[1]);
if (sscanf(args[2],"%x",&stop))
;
else
return string("Could not scan stop address (hexadecimal fomat) ")+string(args[2]);
myDet->setCTBPatLoops(2,start, stop,n) ;
}
start=-1;
stop=-1;
n=-1;
myDet->setCTBPatLoops(2,start, stop,n);
os << hex << start << " " << stop << dec;// << " "<< dec << n ;
} else if (cmd=="patnloop0") {
start=-1;
stop=-1;
if (action==PUT_ACTION) {
if (sscanf(args[1],"%d",&n))
;
else
return string("Could not scan number of loops ")+string(args[1]);
myDet->setCTBPatLoops(0,start, stop,n) ;
}
start=-1;
stop=-1;
n=-1;
myDet->setCTBPatLoops(0,start, stop,n);
os << n ;
} else if (cmd=="patnloop1") {
start=-1;
stop=-1;
if (action==PUT_ACTION) {
if (sscanf(args[1],"%d",&n))
;
else
return string("Could not scan number of loops ")+string(args[1]);
myDet->setCTBPatLoops(1,start, stop,n) ;
}
start=-1;
stop=-1;
n=-1;
myDet->setCTBPatLoops(1,start, stop,n);
os << n ;
} else if (cmd=="patnloop2") {
start=-1;
stop=-1;
if (action==PUT_ACTION) {
if (sscanf(args[1],"%d",&n))
;
else
return string("Could not scan number of loops ")+string(args[1]);
myDet->setCTBPatLoops(2,start, stop,n) ;
}
start=-1;
stop=-1;
n=-1;
myDet->setCTBPatLoops(2,start, stop,n);
os << n ;
} else if (cmd=="patwait0") {
if (action==PUT_ACTION) {
if (sscanf(args[1],"%x",&addr))
;
else
return string("Could not scan wait address (hex format)")+string(args[1]);
myDet->setCTBPatWaitAddr(0,addr);
}
os << hex << myDet->setCTBPatWaitAddr(0,-1) << dec;
} else if (cmd=="patwait1") {
if (action==PUT_ACTION) {
if (sscanf(args[1],"%x",&addr))
;
else
return string("Could not scan wait address (hex format)")+string(args[1]);
myDet->setCTBPatWaitAddr(1,addr);
}
os << hex << myDet->setCTBPatWaitAddr(1,-1) << dec;
} else if (cmd=="patwait2") {
if (action==PUT_ACTION) {
if (sscanf(args[1],"%x",&addr))
;
else
return string("Could not scan wait address (hex format)")+string(args[1]);
myDet->setCTBPatWaitAddr(2,addr);
}
os << hex << myDet->setCTBPatWaitAddr(2,-1) << dec ;
} else if (cmd=="patwaittime0") {
if (action==PUT_ACTION) {
if (sscanf(args[1],"%lld",&t))
;
else
return string("Could not scan wait time")+string(args[1]);
myDet->setCTBPatWaitTime(0,t);
}
os << myDet->setCTBPatWaitTime(0,-1);
} else if (cmd=="patwaittime1") {
if (action==PUT_ACTION) {
if (sscanf(args[1],"%lld",&t))
;
else
return string("Could not scan wait time ")+string(args[1]);
myDet->setCTBPatWaitTime(1,t);
}
os << myDet->setCTBPatWaitTime(1,-1);
} else if (cmd=="patwaittime2") {
if (action==PUT_ACTION) {
if (sscanf(args[1],"%lld",&t))
;
else
return string("Could not scan wait time ")+string(args[1]);
myDet->setCTBPatWaitTime(2,t);
}
os << myDet->setCTBPatWaitTime(2,-1);
}
else return helpPattern(narg, args, action);
return os.str(); return os.str();

4
slsDetectorSoftware/slsDetectorAnalysis/fileIO.cpp
View File

@ -78,7 +78,7 @@ int fileIO::writeDataFile(string fname, int *data){
int fileIO::writeDataFile(ofstream &outfile, int *data, int offset){ int fileIO::writeDataFile(ofstream &outfile, int *data, int offset){
cout << "Write raw file...." << endl; // cout << "Write raw file...." << endl;
return fileIOStatic::writeDataFile(outfile, getTotalNumberOfChannels(), data, offset); return fileIOStatic::writeDataFile(outfile, getTotalNumberOfChannels(), data, offset);
} }
@ -86,6 +86,8 @@ int fileIO::writeDataFile(ofstream &outfile, int *data, int offset){
int fileIO::writeDataFile(void *data, int iframe) { int fileIO::writeDataFile(void *data, int iframe) {
// cout << "fileIO writeDataFile" << endl;
if (iframe<0) if (iframe<0)
iframe=frameIndex; iframe=frameIndex;