diff --git a/slsDetectorSoftware/eigerDetectorServer/slsDetectorFunctionList.c b/slsDetectorSoftware/eigerDetectorServer/slsDetectorFunctionList.c index 1302037fe..46e9f4ed6 100644 --- a/slsDetectorSoftware/eigerDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorSoftware/eigerDetectorServer/slsDetectorFunctionList.c @@ -83,6 +83,191 @@ int normal = 0; #define ONE_GIGA_BUFFER_SIZE 1040 +void checkFirmwareCompatibility(){ + int64_t fwversion = getDetectorId(DETECTOR_FIRMWARE_VERSION); + int64_t swversion = getDetectorId(DETECTOR_SOFTWARE_VERSION); + int64_t sw_fw_apiversion = getDetectorId(SOFTWARE_FIRMWARE_API_VERSION); + + cprintf(BLUE,"\n\n********************************************************\n" + "**********************EIGER Server**********************\n" + "********************************************************\n"); + cprintf(BLUE,"\n" + "Firmware Version:\t\t %lld\n" + "Software Version:\t\t %llx\n" + "F/w-S/w API Version:\t\t %lld\n" + "Required Firmware Version:\t %d\n" + "\n********************************************************\n", + fwversion,swversion,sw_fw_apiversion,REQUIRED_FIRMWARE_VERSION); + + //cant read versions + if(!fwversion || !sw_fw_apiversion){ + cprintf(RED,"FATAL ERROR: Cant read versions from FPGA. Please update firmware\n"); + cprintf(RED,"Exiting Server. Goodbye!\n\n"); + exit(-1); + } + + //check for API compatibility - old server + if(sw_fw_apiversion > REQUIRED_FIRMWARE_VERSION){ + cprintf(RED,"FATAL ERROR: This software version is incompatible.\n" + "Please update it to be compatible with this firmware\n\n"); + cprintf(RED,"Exiting Server. Goodbye!\n\n"); + exit(-1); + } + + //check for firmware compatibility - old firmware + if( REQUIRED_FIRMWARE_VERSION > fwversion){ + cprintf(RED,"FATAL ERROR: This firmware version is incompatible.\n" + "Please update it to v%d to be compatible with this server\n\n", REQUIRED_FIRMWARE_VERSION); + cprintf(RED,"Exiting Server. Goodbye!\n\n"); + exit(-1); + } +} + + + +int moduleTest( enum digitalTestMode arg, int imod){ + //template testShiftIn from mcb_funcs.c + + //CHIP_TEST + //testShiftIn + //testShiftOut + //testShiftStSel + //testDataInOutMux + //testExtPulseMux + //testOutMux + //testFpgaMux + + return OK; +} + + + + + +int detectorTest( enum digitalTestMode arg){ + //templates from firmware_funcs.c + + //DETECTOR_FIRMWARE_TEST:testFpga() + //DETECTOR_MEMORY_TEST:testRAM() + //DETECTOR_BUS_TEST:testBus() + //DETECTOR_SOFTWARE_TEST:testFpga() + return OK; +} + + +int64_t getDetectorId(enum idMode arg){ + int64_t retval = -1; + + switch(arg){ + case DETECTOR_SERIAL_NUMBER: + retval = getDetectorNumber();/** to be implemented with mac? */ + break; + case DETECTOR_FIRMWARE_VERSION: + return (int64_t)getFirmwareVersion(); + case SOFTWARE_FIRMWARE_API_VERSION: + return (int64_t)Beb_GetFirmwareSoftwareAPIVersion(); + case DETECTOR_SOFTWARE_VERSION: + retval= SVNREV; + retval= (retval <<32) | SVNDATE; + //cprintf(BLUE,"git date:%x, git rev:%x\n",SVNDATE,SVNREV); + break; + default: + break; + } + + return retval; +} + +u_int64_t getFirmwareVersion() { + return Beb_GetFirmwareRevision(); +} + +int64_t getModuleId(enum idMode arg, int imod){ + + /**/ + return -1; +} + + +int getDetectorNumber(){ + int res=0; + + //execute and get address + char output[255]; + FILE* sysFile = popen("more /home/root/executables/detid.txt", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + sscanf(output,"%d",&res); + printf("detector id: %d\n",res); + +/* + int res=0; + char hostname[100]; + if (gethostname(hostname, sizeof hostname) == 0) + puts(hostname); + else + perror("gethostname"); + sscanf(hostname,"%x",&res); +*/ + return res; +} + + +u_int64_t getDetectorMAC() { + char mac[255]=""; + u_int64_t res=0; + + //execute and get address + char output[255]; + FILE* sysFile = popen("more /sys/class/net/eth0/address", "r"); + //FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + + //getting rid of ":" + char * pch; + pch = strtok (output,":"); + while (pch != NULL){ + strcat(mac,pch); + pch = strtok (NULL, ":"); + } + sscanf(mac,"%llx",&res); + //increment by 1 for 10g + if(send_to_ten_gig) + res++; + //printf("mac:%llx\n",res); + + return res; +} + + + +int getDetectorIP(){ + char temp[50]=""; + int res=0; + //execute and get address + char output[255]; + FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + + //converting IPaddress to hex. + char* pcword = strtok (output,"."); + while (pcword != NULL) { + sprintf(output,"%02x",atoi(pcword)); + strcat(temp,output); + pcword = strtok (NULL, "."); + } + strcpy(output,temp); + sscanf(output, "%x", &res); + //printf("ip:%x\n",res); + + return res; +} + + + + int initDetector(){ int imod,i,n; n = getNModBoard(1); @@ -216,148 +401,10 @@ int getNModBoard(enum dimension arg){ -int64_t getModuleId(enum idMode arg, int imod){ - - /**/ - return -1; -} -int64_t getDetectorId(enum idMode arg){ - int64_t retval = -1; - - switch(arg){ - case DETECTOR_SERIAL_NUMBER: - retval = getDetectorNumber();/** to be implemented with mac? */ - break; - case DETECTOR_FIRMWARE_VERSION: - return (int64_t)Beb_GetFirmwareRevision(); - case SOFTWARE_FIRMWARE_API_VERSION: - return (int64_t)Beb_GetFirmwareSoftwareAPIVersion(); - case DETECTOR_SOFTWARE_VERSION: - retval= SVNREV; - retval= (retval <<32) | SVNDATE; - //cprintf(BLUE,"git date:%x, git rev:%x\n",SVNDATE,SVNREV); - break; - default: - break; - } - - return retval; -} - - - -int getDetectorNumber(){ - int res=0; - - //execute and get address - char output[255]; - FILE* sysFile = popen("more /home/root/executables/detid.txt", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - sscanf(output,"%d",&res); - printf("detector id: %d\n",res); - -/* - int res=0; - char hostname[100]; - if (gethostname(hostname, sizeof hostname) == 0) - puts(hostname); - else - perror("gethostname"); - sscanf(hostname,"%x",&res); -*/ - return res; -} - - -u_int64_t getDetectorMAC() { - char mac[255]=""; - u_int64_t res=0; - - //execute and get address - char output[255]; - FILE* sysFile = popen("more /sys/class/net/eth0/address", "r"); - //FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - //increment by 1 for 10g - if(send_to_ten_gig) - res++; - //printf("mac:%llx\n",res); - - return res; -} - - - -int getDetectorIP(){ - char temp[50]=""; - int res=0; - //execute and get address - char output[255]; - FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - - //converting IPaddress to hex. - char* pcword = strtok (output,"."); - while (pcword != NULL) { - sprintf(output,"%02x",atoi(pcword)); - strcat(temp,output); - pcword = strtok (NULL, "."); - } - strcpy(output,temp); - sscanf(output, "%x", &res); - //printf("ip:%x\n",res); - - return res; -} - - - -int moduleTest( enum digitalTestMode arg, int imod){ - //template testShiftIn from mcb_funcs.c - - //CHIP_TEST - //testShiftIn - //testShiftOut - //testShiftStSel - //testDataInOutMux - //testExtPulseMux - //testOutMux - //testFpgaMux - - return OK; -} - - - - - -int detectorTest( enum digitalTestMode arg){ - //templates from firmware_funcs.c - - //DETECTOR_FIRMWARE_TEST:testFpga() - //DETECTOR_MEMORY_TEST:testRAM() - //DETECTOR_BUS_TEST:testBus() - //DETECTOR_SOFTWARE_TEST:testFpga() - return OK; -} - - diff --git a/slsDetectorSoftware/jungfrauDetectorServer/Makefile b/slsDetectorSoftware/jungfrauDetectorServer/Makefile index 7e7dd500a..436b54b8d 100755 --- a/slsDetectorSoftware/jungfrauDetectorServer/Makefile +++ b/slsDetectorSoftware/jungfrauDetectorServer/Makefile @@ -6,7 +6,7 @@ CROSS = bfin-uclinux- CC = $(CROSS)gcc -CFLAGS += -Wall -DJUNGFRAUD -DMCB_FUNCS -DDACS_INT -DDEBUG -DV1 #-DVERBOSE #-DVERYVERBOSE #-DVIRTUAL +CFLAGS += -Wall -DJUNGFRAUD -DMCB_FUNCS -DDACS_INT #-DVERBOSE #-DVERYVERBOSE #-DVIRTUAL PROGS= jungfrauDetectorServer diff --git a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c index 9bc876987..3fac53522 100755 --- a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c +++ b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c @@ -131,22 +131,16 @@ void initializeDetector(){ printf("Initializing Detector\n"); //initial test - if ( (testFpga() == FAIL) || (testBus() == FAIL) || (checkType() == FAIL)) { + if ( (checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL) ) { cprintf(BG_RED, "Dangerous to continue. Goodbye!\n"); exit(-1); } - printVersions(); - printf("Resetting PLL\n"); resetPLL(); - resetCore(); resetPeripheral(); - /*bus_w(CONTROL_REG, SYNC_RESET); Carlos #define SYNC_RESET 0x0400 - bus_w(CONTROL_REG, 0); - bus_w(CONTROL_REG, GB10_RESET_BIT); #define GB10_RESET_BIT 0x0800 - bus_w(CONTROL_REG, 0);*/ + cleanFifos(); //allocating module structure for the detector in the server #ifdef MCB_FUNCS @@ -172,18 +166,11 @@ void initializeDetector(){ } } - /* Only once */ - bus_w(DAQ_REG, 0x0);/**carlos? not defined */ + bus_w(DAQ_REG, 0x0); /* Only once at server startup */ - configureAdc(); - - bus_w(SAMPLE_REG,SAMPLE_ADC_HALF_SPEED); - adcPhase(ADC_PHASE_HALF_SPEED); //set adc_clock_phase in unit of 1/(52) clock period (by trial and error) - - cleanFifos(); - resetCore(); - - initSpeedConfGain(DAQ_HALF_SPEED); + setClockDivider(HALF_SPEED); + cleanFifos(); /* todo might work without */ + resetCore(); /* todo might work without */ //Initialization of acquistion parameters @@ -193,12 +180,8 @@ void initializeDetector(){ setExposureTime(DEFAULT_EXPTIME); setPeriod(DEFAULT_PERIOD); setDelay(DEFAULT_DELAY); - setGates(DEFAULT_NUM_GATES); setHighVoltage(DEFAULT_HIGH_VOLTAGE); - setTiming(GET_EXTERNAL_COMMUNICATION_MODE); - setMaster(GET_MASTER); - setSynchronization(GET_SYNCHRONIZATION_MODE); } int checkType() { @@ -207,6 +190,10 @@ int checkType() { cprintf(BG_RED,"This is not a Jungfrau Server (read %d, expected %d)\n",type, JUNGFRAU); return FAIL; } + + + printVersions(); + return OK; } @@ -475,11 +462,10 @@ long int calcChecksum(int sourceip, int destip) { unsigned short *addr; long int sum = 0; long int checksum; -/**carlos ip packet size fixed in firmware? 0x2036? */ ip.ip_ver = 0x4; ip.ip_ihl = 0x5; ip.ip_tos = 0x0; - ip.ip_len = 0x2052; //ipPacketSize;//fixed in firmware + ip.ip_len = IP_PACKETSIZE; ip.ip_ident = 0x0000; ip.ip_flag = 0x2; //not nibble aligned (flag& offset ip.ip_offset = 0x000; @@ -506,7 +492,7 @@ long int calcChecksum(int sourceip, int destip) { -void configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, int detipad, uint32_t destport) { +void configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, int sourceip, uint32_t destport) { uint32_t sourceport = DEFAULT_TX_UDP_PORT; long int checksum=calcChecksum(sourceip, destip); @@ -524,7 +510,7 @@ void configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, int det cleanFifos(); resetCore(); - usleep(500 * 1000); /** carlos time cuz of reset or writing configure para? */ + usleep(500 * 1000); /* todo maybe without */ } @@ -579,59 +565,53 @@ int64_t getFrames(){ int64_t setExposureTime(int64_t value){ if (value!=-1){ printf("\nSetting exptime to %lldns\n",(long long int)value); - value*=(1E-3*CLK_EXPTIME); + value*=(1E-3*CLK_RUN); } - int64_t retval = set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-3*CLK_EXPTIME); + int64_t retval = set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-3*CLK_RUN); printf("Getting exptime: %lldns\n",(long long int)retval); return retval; } int64_t getExposureTime(){ - return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG)/(1E-3*CLK_EXPTIME); + return 0; } int64_t setGates(int64_t value){ - if(value!=-1) - printf("\nSetting number of gates to %lld\n",(long long int)value); -/* - int64_t retval = set64BitReg(value, SET_GATES_LSB_REG, SET_GATES_MSB_REG); - printf("Getting number of gates: %lld\n",(long long int)retval); - return retval; Carlos set gates not defined */ return 0; } int64_t getGates(){ - return get64BitReg(GET_GATES_LSB_REG, GET_GATES_MSB_REG); + return 0; } int64_t setDelay(int64_t value){ if (value!=-1){ printf("\nSetting delay to %lldns\n",(long long int)value); - value*=(1E-3*CLK_FC); + value*=(1E-3*CLK_SYNC); } - int64_t retval = set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-3*CLK_FC); + int64_t retval = set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-3*CLK_SYNC); printf("Getting delay: %lldns\n",(long long int)retval); return retval; } int64_t getDelay(){ - return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-3*CLK_FC); + return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-3*CLK_SYNC); } int64_t setPeriod(int64_t value){ if (value!=-1){ printf("\nSetting period to %lldns\n",(long long int)value); - value*=(1E-3*CLK_FC); + value*=(1E-3*CLK_SYNC); } - int64_t retval = set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-3*CLK_FC); + int64_t retval = set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-3*CLK_SYNC); printf("Getting period: %lldns\n",(long long int)retval); return retval; } int64_t getPeriod(){ - return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG)/(1E-3*CLK_FC); + return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG)/(1E-3*CLK_SYNC); } int64_t setTrains(int64_t value){ @@ -655,24 +635,15 @@ int64_t getProbes(){ return 0; } -int64_t setProgress() {/** carlos ? */ - return 0; -} - -int64_t getProgress() {/** carlos ? */ - //should be done in firmware!!!! - return 0; - -} int64_t getActualTime(){ - return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG)/(1E-9*CLK_FREQ); /**carlos should be CLK_FC or CLK_EXPTIME.. is clk_freq every used?*/ + return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG)/(1E-9*CLK_SYNC); } int64_t getMeasurementTime(){ - int64_t v=get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG); - return v/(1E-9*CLK_FREQ);/**carlos should be CLK_FC or CLK_EXPTIME.. is clk_freq every used?*/ + return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG)/(1E-9*CLK_SYNC); + } int64_t getFramesFromStart(){ @@ -702,22 +673,11 @@ u_int32_t runBusy(void) { int startStateMachine(){ printf("*******Starting State Machine*******\n"); - // cleanFifo; - // fifoReset(); - /*Not implemented yet - bus_w(CONTROL_REG, FIFO_RESET_BIT); #define FIFO_RESET_BIT 0x8000 Carlos same as cleanFifos()? - bus_w(CONTROL_REG, 0x0); - */ + cleanFifos(); + //start state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK); /** no usleep required, like in stop?*/ - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK); - - /*Not implemented yet check with Carlos - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK | START_EXPOSURE_BIT); #define START_EXPOSURE_BIT 0x0040 - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK & ~START_EXPOSURE_BIT); - */ - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK); printf("Status Register: %08x\n",bus_r(STATUS_REG)); return OK; @@ -739,16 +699,6 @@ int stopStateMachine(){ } -int startReadOut(){ - cprintf(BG_RED, "*******Starting State Machine Readout*******\n"); - - /* Not implemented yet check with Carlos - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK | CONTROL_START_READOUT_BIT); #define STOP_READOUT_BIT 0x0020 - usleep(100); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK & ~CONTROL_START_READOUT_BIT); - */ - return OK; -} enum runStatus getStatus() { #ifdef VERBOSE @@ -957,40 +907,8 @@ void setAdc(int addr, int val) { -void configureAdc() { - printf("Configuring Adcs\n"); - //power mode reset - setAdc(AD9257_POWER_MODE_REG, - (AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK); - //power mode chip run - setAdc(AD9257_POWER_MODE_REG, - (AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK); - // lvds-iee reduced , binary offset - setAdc(AD9257_OUT_MODE_REG, - (AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK); - - // all devices on chip to receive next command - setAdc(AD9257_DEV_IND_2_REG, - AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK); - setAdc(AD9257_DEV_IND_1_REG, - AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK | - AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK); - - // vref 1.33 - setAdc(AD9257_VREF_REG, - (AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK); - - printf("Setting ADC Port Invert Reg to 0x%08x\n", ADC_PORT_INVERT_VAL); - bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL); - - printf("Setting ADC Offset Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL); - bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); -} - - - -void prepareADC(){ /** Carlos combine configureAdc and prepare adc? need prepareadc? only output clock phase and no test mode */ +void prepareADC(){ printf("Preparing ADC\n"); //power mode reset @@ -1008,6 +926,17 @@ void prepareADC(){ /** Carlos combine configureAdc and prepare adc? need prepare setAdc(AD9257_OUT_MODE_REG, (AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK); + // all devices on chip to receive next command + setAdc(AD9257_DEV_IND_2_REG, + AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK); + setAdc(AD9257_DEV_IND_1_REG, + AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK | + AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK); + + // vref 1.33 + setAdc(AD9257_VREF_REG, + (AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK); + // no test mode setAdc(AD9257_TEST_MODE_REG, (AD9257_NONE_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK); @@ -1020,10 +949,6 @@ void prepareADC(){ /** Carlos combine configureAdc and prepare adc? need prepare setAdc(AD9257_TEST_MODE_REG, (AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK); #endif - - bus_w(ADC_LATCH_DISABLE_REG,0x0); // enable all ADCs - bus_w(DAQ_REG, 0x12); /**carlos daq reg not detail defined */ //adc pipeline=18 - bus_w(DAQ_REG,0xbbbbbbbb); /**carlos daq reg not detail defined */ } @@ -1074,7 +999,7 @@ int powerChip (int on){ -void cleanFifos() { /** check with Carlos, resettig it no usleep required in resetting it) */ +void cleanFifos() { printf("Clearing Acquisition Fifos\n"); bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_ACQ_FIFO_CLR_MSK); bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_ACQ_FIFO_CLR_MSK); @@ -1095,7 +1020,7 @@ void resetPeripheral() { -int adcPhase(int st){ /**carlos needed clkphase 1 and 2? */ +int adcPhase(int st){ /**carlos needed clkphase 1 and 2? cehck with Aldo */ printf("\nSetting ADC Phase to %d\n",st); if (st > 65535 || st < -65535) return clkPhase[0]; @@ -1118,38 +1043,37 @@ int getPhase() { u_int32_t setClockDivider(int d) { - - enum clkspeed{FULL,HALF,QUARTER}; - if(d!=-1){ switch(d){ //stop state machine if running if(runBusy()) stopStateMachine(); - case FULL: - printf("Setting Half Speed (40 MHz)\n"); + case FULL_SPEED://40 + printf("Setting Half Speed (20 MHz):\n"); /**to be done*/ - bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); - bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); - initSpeedConfGain(DAQ_HALF_SPEED); - adcPhase(ADC_PHASE_HALF_SPEED); + + printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED); bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); + printf("Setting Config Reg to 0x%x\n", CONFIG_HALF_SPEED); bus_w(CONFIG_REG, CONFIG_HALF_SPEED); + printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL); bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); + printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED); adcPhase(ADC_PHASE_HALF_SPEED); break; - case HALF: - printf("Setting Half Speed (20 MHz)\n"); - bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); - bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); - initSpeedConfGain(DAQ_HALF_SPEED); - adcPhase(ADC_PHASE_HALF_SPEED); + case HALF_SPEED: + printf("Setting Half Speed (20 MHz):\n"); + printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED); bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); + printf("Setting Config Reg to 0x%x\n", CONFIG_HALF_SPEED); bus_w(CONFIG_REG, CONFIG_HALF_SPEED); + printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL); bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); + printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED); adcPhase(ADC_PHASE_HALF_SPEED); break; - case QUARTER: - printf("Setting Half Speed (10 MHz)\n"); - bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED); - bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL); - initSpeedConfGain(DAQ_QUARTER_SPEED); - adcPhase(ADC_PHASE_QUARTER_SPEED); + case QUARTER_SPEED: + printf("Setting Half Speed (10 MHz):\n"); + printf("Setting Sample Reg to 0x%x\n", SAMPLE_ADC_QUARTER_SPEED); bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED); + printf("Setting Config Reg to 0x%x\n", CONFIG_QUARTER_SPEED); bus_w(CONFIG_REG, CONFIG_QUARTER_SPEED); + printf("Setting ADC Ofst Reg to 0x%x\n", ADC_OFST_QUARTER_SPEED_VAL); bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL); + printf("Setting ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED); adcPhase(ADC_PHASE_QUARTER_SPEED); break; } + printf("\n"); } return getClockDivider(); } @@ -1161,14 +1085,15 @@ u_int32_t setClockDivider(int d) { u_int32_t getClockDivider(int ic) { - enum clkspeed{FULL,HALF,QUARTER}; - switch(initSpeedConfGain(-1)){ - //case FULLSPEED_CONF: - //return FULL; - case DAQ_HALF_SPEED: - return HALF; - case DAQ_QUARTER_SPEED: - return QUARTER; + u_int32_t val = bus_r(CONFIG_REG); + int speed = val & CONFIG_READOUT_SPEED_MSK; + switch(speed){ + case CONFIG_FULL_SPEED_40MHZ_VAL: + return FULL_SPEED; + case CONFIG_HALF_SPEED_20MHZ_VAL: + return HALF_SPEED; + case CONFIG_QUARTER_SPEED_10MHZ_VAL: + return QUARTER_SPEED; default: return -1; } @@ -1185,7 +1110,7 @@ u_int32_t getClockDivider(int ic) { -/**carlos shouldnt exist what sort of temperatre?s tempr in reg is 1b<11 and temp pit is 1c<11*/ +/**carlos shouldnt exist what sort of temperatre?s tempr in reg is 1b<11 and temp pit is 1c<11 ..firmware (only 0x1c 32 bit ) Aldo.. is it connected??*/ int getTemperature(int tempSensor, int imod){ int val; imod=0;//ignoring more than 1 mod for now @@ -1223,19 +1148,18 @@ int getTemperature(int tempSensor, int imod){ } - +//settings int initConfGain(int isettings,int val,int imod){ int retval; - u_int32_t addr=DAQ_REG; /**carlos*/ + u_int32_t addr=DAQ_REG; if(isettings!=-1){ //#ifdef VERBOSE printf("Setting Gain with val:0x%x\n",val); //#endif - bus_w(addr,(val|(bus_r(addr)&~GAIN_MASK))); + bus_w(addr,val); } - retval=(bus_r(addr)&GAIN_MASK); + retval=bus_r(addr); //#ifdef VERBOSE - printf("Value read from Gain reg is 0x%x\n",retval); printf("Gain Reg Value is 0x%x\n",bus_r(addr)); //#endif return retval; @@ -1243,24 +1167,6 @@ int initConfGain(int isettings,int val,int imod){ -int initSpeedConfGain(int val){ - int retval; - u_int32_t addr=DAQ_REG; /**carlos*/ - if(val!=-1){ - //#ifdef VERBOSE - printf("\nSetting Speed of Gain reg with val:0x%x\n",val); - //#endif - bus_w(addr,((val<>SPEED_GAIN_OFFSET); - //#ifdef VERBOSE - printf("Value read from Speed of Gain reg is 0x%x\n",retval); - printf("Gain Reg Value is 0x%x\n",bus_r(addr)); - //#endif - return retval; -} - - @@ -1277,76 +1183,23 @@ void resetPLL() { } -u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) { - -/** carlos status reg pll reconfig busy bit?? */ - // printf("*********** pll busy: %08x\n",bus_r(STATUS_REG)&PLL_RECONFIG_BUSY); +u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val) { // set parameter bus_w(PLL_PARAM_REG, val); // set address - bus_w(PLL_CONTROL_REG, (reg << PLL_CTRL_ADDR_OFST) & PLL_CTRL_ADDR_MSK); /** should i read it first? */ - usleep(10000); + bus_w(PLL_CONTROL_REG, (reg << PLL_CTRL_ADDR_OFST) & PLL_CTRL_ADDR_MSK); + usleep(10*1000); //write parameter bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) | PLL_CTRL_WR_PARAMETER_MSK); bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) & ~PLL_CTRL_WR_PARAMETER_MSK); - usleep(10000); -/**carlos usleep after?*/ + usleep(10*1000); return val; - } -u_int32_t getPllReconfigReg(u_int32_t reg, int trig) { - - - // set address - bus_w(PLL_CONTROL_REG, (reg << PLL_CTRL_ADDR_OFST) & PLL_CTRL_ADDR_MSK); /** should i read it first? */ - usleep(100); /** carlos why less */ - - /** Not implemented yet carlos - bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) | PLL_CTRL_RD_PARAMETER_MSK | PLL_CTRL_TRIG_MSK); - bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) & ~PLL_CTRL_RD_PARAMETER_MSK & ~PLL_CTRL_TRIG_MSK); - usleep(100); - bus_w(PLL_CONTROL_REG, 0x0); //write zero? problem if address remain? - - while(bus_r(STATUS_REG) & PLL_RECONFIG_BUSY) { - printf("get: reconfig busy"); - } - return what?? - */ - - /* nonsense - u_int32_t val=reg<0) { /**carlos ? */ + printf("phase in %d\n", clkPhase[1]); + if (clkPhase[1]>0) { inv=0; phase=clkPhase[1]; } else { inv=1; phase=-1*clkPhase[1]; } - printf("phase out %d %08x\n",phase,phase); + printf("phase out %d %08x\n", phase, phase); if (inv) { - val=phase | (1<<16);// | (inv<<21); - printf("**************** phase word %08x\n",val); - // printf("Phase, val: %08x\n", val); - setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0 + val = ((phase << PLL_SHIFT_NUM_SHIFTS_OFST) & PLL_SHIFT_NUM_SHIFTS_MSK) | PLL_SHIFT_CNT_SLCT_C1_VAL | PLL_SHIFT_UP_DOWN_NEG_VAL; + printf("**************** phase word %08x\n", val); + setPllReconfigReg(PLL_PHASE_SHIFT_REG, val); } else { - val=phase ;// | (inv<<21); - printf("**************** phase word %08x\n",val); - // printf("Phase, val: %08x\n", val); - setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0 + val = ((phase << PLL_SHIFT_NUM_SHIFTS_OFST) & PLL_SHIFT_NUM_SHIFTS_MSK) | PLL_SHIFT_CNT_SLCT_C0_VAL | PLL_SHIFT_UP_DOWN_NEG_VAL; + printf("**************** phase word %08x\n", val); + setPllReconfigReg(PLL_PHASE_SHIFT_REG, val); - printf("**************** phase word %08x\n",val); - val=phase | (2<<16);// | (inv<<21); - // printf("Phase, val: %08x\n", val); - setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0 + printf("**************** phase word %08x\n", val); + val = ((phase << PLL_SHIFT_NUM_SHIFTS_OFST) & PLL_SHIFT_NUM_SHIFTS_MSK) | PLL_SHIFT_CNT_SLCT_C2_VAL; + setPllReconfigReg(PLL_PHASE_SHIFT_REG, val); } - usleep(10000); } @@ -1402,57 +1251,8 @@ int loadImage(int index, short int ImageVals[]){ int readCounterBlock(int startACQ, short int CounterVals[]){ - u_int32_t val; - volatile u_int16_t *ptr; - - u_int32_t address = COUNTER_MEMORY_REG; - ptr=(u_int16_t*)(CSP0BASE+address*2); - - - if (runBusy()) { - if(stopStateMachine()==FAIL) - return FAIL; - //waiting for the last frame read to be done - while(runBusy()) usleep(500); -#ifdef VERBOSE - printf("State machine stopped\n"); -#endif - } - - val=bus_r(MULTI_PURPOSE_REG); -#ifdef VERBOSE - printf("Value of multipurpose reg:%d\n",bus_r(MULTI_PURPOSE_REG)); -#endif - - memcpy(CounterVals,(u_int16_t *)ptr,DATA_BYTES); -#ifdef VERBOSE - int i; - printf("Copied counter memory block with size of %d bytes..\n",DATA_BYTES); - for(i=0;i<6;i++) - printf("%d: %d\t",i,CounterVals[i]); -#endif - - - bus_w(MULTI_PURPOSE_REG,(val&~RESET_COUNTER_BIT)); -#ifdef VERBOSE - printf("\nClearing bit 2 of multipurpose reg:%d\n",bus_r(MULTI_PURPOSE_REG)); -#endif - - if(startACQ==1){ - startStateMachine(); - if(runBusy()) - printf("State machine RUNNING\n"); - else - printf("State machine IDLE\n"); - } - - /* if(sizeof(CounterVals)<=0){ - printf("ERROR:size of counterVals=%d\n",(int)sizeof(CounterVals)); - return FAIL; - }*/ - - - return OK; +//not implemented + return FAIL; } @@ -1460,140 +1260,16 @@ int readCounterBlock(int startACQ, short int CounterVals[]){ int resetCounterBlock(int startACQ){ - char *counterVals=NULL; - counterVals=realloc(counterVals,DATA_BYTES); - - int ret = OK; - u_int32_t val; - volatile u_int16_t *ptr; - - - u_int32_t address = COUNTER_MEMORY_REG; - ptr=(u_int16_t*)(CSP0BASE+address*2); - - - if (runBusy()) { - if(stopStateMachine()==FAIL) - return FAIL; - //waiting for the last frame read to be done - while(runBusy()) usleep(500); -#ifdef VERBOSE - printf("State machine stopped\n"); -#endif - } - - val=bus_r(MULTI_PURPOSE_REG);/** carlos, does this exist? .. its reg 0... */ -#ifdef VERBOSE - printf("Value of multipurpose reg:%d\n",bus_r(MULTI_PURPOSE_REG)); -#endif - - - bus_w(MULTI_PURPOSE_REG,(val|RESET_COUNTER_BIT)); -#ifdef VERBOSE - printf("Setting bit 2 of multipurpose reg:%d\n",bus_r(MULTI_PURPOSE_REG)); -#endif - - - memcpy(counterVals,(u_int16_t*)ptr,DATA_BYTES);/*warning: passing argument 2 of ‘memcpy’ discards qualifiers from pointer target type*/ -#ifdef VERBOSE - int i; - printf("Copied counter memory block with size of %d bytes..\n",(int)sizeof(counterVals)); - for(i=0;i<6;i=i+2) - printf("%d: %d\t",i,*(counterVals+i)); -#endif - - - bus_w(MULTI_PURPOSE_REG,(val&~RESET_COUNTER_BIT)); -#ifdef VERBOSE - printf("\nClearing bit 2 of multipurpose reg:%d\n",bus_r(MULTI_PURPOSE_REG)); -#endif - - if(startACQ==1){ - startStateMachine(); - if(runBusy()) - printf("State machine RUNNING\n"); - else - printf("State machine IDLE\n"); - } - - if(sizeof(counterVals)<=0){ - printf("ERROR:size of counterVals=%d\n",(int)sizeof(counterVals)); - ret = FAIL; - } - - return ret; + //not implemented + return FAIL; } int calibratePedestal(int frames){ - printf("---------------------------\n"); - printf("In Calibrate Pedestal\n"); - int64_t framesBefore = getFrames(); - int64_t periodBefore = getPeriod(); - setFrames(frames); - setPeriod(1000000); - int dataret = OK; - - double avg[1280]; - int numberFrames = 0; - - int adc = 3; - int adcCh = 3; - int Ch = 3; - - - int i = 0; - for(i =0; i < 1280; i++){ - - avg[i] = 0.0; - } - - startStateMachine(); - - while(dataret==OK){ - //got data - waitForAcquisitionEnd(); - if (getFrames()>-2) { - dataret=FAIL; - printf("no data and run stopped: %d frames left\n",(int)(getFrames()+2)); - } else { - dataret=FINISHED; - printf("acquisition successfully finished\n"); - } - } - - - - //double nf = (double)numberFrames; - for(i =0; i < 1280; i++){ - adc = i / 256; - adcCh = (i - adc * 256) / 32; - Ch = i - adc * 256 - adcCh * 32; - adc--; - double v2 = avg[i]; - avg[i] = avg[i]/ ((double)numberFrames/(double)frames); - unsigned short v = (unsigned short)avg[i]; - printf("setting avg for channel %i(%i,%i,%i): %i (double= %f (%f))\t", i,adc,adcCh,Ch, v,avg[i],v2); - v=i*100; - ram_w16(DARK_IMAGE_REG,adc,adcCh,Ch,v-4096); - if(ram_r16(DARK_IMAGE_REG,adc,adcCh,Ch) != v-4096){ - printf("value is wrong (%i,%i,%i): %i \n",adc,adcCh,Ch, ram_r16(DARK_IMAGE_REG,adc,adcCh,Ch)); - } - } - - - - printf("frames: %i\n",numberFrames); - printf("corrected avg by: %f\n",(double)numberFrames/(double)frames); - - printf("restoring previous condition\n"); - setFrames(framesBefore); - setPeriod(periodBefore); - - printf("---------------------------\n"); - return 0; + //not implemented + return FAIL; } @@ -1602,475 +1278,31 @@ int calibratePedestal(int frames){ - - - - - - - - - - - - - - -u_int32_t setExtSignal(int d, enum externalSignalFlag mode) { - - if (d >= 0 && d < 4) { - signals[d] = mode; -#ifdef VERBOSE - printf("settings signal variable number %d to value %04x\n", d, signals[d]); -#endif - - // if output signal, set it! - - switch (mode) { - case GATE_IN_ACTIVE_HIGH: - case GATE_IN_ACTIVE_LOW: - if (timingMode==GATE_FIX_NUMBER || timingMode==GATE_WITH_START_TRIGGER) - setFPGASignal(d,mode); - else - setFPGASignal(d,SIGNAL_OFF); - break; - case TRIGGER_IN_RISING_EDGE: - case TRIGGER_IN_FALLING_EDGE: - if (timingMode==TRIGGER_EXPOSURE || timingMode==GATE_WITH_START_TRIGGER) - setFPGASignal(d,mode); - else - setFPGASignal(d,SIGNAL_OFF); - break; - case RO_TRIGGER_IN_RISING_EDGE: - case RO_TRIGGER_IN_FALLING_EDGE: - if (timingMode==TRIGGER_READOUT) - setFPGASignal(d,mode); - else - setFPGASignal(d,SIGNAL_OFF); - break; - case MASTER_SLAVE_SYNCHRONIZATION: - setSynchronization(syncMode); - break; - default: - setFPGASignal(d,mode); - break; - } - - setTiming(GET_EXTERNAL_COMMUNICATION_MODE); - } - - return getExtSignal(d); -} - - - -int getExtSignal(int d) { - - if (d>=0 && d<4) { -#ifdef VERBOSE - printf("gettings signal variable number %d value %04x\n", d, signals[d]); -#endif - return signals[d]; - } else - return -1; -} - - - - -u_int32_t setFPGASignal(int d, enum externalSignalFlag mode) { - - - int modes[]={EXT_SIG_OFF, EXT_GATE_IN_ACTIVEHIGH, EXT_GATE_IN_ACTIVELOW,EXT_TRIG_IN_RISING,EXT_TRIG_IN_FALLING,EXT_RO_TRIG_IN_RISING, EXT_RO_TRIG_IN_FALLING,EXT_GATE_OUT_ACTIVEHIGH, EXT_GATE_OUT_ACTIVELOW, EXT_TRIG_OUT_RISING, EXT_TRIG_OUT_FALLING, EXT_RO_TRIG_OUT_RISING, EXT_RO_TRIG_OUT_FALLING}; - - u_int32_t c; - int off = d * SIGNAL_OFFSET; - c = bus_r(EXT_SIGNAL_REG); - - - if (mode<=RO_TRIGGER_OUT_FALLING_EDGE && mode>=0) { -#ifdef VERBOSE - printf("writing signal register number %d mode %04x\n",d, modes[mode]); -#endif - bus_w(EXT_SIGNAL_REG,((modes[mode])<>off); /** will not work. cArlos */ - - if (mode<=RO_TRIGGER_OUT_FALLING_EDGE) { - if (modes[mode]!=SIGNAL_OFF && signals[d]!=MASTER_SLAVE_SYNCHRONIZATION) - signals[d]=modes[mode]; -#ifdef VERYVERBOSE - printf("gettings signal register number %d value %04x\n", d, modes[mode]); -#endif - return modes[mode]; - } else - return -1; - -} - - - - - int setTiming(int ti) { - int ret=GET_EXTERNAL_COMMUNICATION_MODE; - - int g=-1, t=-1, rot=-1; - - int i; - - switch (ti) { - case AUTO_TIMING: - printf("\nSetting timing to auto\n"); - timingMode=ti; - // disable all gates/triggers in except if used for master/slave synchronization - for (i=0; i<4; i++) { - if (getFPGASignal(i)>0 && getFPGASignal(i)=0 && t>=0 && rot<0) { - ret=GATE_WITH_START_TRIGGER; - } else if (g<0 && t>=0 && rot<0) { - ret=TRIGGER_EXPOSURE; - } else if (g>=0 && t<0 && rot<0) { - ret=GATE_FIX_NUMBER; - } else if (g<0 && t<0 && rot>0) { - ret=TRIGGER_READOUT; - } else if (g<0 && t<0 && rot<0) { - ret=AUTO_TIMING; - } - - // timingMode=ret; - - return ret; - + if (bus_r(EXT_SIGNAL_REG) == EXT_SIGNAL_MSK) + return TRIGGER_EXPOSURE; + return AUTO_TIMING; } int setMaster(int f) { - - int i; - switch(f) { - case NO_MASTER: - // switch of gates or triggers - masterMode=NO_MASTER; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - setFPGASignal(i,SIGNAL_OFF); - } - } - break; - case IS_MASTER: - // configure gate or trigger out - masterMode=IS_MASTER; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - switch (syncMode) { - case NO_SYNCHRONIZATION: - setFPGASignal(i,SIGNAL_OFF); - break; - case MASTER_GATES: - setFPGASignal(i,GATE_OUT_ACTIVE_HIGH); - break; - case MASTER_TRIGGERS: - setFPGASignal(i,TRIGGER_OUT_RISING_EDGE); - break; - case SLAVE_STARTS_WHEN_MASTER_STOPS: - setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE); - break; - default: - ; - } - } - } - break; - case IS_SLAVE: - // configure gate or trigger in - masterMode=IS_SLAVE; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - switch (syncMode) { - case NO_SYNCHRONIZATION: - setFPGASignal(i,SIGNAL_OFF); - break; - case MASTER_GATES: - setFPGASignal(i,GATE_IN_ACTIVE_HIGH); - break; - case MASTER_TRIGGERS: - setFPGASignal(i,TRIGGER_IN_RISING_EDGE); - break; - case SLAVE_STARTS_WHEN_MASTER_STOPS: - setFPGASignal(i,TRIGGER_IN_RISING_EDGE); - break; - default: - ; - } - } - } - break; - default: - //do nothing - break; - } - - switch(masterMode) { - case NO_MASTER: - return NO_MASTER; - - - case IS_MASTER: - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - switch (syncMode) { - case NO_SYNCHRONIZATION: - return IS_MASTER; - case MASTER_GATES: - if (getFPGASignal(i)==GATE_OUT_ACTIVE_HIGH) - return IS_MASTER; - else - return NO_MASTER; - case MASTER_TRIGGERS: - if (getFPGASignal(i)==TRIGGER_OUT_RISING_EDGE) - return IS_MASTER; - else - return NO_MASTER; - case SLAVE_STARTS_WHEN_MASTER_STOPS: - if (getFPGASignal(i)==RO_TRIGGER_OUT_RISING_EDGE) - return IS_MASTER; - else - return NO_MASTER; - default: - return NO_MASTER; - } - - } - } - break; - - case IS_SLAVE: - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - switch (syncMode) { - case NO_SYNCHRONIZATION: - return IS_SLAVE; - case MASTER_GATES: - if (getFPGASignal(i)==GATE_IN_ACTIVE_HIGH) - return IS_SLAVE; - else - return NO_MASTER; - case MASTER_TRIGGERS: - case SLAVE_STARTS_WHEN_MASTER_STOPS: - if (getFPGASignal(i)==TRIGGER_IN_RISING_EDGE) - return IS_SLAVE; - else - return NO_MASTER; - default: - return NO_MASTER; - } - } - } - break; - } - return masterMode; + return NO_MASTER; } int setSynchronization(int s) { - - int i; - - switch(s) { - case NO_SYNCHRONIZATION: - syncMode=NO_SYNCHRONIZATION; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - setFPGASignal(i,SIGNAL_OFF); - } - } - break; - // disable external signals? - case MASTER_GATES: - // configure gate in or out - syncMode=MASTER_GATES; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER) - setFPGASignal(i,GATE_OUT_ACTIVE_HIGH); - else if (masterMode==IS_SLAVE) - setFPGASignal(i,GATE_IN_ACTIVE_HIGH); - } - } - - break; - case MASTER_TRIGGERS: - // configure trigger in or out - syncMode=MASTER_TRIGGERS; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER) - setFPGASignal(i,TRIGGER_OUT_RISING_EDGE); - else if (masterMode==IS_SLAVE) - setFPGASignal(i,TRIGGER_IN_RISING_EDGE); - } - } - break; - - - case SLAVE_STARTS_WHEN_MASTER_STOPS: - // configure trigger in or out - syncMode=SLAVE_STARTS_WHEN_MASTER_STOPS; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER) - setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE); - else if (masterMode==IS_SLAVE) - setFPGASignal(i,TRIGGER_IN_RISING_EDGE); - } - } - break; - - - default: - //do nothing - break; - } - - switch (syncMode) { - - case NO_SYNCHRONIZATION: - return NO_SYNCHRONIZATION; - - case MASTER_GATES: - - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER && getFPGASignal(i)==GATE_OUT_ACTIVE_HIGH) - return MASTER_GATES; - else if (masterMode==IS_SLAVE && getFPGASignal(i)==GATE_IN_ACTIVE_HIGH) - return MASTER_GATES; - } - } - return NO_SYNCHRONIZATION; - - case MASTER_TRIGGERS: - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER && getFPGASignal(i)==TRIGGER_OUT_RISING_EDGE) - return MASTER_TRIGGERS; - else if (masterMode==IS_SLAVE && getFPGASignal(i)==TRIGGER_IN_RISING_EDGE) - return MASTER_TRIGGERS; - } - } - return NO_SYNCHRONIZATION; - - case SLAVE_STARTS_WHEN_MASTER_STOPS: - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER && getFPGASignal(i)==RO_TRIGGER_OUT_RISING_EDGE) - return SLAVE_STARTS_WHEN_MASTER_STOPS; - else if (masterMode==IS_SLAVE && getFPGASignal(i)==TRIGGER_IN_RISING_EDGE) - return SLAVE_STARTS_WHEN_MASTER_STOPS; - } - } - return NO_SYNCHRONIZATION; - - default: - return NO_SYNCHRONIZATION; - - } return NO_SYNCHRONIZATION; } diff --git a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h index 8adef92ca..4508391a3 100755 --- a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h +++ b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h @@ -48,7 +48,7 @@ int stopWritingFPGAprogram(FILE* filefp); int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); long int calcChecksum(int sourceip, int destip); -void configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, int detipad, uint32_t destport); +void configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, int sourceip, uint32_t destport); int64_t set64BitReg(int64_t value, int aLSB, int aMSB); int64_t get64BitReg(int aLSB, int aMSB); @@ -74,9 +74,6 @@ int64_t getTrains(); int64_t setProbes(int64_t value); int64_t getProbes(); -int64_t getProgress(); -int64_t setProgress(); - int64_t getActualTime(); int64_t getMeasurementTime(); int64_t getFramesFromStart(); @@ -84,7 +81,6 @@ int64_t getFramesFromStart(); u_int32_t runBusy(void); int startStateMachine(); int stopStateMachine(); -int startReadOut(); enum runStatus getStatus(); void waitForAcquisitionEnd(); @@ -93,7 +89,6 @@ void initDac(int dacnum); int setDac(int dacnum, int dacvalue); int setHighVoltage(int val, int imod); void setAdc(int addr, int val); -void configureAdc(); void prepareADC(); int setDynamicRange(int dr); @@ -117,8 +112,7 @@ int initConfGain(int isettings,int val,int imod); int initSpeedConfGain(int val); void resetPLL(); -u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig); -u_int32_t getPllReconfigReg(u_int32_t reg, int trig); +u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val); void configurePll(); int loadImage(int index, short int ImageVals[]); @@ -126,10 +120,6 @@ int readCounterBlock(int startACQ, short int CounterVals[]); int resetCounterBlock(int startACQ); int calibratePedestal(int frames); -u_int32_t setExtSignal(int d, enum externalSignalFlag mode); -int getExtSignal(int d); -u_int32_t setFPGASignal(int d, enum externalSignalFlag mode); -int getFPGASignal(int d); int setTiming(int t); int setMaster(int f); int setSynchronization(int s); diff --git a/slsDetectorSoftware/jungfrauDetectorServer/registers_m.h b/slsDetectorSoftware/jungfrauDetectorServer/registers_m.h index 1aeb921a8..5bec80984 100755 --- a/slsDetectorSoftware/jungfrauDetectorServer/registers_m.h +++ b/slsDetectorSoftware/jungfrauDetectorServer/registers_m.h @@ -176,19 +176,24 @@ #define TX_IP_CHECKSUM_MSK (0x000000FF << TX_IP_CHECKSUM_OFST) /* Configuration Register */ -#define CONFIG_REG (0x4D << 11) //Not used in software Carlos +#define CONFIG_REG (0x4D << 11) -#define CONFIG_OPERATION_MODE_OFST (16) //Not used in software -#define CONFIG_OPERATION_MODE_MSK (0x00000001 << CONFIG_OPERATION_MODE_OFST) //Not used in software -#define CONFIG_READOUT_SPEED_OFST (20) //Not used in software -#define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST) //Not used in software -#define CONFIG_QUARTER_SPEED_10MHZ_VAL (0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK //Not used in software -#define CONFIG_HALF_SPEED_20MHZ_VAL (0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK //Not used in software -#define CONFIG_FULL_SPEED_VAL (0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK //Not used in software and firmware -#define CONFIG_TDMA_OFST (24) //Not used in software -#define CONFIG_TDMA_MSK (0x00000001 << CONFIG_TDMA_OFST) //Not used in software -#define CONFIG_TDMA_TIMESLOT_OFST (25) //Not used in software -#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST) //Not used in software +#define CONFIG_OPERATION_MODE_OFST (16) +#define CONFIG_OPERATION_MODE_MSK (0x00000001 << CONFIG_OPERATION_MODE_OFST) +#define CONFIG_MODE_1_X_10GBE_VAL ((0x0 << CONFIG_OPERATION_MODE_OFST) & CONFIG_OPERATION_MODE_MSK) +#define CONFIG_MODE_2_X_10GBE_VAL ((0x1 << CONFIG_OPERATION_MODE_OFST) & CONFIG_OPERATION_MODE_MSK) +#define CONFIG_READOUT_SPEED_OFST (20) +#define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST) +#define CONFIG_QUARTER_SPEED_10MHZ_VAL ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_HALF_SPEED_20MHZ_VAL ((0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_FULL_SPEED_VAL ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_TDMA_OFST (24) +#define CONFIG_TDMA_MSK (0x00000001 << CONFIG_TDMA_OFST) +#define CONFIG_TDMA_DISABLE_VAL ((0x0 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK) +#define CONFIG_TDMA_ENABLE_VAL ((0x1 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK) +#define CONFIG_TDMA_TIMESLOT_OFST (25) +#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST) +#define CONFIG_TDMA_TIMESLOT_0_VAL ((0x0 << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK) /* External Signal Register */ #define EXT_SIGNAL_REG (0x4E << 11) @@ -228,28 +233,54 @@ #define PLL_CTRL_ADDR_MSK (0x0000003F << PLL_CTRL_ADDR_OFST) /* Sample Register (Obsolete) */ -#define SAMPLE_REG (0x59 << 11)/** is it dbit pipeline?... look at speedvariable */ +#define SAMPLE_REG (0x59 << 11) /** carlos set speed differently*/ #define SAMPLE_ADC_SAMPLE_SEL_OFST (0) /** carlos cant use the bits*/ #define SAMPLE_ADC_SAMPLE_SEL_MSK (0x00000007 << SAMPLE_ADC_SAMPLE_SEL_OFST) +#define SAMPLE_ADC_SAMPLE_0_VAL ((0x0 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_1_VAL ((0x1 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_2_VAL ((0x2 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_3_VAL ((0x3 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_4_VAL ((0x4 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_5_VAL ((0x5 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_6_VAL ((0x6 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_7_VAL ((0x7 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) + #define SAMPLE_ADC_DECMT_FACTOR_OFST (4) #define SAMPLE_ADC_DECMT_FACTOR_MSK (0x00000007 << SAMPLE_ADC_DECMT_FACTOR_OFST) +#define SAMPLE_ADC_DECMT_FACTOR_0_VAL ((0x0 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_1_VAL ((0x1 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_2_VAL ((0x2 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_3_VAL ((0x3 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_4_VAL ((0x4 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_5_VAL ((0x5 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_6_VAL ((0x6 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_7_VAL ((0x7 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) + #define SAMPLE_DGTL_SAMPLE_SEL_OFST (8) -#define SAMPLE_DGTL_SAMPLE_SEL_MSK (0x00000007 << SAMPLE_DGTL_SAMPLE_SEL_OFST) +#define SAMPLE_DGTL_SAMPLE_SEL_MSK (0x0000000F << SAMPLE_DGTL_SAMPLE_SEL_OFST) +#define SAMPLE_DGTL_SAMPLE_0_VAL ((0x0 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_1_VAL ((0x1 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_2_VAL ((0x2 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_3_VAL ((0x3 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_4_VAL ((0x4 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_5_VAL ((0x5 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_6_VAL ((0x6 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_7_VAL ((0x7 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_8_VAL ((0x8 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_9_VAL ((0x9 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_10_VAL ((0xa << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_11_VAL ((0xb << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_12_VAL ((0xc << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_13_VAL ((0xd << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_14_VAL ((0xe << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_15_VAL ((0xf << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) + #define SAMPLE_DGTL_DECMT_FACTOR_OFST (12) -#define SAMPLE_DGTL_DECMT_FACTOR_MSK (0x00000007 << SAMPLE_DGTL_DECMT_FACTOR_OFST) - -/* Digital Bit Alignment Register (Obsolete) */ -#define BIT_ALIGN_REG (0x59 << 11)/** carlos same reg value */ - -#define BIT_ALIGN_LSB_SAMPLE_SEL_OFST (0) -#define BIT_ALIGN_LSB_SAMPLE_SEL_MSK (0x00000007 << BIT_ALIGN_LSB_SAMPLE_SEL_OFST) -#define BIT_ALIGN_LSB_LATENCY_OFST (3) -#define BIT_ALIGN_LSB_LATENCY_MSK (0x0000001F << BIT_ALIGN_LSB_LATENCY_OFST) -#define BIT_ALIGN_MSB_SAMPLE_SEL_OFST (8) -#define BIT_ALIGN_MSB_SAMPLE_SEL_MSK (0x00000007 << BIT_ALIGN_MSB_SAMPLE_SEL_OFST) -#define BIT_ALIGN_MSB_LATENCY_OFST (11) -#define BIT_ALIGN_MSB_LATENCY_MSK (0x0000001F << BIT_ALIGN_MSB_LATENCY_OFST) +#define SAMPLE_DGTL_DECMT_FACTOR_MSK (0x00000003 << SAMPLE_DGTL_DECMT_FACTOR_OFST) +#define SAMPLE_DECMT_FACTOR_1_VAL ((0x0 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) +#define SAMPLE_DECMT_FACTOR_2_VAL ((0x1 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) +#define SAMPLE_DECMT_FACTOR_4_VAL ((0x2 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) /** Vref Comp Mod Register */ #define VREF_COMP_MOD_REG (0x5C << 11) //Not used in software, TBD in firmware @@ -318,20 +349,6 @@ #define SET_GATES_LSB_REG 106<<11//0x7c<<11 #define SET_GATES_MSB_REG 107<<11//0x7d<<11 -#define PLL_RECONFIG_BUSY 0x00100000 - -/* for external signal register */ /** Carlos is this implemented?*/ -#define SIGNAL_OFFSET 4 -#define SIGNAL_MASK 0xF -#define EXT_SIG_OFF 0x0 -#define EXT_GATE_IN_ACTIVEHIGH 0x1 -#define EXT_GATE_IN_ACTIVELOW 0x2 -#define EXT_TRIG_IN_RISING 0x3 -#define EXT_TRIG_IN_FALLING 0x4 -//... - - - /**ADC SYNC CLEAN FIFO*/ #define ADCSYNC_CLEAN_FIFO_BITS 0x300000 diff --git a/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c b/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c index 5b0429fee..7ce3909b7 100755 --- a/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c +++ b/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c @@ -39,9 +39,8 @@ const enum detectorType myDetectorType=GENERIC; int (*flist[256])(int); char mess[MAX_STR_LENGTH]; -int digitalTestBit = 0; /** Carlos will we use this somewhere */ int adcvpp = 0x4; /** Carlos will we use this somewhere */ - +//set adc val?? @@ -609,7 +608,7 @@ int digital_test(int file_des) { case DETECTOR_SOFTWARE_TEST: retval=testFpga(); break; - case DIGITAL_BIT_TEST: + case DIGITAL_BIT_TEST:// only for gotthard n = receiveDataOnly(file_des,&ival,sizeof(ival)); if (n < 0) { sprintf(mess,"Error reading from socket\n"); @@ -623,8 +622,6 @@ int digital_test(int file_des) { sprintf(mess,"Detector locked by %s\n",lastClientIP); break; } - digitalTestBit = ival; - retval=digitalTestBit; break; default: printf("Unknown digital test required %d\n",arg); @@ -687,15 +684,9 @@ int write_register(int file_des) { if(ret!=FAIL){ address=(addr<<11); - /*if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) ask Carlos - ret = bus_w16(address,val); - else*/ ret=bus_w(address,val); if(ret==OK){ - /*if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) ask Carlos - retval=bus_r16(address); - else*/ - retval=bus_r(address); + retval=bus_r(address); } } @@ -753,10 +744,7 @@ int read_register(int file_des) { if(ret!=FAIL){ address=(addr<<11); - /*if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) ask Carlos - retval=bus_r16(address); - else*/ - retval=bus_r(address); + retval=bus_r(address); } @@ -1595,26 +1583,11 @@ int stop_acquisition(int file_des) { int start_readout(int file_des) { - - int ret=OK; int n; + int ret = FAIL; - - sprintf(mess,"can't start readout\n"); - -#ifdef VERBOSE - printf("Starting readout\n"); -#endif - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - ret=startReadOut(); - } - if (ret==FAIL) - sprintf(mess,"Start readout failed\n"); - else if (differentClients) - ret=FORCE_UPDATE; + strcpy(mess, "Start Readout is not implemented for this detector!\n"); + cprintf(RED,"Warning: %s", mess); n = sendDataOnly(file_des,&ret,sizeof(ret)); if (ret==FAIL) { @@ -1858,7 +1831,7 @@ int get_time_left(int file_des) { retval=getFrames(); break; case ACQUISITION_TIME: - retval=getExposureTime(); + retval=getExposureTime();/** not implemented */ break; case FRAME_PERIOD: retval=getPeriod(); @@ -1867,7 +1840,7 @@ int get_time_left(int file_des) { retval=getDelay(); break; case GATES_NUMBER: - retval=getGates(); + retval=getGates();/** not implemented */ break; case PROBES_NUMBER: retval=getProbes(); @@ -1875,9 +1848,6 @@ int get_time_left(int file_des) { case CYCLES_NUMBER: retval=getTrains(); break; - case PROGRESS: - retval=getProgress(); - break; case ACTUAL_TIME: retval=getActualTime(); break; diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/Makefile b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/Makefile new file mode 100755 index 000000000..8ff6779c8 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/Makefile @@ -0,0 +1,26 @@ +CROSS = bfin-uclinux- +CC = $(CROSS)gcc +CFLAGS += -Wall -DJUNGFRAUD -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE +LDLIBS += -lm -lstdc++ + +PROGS = jungfrauDetectorServer +DESTDIR ?= bin +INSTMODE = 0777 + +SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c +OBJS = $(SRC_CLNT:.c=.o) + +all: clean $(PROGS) + +boot: $(OBJS) + +$(PROGS): $(OBJS) + echo $(OBJS) + mkdir -p $(DESTDIR) + $(CC) -o $@ $^ $(CFLAGS) $(LDLIBS) + mv $(PROGS) $(DESTDIR) + rm *.gdb + +clean: + rm -rf $(DESTDIR)/$(PROGS) *.o + diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/Makefile.virtual b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/Makefile.virtual new file mode 100644 index 000000000..8ee348341 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/Makefile.virtual @@ -0,0 +1,25 @@ +CC = gcc +CFLAGS += -Wall -DJUNGFRAUD -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE +LDLIBS += -lm -lstdc++ + +PROGS = jungfrauDetectorServer +DESTDIR ?= bin +INSTMODE = 0777 + +SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c +OBJS = $(SRC_CLNT:.c=.o) + +all: clean $(PROGS) + +boot: $(OBJS) + +$(PROGS): $(OBJS) + echo $(OBJS) + mkdir -p $(DESTDIR) + $(CC) -o $@ $^ $(CFLAGS) $(LDLIBS) + mv $(PROGS) $(DESTDIR) + rm *.gdb + +clean: + rm -rf $(DESTDIR)/$(PROGS) *.o + diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/RegisterDefs.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/RegisterDefs.h new file mode 100644 index 000000000..b179e8230 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/RegisterDefs.h @@ -0,0 +1,335 @@ +#ifndef REGISTER_DEFS_H +#define REGISTER_DEFS_H + +/* Definitions for FPGA*/ +#define CSP0 0x20200000 +#define MEM_SIZE 0x100000 + +/* FPGA Version register */ +#define FPGA_VERSION_REG (0x00 << 11) + +#define BOARD_REVISION_OFST (0) +#define BOARD_REVISION_MSK (0x00FFFFFF << BOARD_REVISION_OFST) +#define DETECTOR_TYPE_OFST (24) +#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST) + + + +/* Fix pattern register */ +#define FIX_PATT_REG (0x01 << 11) + +/* Status register */ +#define STATUS_REG (0x02 << 11) + +#define RUN_BUSY_OFST (0) +#define RUN_BUSY_MSK (0x00000001 << RUN_BUSY_OFST) +#define WAITING_FOR_TRIGGER_OFST (3) +#define WAITING_FOR_TRIGGER_MSK (0x00000001 << WAITING_FOR_TRIGGER_OFST) +#define DELAYBEFORE_OFST (4) //Not used in software +#define DELAYBEFORE_MSK (0x00000001 << DELAYBEFORE_OFST) //Not used in software +#define DELAYAFTER_OFST (5) //Not used in software +#define DELAYAFTER_MSK (0x00000001 << DELAYAFTER_OFST) //Not used in software +#define STOPPED_OFST (15) +#define STOPPED_MSK (0x00000001 << STOPPED_OFST) +#define RUNMACHINE_BUSY_OFST (17) +#define RUNMACHINE_BUSY_MSK (0x00000001 << RUNMACHINE_BUSY_OFST) + + +/* Look at me register */ +#define LOOK_AT_ME_REG (0x03 << 11) //Not used in firmware or software + +/* System Status register */ +#define SYSTEM_STATUS_REG (0x04 << 11) //Not used in software + +#define DDR3_CAL_DONE_OFST (0) //Not used in software +#define DDR3_CAL_DONE_MSK (0x00000001 << DDR3_CAL_DONE_OFST) //Not used in software +#define DDR3_CAL_FAIL_OFST (1) //Not used in software +#define DDR3_CAL_FAIL_MSK (0x00000001 << DDR3_CAL_FAIL_OFST) //Not used in software +#define DDR3_INIT_DONE_OFST (2) //Not used in software +#define DDR3_INIT_DONE_MSK (0x00000001 << DDR3_INIT_DONE_OFST) //Not used in software +#define RECONFIG_PLL_LCK_OFST (3) //Not used in software +#define RECONFIG_PLL_LCK_MSK (0x00000001 << RECONFIG_PLL_LCK_OFST) //Not used in software +#define PLL_A_LCK_OFST (4) //Not used in software +#define PLL_A_LCK_MSK (0x00000001 << PLL_A_LCK_OFST) //Not used in software +#define DD3_PLL_LCK_OFST (5) //Not used in software +#define DD3_PLL_LCK_MSK (0x00000001 << DD3_PLL_LCK_OFST) //Not used in software + + +/* Module Control Board Serial Number Register */ +#define MOD_SERIAL_NUM_REG (0x0A << 11) //Not used in software + +#define HARDWARE_SERIAL_NUM_OFST (0) //Not used in software +#define HARDWARE_SERIAL_NUM_MSK (0x000000FF << HARDWARE_SERIAL_NUM_OFST) //Not used in software +#define HARDWARE_VERSION_NUM_OFST (16) //Not used in software +#define HARDWARE_VERSION_NUM_MSK (0x0000003F << HARDWARE_VERSION_NUM_OFST) //Not used in software + + +/* Time from Start 64 bit register */ +#define TIME_FROM_START_LSB_REG (0x10 << 11) +#define TIME_FROM_START_MSB_REG (0x11 << 11) + +/* Get Delay 64 bit register */ +#define GET_DELAY_LSB_REG (0x12 << 11) +#define GET_DELAY_MSB_REG (0x13 << 11) + +/* Get Cycles 64 bit register */ +#define GET_CYCLES_LSB_REG (0x14 << 11) +#define GET_CYCLES_MSB_REG (0x15 << 11) + +/* Get Frames 64 bit register */ +#define GET_FRAMES_LSB_REG (0x16 << 11) +#define GET_FRAMES_MSB_REG (0x17 << 11) + +/* Get Period 64 bit register */ +#define GET_PERIOD_LSB_REG (0x18 << 11) +#define GET_PERIOD_MSB_REG (0x19 << 11) + +/* Get Frames from Start 64 bit register (frames from start Run Control) */ +#define FRAMES_FROM_START_PG_LSB_REG (0x24 << 11) +#define FRAMES_FROM_START_PG_MSB_REG (0x25 << 11) + +/* Measurement Time 64 bit register (timestamp at a frame start until reset)*/ +#define START_FRAME_TIME_LSB_REG (0x26 << 11) +#define START_FRAME_TIME_MSB_REG (0x27 << 11) + +/* SPI (Serial Peripheral Interface) Register */ +#define SPI_REG (0x40 << 11) + +#define DAC_SERIAL_DIGITAL_OUT_OFST (0) +#define DAC_SERIAL_DIGITAL_OUT_MSK (0x00000001 << DAC_SERIAL_DIGITAL_OUT_OFST) +#define DAC_SERIAL_CLK_OUT_OFST (1) +#define DAC_SERIAL_CLK_OUT_MSK (0x00000001 << DAC_SERIAL_CLK_OUT_OFST) +#define DAC_SERIAL_CS_OUT_OFST (2) +#define DAC_SERIAL_CS_OUT_MSK (0x00000001 << DAC_SERIAL_CS_OUT_OFST) +#define HV_SERIAL_DIGITAL_OUT_OFST (8) +#define HV_SERIAL_DIGITAL_OUT_MSK (0x00000001 << HV_SERIAL_DIGITAL_OUT_OFST) +#define HV_SERIAL_CLK_OUT_OFST (9) +#define HV_SERIAL_CLK_OUT_MSK (0x00000001 << HV_SERIAL_CLK_OUT_OFST) +#define HV_SERIAL_CS_OUT_OFST (10) +#define HV_SERIAL_CS_OUT_MSK (0x00000001 << HV_SERIAL_CS_OUT_OFST) + + +/* ADC SPI (Serial Peripheral Interface) Register */ +#define ADC_SPI_REG (0x41 << 11) + +#define ADC_SERIAL_CLK_OUT_OFST (0) +#define ADC_SERIAL_CLK_OUT_MSK (0x00000001 << ADC_SERIAL_CLK_OUT_OFST) +#define ADC_SERIAL_DATA_OUT_OFST (1) +#define ADC_SERIAL_DATA_OUT_MSK (0x00000001 << ADC_SERIAL_DATA_OUT_OFST) +#define ADC_SERIAL_CS_OUT_OFST (2) +#define ADC_SERIAL_CS_OUT_MSK (0x0000000F << ADC_SERIAL_CS_OUT_OFST) + +/* ADC offset Register */ +#define ADC_OFST_REG (0x42 << 11) + +/* ADC Port Invert Register */ +#define ADC_PORT_INVERT_REG (0x43 << 11) + +/* Receiver IP Address Register */ +#define RX_IP_REG (0x45 << 11) + +/* UDP Port */ +#define UDP_PORT_REG (0x46 << 11) + +#define UDP_PORT_RX_OFST (0) +#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST) +#define UDP_PORT_TX_OFST (16) +#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST) + +/* Receiver Mac Address 64 bit Register */ +#define RX_MAC_LSB_REG (0x47 << 11) +#define RX_MAC_MSB_REG (0x48 << 11) + +#define RX_MAC_LSB_OFST (0) +#define RX_MAC_LSB_MSK (0x0000FFFF << RX_MAC_LSB_OFST) +#define RX_MAC_MSB_OFST (0) +#define RX_MAC_MSB_MSK (0x000000FF << RX_MAC_MSB_OFST) + +/* Detector/ Transmitter Mac Address 64 bit Register */ +#define TX_MAC_LSB_REG (0x49 << 11) +#define TX_MAC_MSB_REG (0x4A << 11) + +#define TX_MAC_LSB_OFST (0) +#define TX_MAC_LSB_MSK (0x0000FFFF << TX_MAC_LSB_OFST) +#define TX_MAC_MSB_OFST (0) +#define TX_MAC_MSB_MSK (0x000000FF << TX_MAC_MSB_OFST) + +/* Detector/ Transmitter IP Address Register */ +#define TX_IP_REG (0x4B << 11) + +/* Detector/ Transmitter IP Checksum Register */ +#define TX_IP_CHECKSUM_REG (0x4C << 11) + +#define TX_IP_CHECKSUM_OFST (0) +#define TX_IP_CHECKSUM_MSK (0x000000FF << TX_IP_CHECKSUM_OFST) + +/* Configuration Register */ +#define CONFIG_REG (0x4D << 11) + +#define CONFIG_OPERATION_MODE_OFST (16) +#define CONFIG_OPERATION_MODE_MSK (0x00000001 << CONFIG_OPERATION_MODE_OFST) +#define CONFIG_MODE_1_X_10GBE_VAL ((0x0 << CONFIG_OPERATION_MODE_OFST) & CONFIG_OPERATION_MODE_MSK) +#define CONFIG_MODE_2_X_10GBE_VAL ((0x1 << CONFIG_OPERATION_MODE_OFST) & CONFIG_OPERATION_MODE_MSK) +#define CONFIG_READOUT_SPEED_OFST (20) +#define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST) +#define CONFIG_QUARTER_SPEED_10MHZ_VAL ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_HALF_SPEED_20MHZ_VAL ((0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_FULL_SPEED_40MHZ_VAL ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_TDMA_OFST (24) +#define CONFIG_TDMA_MSK (0x00000001 << CONFIG_TDMA_OFST) +#define CONFIG_TDMA_DISABLE_VAL ((0x0 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK) +#define CONFIG_TDMA_ENABLE_VAL ((0x1 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK) +#define CONFIG_TDMA_TIMESLOT_OFST (25) +#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST) +#define CONFIG_TDMA_TIMESLOT_0_VAL ((0x0 << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK) + +/* External Signal Register */ +#define EXT_SIGNAL_REG (0x4E << 11) + +#define EXT_SIGNAL_OFST (0) +#define EXT_SIGNAL_MSK (0x00000003 << EXT_SIGNAL_OFST) //enabled when both bits high + +/* Control Register */ +#define CONTROL_REG (0x4F << 11) + +#define CONTROL_START_ACQ_OFST (0) +#define CONTROL_START_ACQ_MSK (0x00000001 << CONTROL_START_ACQ_OFST) +#define CONTROL_STOP_ACQ_OFST (1) +#define CONTROL_STOP_ACQ_MSK (0x00000001 << CONTROL_STOP_ACQ_OFST) +#define CONTROL_CORE_RST_OFST (10) +#define CONTROL_CORE_RST_MSK (0x00000001 << CONTROL_CORE_RST_OFST) +#define CONTROL_PERIPHERAL_RST_OFST (11) //DDR3 HMem Ctrlr, GBE, Temp +#define CONTROL_PERIPHERAL_RST_MSK (0x00000001 << CONTROL_PERIPHERAL_RST_OFST) //DDR3 HMem Ctrlr, GBE, Temp +#define CONTROL_DDR3_MEM_RST_OFST (12) //only PHY, not DDR3 PLL ,Not used in software +#define CONTROL_DDR3_MEM_RST_MSK (0x00000001 << CONTROL_DDR3_MEM_RST_OFST) //only PHY, not DDR3 PLL ,Not used in software +#define CONTROL_ACQ_FIFO_CLR_OFST (14) +#define CONTROL_ACQ_FIFO_CLR_MSK (0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST) + +/* Reconfiguratble PLL Paramater Register */ +#define PLL_PARAM_REG (0x50 << 11) + +/* Reconfiguratble PLL Control Regiser */ +#define PLL_CONTROL_REG (0x51 << 11) + +#define PLL_CTRL_RECONFIG_RST_OFST (0) //parameter reset +#define PLL_CTRL_RECONFIG_RST_MSK (0x00000001 << PLL_CTRL_RECONFIG_RST_OFST) //parameter reset +#define PLL_CTRL_WR_PARAMETER_OFST (2) +#define PLL_CTRL_WR_PARAMETER_MSK (0x00000001 << PLL_CTRL_WR_PARAMETER_OFST) +#define PLL_CTRL_RST_OFST (3) +#define PLL_CTRL_RST_MSK (0x00000001 << PLL_CTRL_RST_OFST) +#define PLL_CTRL_ADDR_OFST (16) +#define PLL_CTRL_ADDR_MSK (0x0000003F << PLL_CTRL_ADDR_OFST) + +/* Sample Register (Obsolete) */ +#define SAMPLE_REG (0x59 << 11) + +#define SAMPLE_ADC_SAMPLE_SEL_OFST (0) +#define SAMPLE_ADC_SAMPLE_SEL_MSK (0x00000007 << SAMPLE_ADC_SAMPLE_SEL_OFST) +#define SAMPLE_ADC_SAMPLE_0_VAL ((0x0 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_1_VAL ((0x1 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_2_VAL ((0x2 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_3_VAL ((0x3 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_4_VAL ((0x4 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_5_VAL ((0x5 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_6_VAL ((0x6 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_7_VAL ((0x7 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) + +#define SAMPLE_ADC_DECMT_FACTOR_OFST (4) +#define SAMPLE_ADC_DECMT_FACTOR_MSK (0x00000007 << SAMPLE_ADC_DECMT_FACTOR_OFST) +#define SAMPLE_ADC_DECMT_FACTOR_0_VAL ((0x0 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_1_VAL ((0x1 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_2_VAL ((0x2 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_3_VAL ((0x3 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_4_VAL ((0x4 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_5_VAL ((0x5 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_6_VAL ((0x6 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_7_VAL ((0x7 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) + +#define SAMPLE_DGTL_SAMPLE_SEL_OFST (8) +#define SAMPLE_DGTL_SAMPLE_SEL_MSK (0x0000000F << SAMPLE_DGTL_SAMPLE_SEL_OFST) +#define SAMPLE_DGTL_SAMPLE_0_VAL ((0x0 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_1_VAL ((0x1 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_2_VAL ((0x2 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_3_VAL ((0x3 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_4_VAL ((0x4 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_5_VAL ((0x5 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_6_VAL ((0x6 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_7_VAL ((0x7 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_8_VAL ((0x8 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_9_VAL ((0x9 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_10_VAL ((0xa << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_11_VAL ((0xb << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_12_VAL ((0xc << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_13_VAL ((0xd << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_14_VAL ((0xe << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_15_VAL ((0xf << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) + +#define SAMPLE_DGTL_DECMT_FACTOR_OFST (12) +#define SAMPLE_DGTL_DECMT_FACTOR_MSK (0x00000003 << SAMPLE_DGTL_DECMT_FACTOR_OFST) +#define SAMPLE_DECMT_FACTOR_1_VAL ((0x0 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) +#define SAMPLE_DECMT_FACTOR_2_VAL ((0x1 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) +#define SAMPLE_DECMT_FACTOR_4_VAL ((0x2 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) + +/** Vref Comp Mod Register */ +#define VREF_COMP_MOD_REG (0x5C << 11) //Not used in software, TBD in firmware + +/** DAQ Register */ +#define DAQ_REG (0x5D << 11) //TBD in firmware + +/** Chip Power Register */ +#define CHIP_POWER_REG (0x5E << 11) + +#define CHIP_POWER_ENABLE_OFST (0) +#define CHIP_POWER_ENABLE_MSK (0x00000001 << CHIP_POWER_ENABLE_OFST) + +/* Set Delay 64 bit register */ +#define SET_DELAY_LSB_REG (0x60 << 11) +#define SET_DELAY_MSB_REG (0x61 << 11) + +/* Set Cycles 64 bit register */ +#define SET_CYCLES_LSB_REG (0x62 << 11) +#define SET_CYCLES_MSB_REG (0x63 << 11) + +/* Set Frames 64 bit register */ +#define SET_FRAMES_LSB_REG (0x64 << 11) +#define SET_FRAMES_MSB_REG (0x65 << 11) + +/* Set Period 64 bit register */ +#define SET_PERIOD_LSB_REG (0x66 << 11) +#define SET_PERIOD_MSB_REG (0x67 << 11) + +/* Set Period 64 bit register */ +#define SET_EXPTIME_LSB_REG (0x68 << 11) +#define SET_EXPTIME_MSB_REG (0x69 << 11) + +/* Module Coordinates Register 0 */ +#define COORD_0 (0x7C << 11) + +#define COORD_0_Y_OFST (0) +#define COORD_0_Y_MSK (0x0000FFFF << COORD_0_Y_OFST) +#define COORD_0_X_OFST (16) +#define COORD_0_X_MSK (0x0000FFFF << COORD_0_X_OFST) + +/* Module Coordinates Register 1 */ +#define COORD_1 (0x7D << 11) + +#define COORD_0_Z_OFST (0) +#define COORD_0_Z_MSK (0x0000FFFF << COORD_0_Z_OFST) + + +#endif //REGISTERS_G_H + + + + + + + + + + + + + + + diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/ansi.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/ansi.h new file mode 120000 index 000000000..a122db0ad --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/ansi.h @@ -0,0 +1 @@ +../../slsReceiverSoftware/include/ansi.h \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/communication_funcs.c b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/communication_funcs.c new file mode 120000 index 000000000..87a4f95d1 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/communication_funcs.c @@ -0,0 +1 @@ +../commonFiles/communication_funcs.c \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/communication_funcs.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/communication_funcs.h new file mode 120000 index 000000000..f220903b2 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/communication_funcs.h @@ -0,0 +1 @@ +../commonFiles/communication_funcs.h \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfo.txt b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfo.txt new file mode 100644 index 000000000..c64e4f71a --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfo.txt @@ -0,0 +1,9 @@ +Path: slsDetectorsPackage/slsDetectorSoftware/jungfrauDetectorServer +URL: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git/jungfrauDetectorServer +Repository Root: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git +Repsitory UUID: 230d6b36e9852214f4ba5ae7c92647f35000b24d +Revision: 56 +Branch: developer +Last Changed Author: Dhanya_Maliakal +Last Changed Rev: 1313 +Last Changed Date: 2016-11-30 10:36:34 +0100 diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfoJungfrau.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfoJungfrau.h new file mode 100644 index 000000000..633eb8933 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfoJungfrau.h @@ -0,0 +1,11 @@ +//#define SVNPATH "" +#define SVNURL "git@git.psi.ch:sls_detectors_software/sls_detector_software.git/jungfrauDetectorServer" +//#define SVNREPPATH "" +#define SVNREPUUID "230d6b36e9852214f4ba5ae7c92647f35000b24d" +//#define SVNREV 0x1313 +//#define SVNKIND "" +//#define SVNSCHED "" +#define SVNAUTH "Dhanya_Maliakal" +#define SVNREV 0x1313 +#define SVNDATE 0x20161130 +// diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfoJungfrauTmp.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfoJungfrauTmp.h new file mode 100644 index 000000000..58e48f497 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/gitInfoJungfrauTmp.h @@ -0,0 +1,11 @@ +//#define SVNPATH "" +#define SVNURL "" +//#define SVNREPPATH "" +#define SVNREPUUID "" +//#define SVNREV "" +//#define SVNKIND "" +//#define SVNSCHED "" +#define SVNAUTH "" +#define SVNREV "" +#define SVNDATE "" +// diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorFunctionList.c b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorFunctionList.c new file mode 100644 index 000000000..d39e209c8 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorFunctionList.c @@ -0,0 +1,1342 @@ +//#ifdef SLS_DETECTOR_FUNCTION_LIST + +#include +#include //to gethostname +#include + +#include "slsDetectorFunctionList.h" +#include "gitInfoJungfrau.h" + + + +sls_detector_module *detectorModules=NULL; +int *detectorChips=NULL; +int *detectorChans=NULL; +dacs_t *detectorDacs=NULL; +dacs_t *detectorAdcs=NULL; + +enum detectorSettings thisSettings; +enum masterFlags masterMode = NO_MASTER; +int highvoltage = 0; +int dacValues[NDAC]; + +u_int32_t CSP0BASE = 0; +int32_t clkPhase[2] = {0, 0}; +char mtdvalue[10]; + + + +void checkFirmwareCompatibility(){ + printf("Testing Firmware Compatibility... \n"); + + int64_t fwversion = getDetectorId(DETECTOR_FIRMWARE_VERSION); + int64_t swversion = getDetectorId(DETECTOR_SOFTWARE_VERSION); + //int64_t sw_fw_apiversion = getDetectorId(SOFTWARE_FIRMWARE_API_VERSION); + cprintf(BLUE,"\n\n" + "********************************************************\n" + "****************** Jungfrau Server *********************\n" + "********************************************************\n\n" + "Firmware Version:\t\t %llx\n" + "Software Version:\t\t %llx\n" + //"F/w-S/w API Version:\t\t %lld\n" + //"Required Firmware Version:\t %d\n" + "\n" + "********************************************************\n", + fwversion, swversion + //, sw_fw_apiversion, REQUIRED_FIRMWARE_VERSION + ); + + + //initial test + if ( (checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL) ) { + cprintf(BG_RED, "Dangerous to continue. Goodbye!\n"); + exit(-1); + } + +/* + //cant read versions + if(!fwversion || !sw_fw_apiversion){ + cprintf(RED,"FATAL ERROR: Cant read versions from FPGA. Please update firmware\n"); + cprintf(RED,"Exiting Server. Goodbye!\n\n"); + exit(-1); + } + + //check for API compatibility - old server + if(sw_fw_apiversion > REQUIRED_FIRMWARE_VERSION){ + cprintf(RED,"FATAL ERROR: This software version is incompatible.\n" + "Please update it to be compatible with this firmware\n\n"); + cprintf(RED,"Exiting Server. Goodbye!\n\n"); + exit(-1); + } + + //check for firmware compatibility - old firmware + if( REQUIRED_FIRMWARE_VERSION > fwversion){ + cprintf(RED,"FATAL ERROR: This firmware version is incompatible.\n" + "Please update it to v%d to be compatible with this server\n\n", REQUIRED_FIRMWARE_VERSION); + cprintf(RED,"Exiting Server. Goodbye!\n\n"); + exit(-1); + } +*/ +} + + +int checkType() { + volatile u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); + if (type != JUNGFRAU){ + cprintf(BG_RED,"This is not a Jungfrau Server (read %d, expected %d)\n",type, JUNGFRAU); + return FAIL; + } + + return OK; +} + + + +u_int32_t testFpga(void) { + printf("\nTesting FPGA...\n"); + + //fixed pattern + int ret = OK; + volatile u_int32_t val = bus_r(FIX_PATT_REG); + if (val == FIX_PATT_VAL) { + printf("Fixed pattern: successful match 0x%08x\n",val); + } else { + cprintf(RED,"Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL); + ret = FAIL; + } + printf("\n"); + return ret; +} + + +int testBus() { + printf("\nTesting Bus...\n"); + + int ret = OK; + u_int32_t addr = SET_DELAY_LSB_REG; + int times = 1000 * 1000; + int i = 0; + + for (i = 0; i < times; ++i) { + bus_w(addr, i * 100); + if (i * 100 != bus_r(SET_DELAY_LSB_REG)) { + cprintf(RED,"ERROR: Mismatch! Wrote 0x%x, read 0x%x\n", i * 100, bus_r(SET_DELAY_LSB_REG)); + ret = FAIL; + } + } + + if (ret == OK) + printf("Successfully tested bus %d times\n", times); + + printf("\n"); + return ret; +} + + +int moduleTest( enum digitalTestMode arg, int imod){ + return OK; +} + +int detectorTest( enum digitalTestMode arg){ + switch(arg){ + case DETECTOR_FIRMWARE_TEST: return testFpga(); + case DETECTOR_BUS_TEST: return testBus(); + //DETECTOR_MEMORY_TEST:testRAM + //DETECTOR_SOFTWARE_TEST: + default: + cprintf(RED,"Warning: Test not implemented for this detector %d\n", (int)arg); + break; + } + return OK; +} + + + + +int initDetector(){ + int imod,i,n; + n = getNModBoard(1); + + //#ifdef VERBOSE + printf("This Server is for 1 Eiger half module\n"); + //#endif + + + //Allocation of memory + detectorModules=malloc(n*sizeof(sls_detector_module)); + detectorChips=malloc(n*NCHIP*sizeof(int)); + + detectorChans=malloc(n*NCHIP*NCHAN*sizeof(int)); + detectorDacs=malloc(n*NDAC*sizeof(dacs_t)); + detectorAdcs=malloc(n*NADC*sizeof(dacs_t)); +#ifdef VERBOSE + printf("modules from 0x%x to 0x%x\n",detectorModules, detectorModules+n); + printf("chips from 0x%x to 0x%x\n",detectorChips, detectorChips+n*NCHIP); + printf("chans from 0x%x to 0x%x\n",detectorChans, detectorChans+n*NCHIP*NCHAN); + printf("dacs from 0x%x to 0x%x\n",detectorDacs, detectorDacs+n*NDAC); + printf("adcs from 0x%x to 0x%x\n",detectorAdcs, detectorAdcs+n*NADC); +#endif + for (imod=0; imoddacs=detectorDacs+imod*NDAC; + (detectorModules+imod)->adcs=detectorAdcs+imod*NADC; + (detectorModules+imod)->chipregs=detectorChips+imod*NCHIP; + (detectorModules+imod)->chanregs=detectorChans+imod*NCHIP*NCHAN; + (detectorModules+imod)->ndac=NDAC; + (detectorModules+imod)->nadc=NADC; + (detectorModules+imod)->nchip=NCHIP; + (detectorModules+imod)->nchan=NCHIP*NCHAN; + (detectorModules+imod)->module=imod; + (detectorModules+imod)->gain=0; + (detectorModules+imod)->offset=0; + (detectorModules+imod)->reg=0; + } + thisSettings = UNINITIALIZED; + + + //Feb and Beb Initializations + getModuleConfiguration(); + Feb_Interface_FebInterface(); + Feb_Control_FebControl(); + Feb_Control_Init(master,top,normal, getDetectorNumber()); + //master of 9M, check high voltage serial communication to blackfin + if(master && !normal){ + if(Feb_Control_OpenSerialCommunication()) + ;// Feb_Control_CloseSerialCommunication(); + } + printf("FEB Initialization done\n"); + Beb_Beb(); + printf("BEB Initialization done\n"); + + //Get dac values + int retval[2]; + for(i=0;i<(detectorModules)->ndac;i++) + setDAC((enum detDacIndex)i,default_dac_values[i],(detectorModules)->module,0,retval); + + //setting default measurement parameters + setTimer(FRAME_NUMBER,1); + setTimer(ACQUISITION_TIME,1E9); + setTimer(SUBFRAME_ACQUISITION_TIME,DEFAULT_SUBFRAME_EXPOSURE_VAL); + setTimer(FRAME_PERIOD,1E9); + setDynamicRange(16); + eiger_photonenergy = -1; + setReadOutFlags(NONPARALLEL); + setSpeed(0,1);//clk_devider,half speed + setIODelay(650,0); + setTiming(AUTO_TIMING); + //SetPhotonEnergyCalibrationParameters(-5.8381e-5,1.838515,5.09948e-7,-4.32390e-11,1.32527e-15); + setRateCorrection(0); //deactivate rate correction + int enable[2] = {0,1}; + setExternalGating(enable);//disable external gating + Feb_Control_SetInTestModeVariable(0); + setHighVoltage(0,0); + Feb_Control_CheckSetup(); + + //print detector mac and ip + printf("mac read from detector: %llx\n",getDetectorMAC()); + printf("ip read from detector: %x\n",getDetectorIP()); + + + printf("\n"); + return 1; +} + +int initDetectorStop(){ + getModuleConfiguration(); + Feb_Interface_FebInterface(); + Feb_Control_FebControl(); + Feb_Control_Init(master,top,normal,getDetectorNumber()); + printf("FEB Initialization done\n"); + /* Beb_Beb(-1); + printf("BEB constructor done\n");*/ + + printf("\n"); + return 1; +} + + + +void getModuleConfiguration(){ + int *m=&master; + int *t=⊤ + int *n=&normal; + /*if(getDetectorNumber() == 0xbeb015){ + master = 1; + top = 1; + }*/ + Beb_GetModuleConfiguration(m,t,n); + if(top) printf("*************** TOP ***************\n"); + else printf("*************** BOTTOM ***************\n"); + if(master) printf("*************** MASTER ***************\n"); + else printf("*************** SLAVE ***************\n"); + if(normal) printf("*************** NORMAL ***************\n"); + else printf("*************** SPECIAL ***************\n"); +} + + + +int setNMod(int nm, enum dimension dim){ + return 1; +} + + + +int getNModBoard(enum dimension arg){ + return 1; +} + + + +int64_t getModuleId(enum idMode arg, int imod){ + + /**/ + return -1; +} + + + + +int64_t getDetectorId(enum idMode arg){ + int64_t retval = -1; + + switch(arg){ + case DETECTOR_SERIAL_NUMBER: + retval = getDetectorNumber(); + break; + case DETECTOR_FIRMWARE_VERSION: + retval=(u_int32_t)bus_r(FPGA_SVN_REG); + retval=(retval <<32) | (u_int32_t)bus_r(FPGA_VERSION_REG)(); + break; + //case SOFTWARE_FIRMWARE_API_VERSION: + //return GetFirmwareSoftwareAPIVersion(); + case DETECTOR_SOFTWARE_VERSION: + retval= SVNREV; + retval= (retval <<32) | SVNDATE; + break; + default: + break; + } + + return retval; +} + + + +int getDetectorNumber(){ + int res=0; + + //execute and get address + char output[255]; + FILE* sysFile = popen("more /home/root/executables/detid.txt", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + sscanf(output,"%d",&res); + printf("detector id: %d\n",res); + +/* + int res=0; + char hostname[100]; + if (gethostname(hostname, sizeof hostname) == 0) + puts(hostname); + else + perror("gethostname"); + sscanf(hostname,"%x",&res); +*/ + return res; +} + + +u_int64_t getDetectorMAC() { + char output[255],mac[255]=""; + u_int64_t res=0; + FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + //getting rid of ":" + char * pch; + pch = strtok (output,":"); + while (pch != NULL){ + strcat(mac,pch); + pch = strtok (NULL, ":"); + } + sscanf(mac,"%llx",&res); + return res; +} + + + +int getDetectorIP(){ + char temp[50]=""; + int res=0; + //execute and get address + char output[255]; + FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + + //converting IPaddress to hex. + char* pcword = strtok (output,"."); + while (pcword != NULL) { + sprintf(output,"%02x",atoi(pcword)); + strcat(temp,output); + pcword = strtok (NULL, "."); + } + strcpy(output,temp); + sscanf(output, "%x", &res); + //printf("ip:%x\n",res); + + return res; +} + + + + + + + + +void setDAC(enum detDacIndex ind, int val, int imod, int mV, int retval[]){ + + if(ind == VTHRESHOLD){ + int ret[5]; + setDAC(VCMP_LL,val,imod,mV,retval); + ret[0] = retval[mV]; + setDAC(VCMP_LR,val,imod,mV,retval); + ret[1] = retval[mV]; + setDAC(VCMP_RL,val,imod,mV,retval); + ret[2] = retval[mV]; + setDAC(VCMP_RR,val,imod,mV,retval); + ret[3] = retval[mV]; + setDAC(VCP,val,imod,mV,retval); + ret[4] = retval[mV]; + + + if((ret[0]== ret[1])&& + (ret[1]==ret[2])&& + (ret[2]==ret[3]) && + (ret[3]==ret[4])) + cprintf(GREEN,"vthreshold match\n"); + else{ + retval[0] = -1;retval[1] = -1; + cprintf(RED,"vthreshold mismatch 0:%d 1:%d 2:%d 3:%d\n", + ret[0],ret[1],ret[2],ret[3]); + } + return; + } + char iname[10]; + + if(((int)ind>=0)&&((int)ind= 0) + printf("Setting dac %d: %s to %d ",ind, iname,val); + else + printf("Getting dac %d: %s ",ind, iname); + if(mV) + printf("in mV\n"); + else + printf("in dac units\n"); +#endif + if(val >= 0) + Feb_Control_SetDAC(iname,val,mV); + int k; + Feb_Control_GetDAC(iname, &k,0); + retval[0] = k; + Feb_Control_GetDAC(iname,&k,1); + retval[1] = k; + + (detectorModules)->dacs[ind] = retval[0]; + +} + + + +int setHighVoltage(int val, int imod){ + if(val!=-1){ + eiger_highvoltage = val; + if(master){ + int ret = Feb_Control_SetHighVoltage(val); + if(!ret) //could not set + return -2; + else if (ret == -1) //outside range + return -1; + } + } + + if(master && !Feb_Control_GetHighVoltage(&eiger_highvoltage)){ + cprintf(RED,"Warning: Could not read high voltage\n"); + return -3; + } + return eiger_highvoltage; +} + + +int getADC(enum detAdcIndex ind, int imod){ + int retval = -1; + char tempnames[6][20]={"FPGA EXT", "10GE","DCDC", "SODL", "SODR", "FPGA"}; + char cstore[255]; + + switch(ind){ + case TEMP_FPGA: + retval=getBebFPGATemp()*1000; + break; + case TEMP_FPGAFEBL: + retval=Feb_Control_GetLeftFPGATemp(); + break; + case TEMP_FPGAFEBR: + retval=Feb_Control_GetRightFPGATemp(); + break; + case TEMP_FPGAEXT: + case TEMP_10GE: + case TEMP_DCDC: + case TEMP_SODL: + case TEMP_SODR: + sprintf(cstore,"more /sys/class/hwmon/hwmon%d/device/temp1_input",ind); + FILE* sysFile = popen(cstore, "r"); + fgets(cstore, sizeof(cstore), sysFile); + pclose(sysFile); + sscanf(cstore,"%d",&retval); + break; + default: + return -1; + } + + printf("Temperature %s: %f°C\n",tempnames[ind],(double)retval/1000.00); + + return retval; +} + + +int setIODelay(int val, int imod){ + if(val!=-1){ + printf(" Setting IO Delay: %d\n",val); + if(Feb_Control_SetIDelays(Feb_Control_GetModuleNumber(),val)) + eiger_iodelay = val; + } + return eiger_iodelay; +} + + +int enableTenGigabitEthernet(int val){ + if(val!=-1){ + if(val>0) + send_to_ten_gig = 1; + else + send_to_ten_gig = 0; + //configuremac called from client + } +#ifdef VERBOSE + printf("10Gbe:%d\n",send_to_ten_gig); +#endif + return send_to_ten_gig; +} + + +int setCounterBit(int val){ + if(val!=-1){ + Feb_Control_Set_Counter_Bit(val); +#ifdef VERBOSE + printf("Counter Bit:%d\n",val); +#endif + } + + return Feb_Control_Get_Counter_Bit(); +} + + +int pulsePixel(int n, int x, int y){ + if(!Feb_Control_Pulse_Pixel(n,x,y)) + return FAIL; + return OK; +} + +int pulsePixelNMove(int n, int x, int y){ + if(!Feb_Control_PulsePixelNMove(n,x,y)) + return FAIL; + return OK; +} + +int pulseChip(int n){ + if(!Feb_Control_PulseChip(n)) + return FAIL; + return OK; +} + +int64_t setRateCorrection(int64_t custom_tau_in_nsec){//in nanosec (will never be -1) + + //deactivating rate correction + if(custom_tau_in_nsec==0){ + Feb_Control_SetRateCorrectionVariable(0); + return 0; + } + + //when dynamic range changes, use old tau + else if(custom_tau_in_nsec == -1) + custom_tau_in_nsec = Feb_Control_Get_RateTable_Tau_in_nsec(); + + + int dr = Feb_Control_GetDynamicRange(); + //get period = subexptime if 32bit , else period = exptime if 16 bit + int64_t actual_period = Feb_Control_GetSubFrameExposureTime(); //already in nsec + if(dr == 16) + actual_period = Feb_Control_GetExposureTime_in_nsec(); + + int64_t ratetable_period_in_nsec = Feb_Control_Get_RateTable_Period_in_nsec(); + int64_t tau_in_nsec = Feb_Control_Get_RateTable_Tau_in_nsec(); + + + //same setting + if((tau_in_nsec == custom_tau_in_nsec) && (ratetable_period_in_nsec == actual_period)){ + if(dr == 32) + printf("Rate Table already created before: Same Tau %lldns, Same subexptime %lldns\n", + tau_in_nsec,ratetable_period_in_nsec); + else + printf("Rate Table already created before: Same Tau %lldns, Same exptime %lldns\n", + tau_in_nsec,ratetable_period_in_nsec); + } + //different setting, calculate table + else{ + int ret = Feb_Control_SetRateCorrectionTau(custom_tau_in_nsec); + if(ret<=0){ + cprintf(RED,"Rate correction failed. Deactivating rate correction\n"); + Feb_Control_SetRateCorrectionVariable(0); + return ret; + } + } + //activating rate correction + Feb_Control_SetRateCorrectionVariable(1); + printf("Rate Correction Value set to %lld ns\n",(long long int)Feb_Control_Get_RateTable_Tau_in_nsec()); +#ifdef VERBOSE + Feb_Control_PrintCorrectedValues(); +#endif + + return Feb_Control_Get_RateTable_Tau_in_nsec(); +} + +int getRateCorrectionEnable(){ + return Feb_Control_GetRateCorrectionVariable(); +} + +int getDefaultSettingsTau_in_nsec(){ + return default_tau_from_file; +} + +int64_t getCurrentTau(){ + if(!getRateCorrectionEnable()) + return 0; + else + return Feb_Control_Get_RateTable_Tau_in_nsec(); +} + +void setDefaultSettingsTau_in_nsec(int t){ + default_tau_from_file = t; + printf("Default tau set to %d\n",default_tau_from_file); +} + +int setModule(sls_detector_module myMod, int delay){ + int retval[2]; + int i; + + //#ifdef VERBOSE + printf("Setting module with settings %d\n",myMod.reg); + //#endif + + setSettings( (enum detectorSettings)myMod.reg,-1); + + if(setIODelay(delay, -1)!= delay){ + cprintf(RED,"could not set iodelay %d\n",delay); + return FAIL; + } + + //copy module locally + if (detectorModules) + copyModule(detectorModules,&myMod); + + //set dac values + for(i=0;ichanregs[ich++]=tt[ip++]; + } + if (ichip<3) { + ip++; + ip++; + } + } + } + + //copy to local copy as well + if (detectorModules) + copyModule(myMod,detectorModules); + else + return FAIL; + return OK; +} + + + + + + +int getThresholdEnergy(int imod){ + printf(" Getting Threshold energy\n"); + return eiger_photonenergy; +} + + +int setThresholdEnergy(int ev, int imod){ + printf(" Setting threshold energy:%d\n",ev); + if(ev >= 0) + eiger_photonenergy = ev; + return getThresholdEnergy(imod); +} + +enum detectorSettings setSettings(enum detectorSettings sett, int imod){ + if(sett == UNINITIALIZED){ + return thisSettings; + }if(sett != GET_SETTINGS) + thisSettings = sett; + printf(" Settings: %d\n", thisSettings); + return thisSettings; +} + +enum detectorSettings getSettings(){ + return thisSettings; +} + +int startReceiver(int d){ + + printf("Going to prepare for acquisition with counter_bit:%d\n",Feb_Control_Get_Counter_Bit()); + Feb_Control_PrepareForAcquisition(); + printf("Going to reset Frame Number\n"); + Beb_ResetFrameNumber(); + + return OK; +} + + +int startStateMachine(){ + int ret = OK,prev_flag; + //get the DAQ toggle bit + prev_flag = Feb_Control_AcquisitionStartedBit(); + + printf("Going to start acquisition\n"); + Feb_Control_StartAcquisition(); + + if(!eiger_storeinmem){ + printf("requesting images right after start\n"); + ret = startReadOut(); + } + + //wait for acquisition start + if(ret == OK){ + if(!Feb_Control_WaitForStartedFlag(5000, prev_flag)){ + cprintf(RED,"Error: Acquisition did no start or trouble reading register\n"); + ret = FAIL; + } + cprintf(GREEN,"***Acquisition started\n"); + } + + /*while(getRunStatus() == IDLE){printf("waiting for being not idle anymore\n");}*/ + + return ret; +} + + +int stopStateMachine(){ + cprintf(BG_RED,"Going to stop acquisition\n"); + if(Feb_Control_StopAcquisition() & Beb_StopAcquisition()) + return OK; + cprintf(BG_RED,"failed to stop acquisition\n"); + return FAIL; +} + + +int startReadOut(){ + + //RequestImages(); + int ret_val = 0; + dst_requested[0] = 1; + while(dst_requested[on_dst]){ + //waits on data + int beb_num = BEB_NUM;//Feb_Control_GetModuleNumber(); + + + + if ((ret_val = (!Beb_RequestNImages(beb_num,send_to_ten_gig,on_dst,nimages_per_request,0)))) + break; +// for(i=0;i= 0){ + printf(" Setting number of frames: %d * %d\n",(unsigned int)val,eiger_ncycles); + if(Feb_Control_SetNExposures((unsigned int)val*eiger_ncycles)){ + eiger_nexposures = val; + //SetDestinationParameters(EigerGetNumberOfExposures()*EigerGetNumberOfCycles()); + on_dst = 0; + int i; + for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested + ndsts_in_use = 1; + nimages_per_request = eiger_nexposures * eiger_ncycles; + } + }return eiger_nexposures; + + case ACQUISITION_TIME: + if(val >= 0){ + printf(" Setting exp time: %fs\n",val/(1E9)); + Feb_Control_SetExposureTime(val/(1E9)); + } + return (Feb_Control_GetExposureTime()*(1E9)); + + case SUBFRAME_ACQUISITION_TIME: + if(val >= 0){ + printf(" Setting sub exp time: %lldns\n",(long long int)val/10); + Feb_Control_SetSubFrameExposureTime(val/10); + } + return (Feb_Control_GetSubFrameExposureTime()); + + + case FRAME_PERIOD: + if(val >= 0){ + printf(" Setting acq period: %fs\n",val/(1E9)); + Feb_Control_SetExposurePeriod(val/(1E9)); + } + return (Feb_Control_GetExposurePeriod()*(1E9)); + /* case DELAY_AFTER_TRIGGER: + if(val >= 0) + EigerSetNumberOfExposures((unsigned int)val); + return EigerGetNumberOfExposures(); + + case GATES_NUMBER: + if(val >= 0) + EigerSetNumberOfGates((unsigned int)val); + return EigerGetNumberOfGates(); + + case PROBES_NUMBER: + if(val >= 0) + EigerSetNumberOfExposures((unsigned int)val); + return EigerGetNumberOfExposures();*/ + case CYCLES_NUMBER: + if(val >= 0){ + printf(" Setting number of triggers: %d * %d\n",(unsigned int)val,eiger_nexposures); + if(Feb_Control_SetNExposures((unsigned int)val*eiger_nexposures)){ + eiger_ncycles = val; + //SetDestinationParameters(EigerGetNumberOfExposures()*EigerGetNumberOfCycles()); + on_dst = 0; + int i; + for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested + nimages_per_request = eiger_nexposures * eiger_ncycles; + } + }return eiger_ncycles; + default: + printf("unknown timer index: %d\n",ind); + break; + } + + return -1; +} + + + + +int64_t getTimeLeft(enum timerIndex ind){ + + return -1; +} + + + +int setDynamicRange(int dr){ + if(dr > 0){ + printf(" Setting dynamic range: %d\n",dr); + if(Feb_Control_SetDynamicRange(dr)){ + + //EigerSetBitMode(dr); + on_dst = 0; + int i; + for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested + if(Beb_SetUpTransferParameters(dr)) + eiger_dynamicrange = dr; + else printf("ERROR:Could not set bit mode in the back end\n"); + } + } + //make sure back end and front end have the same bit mode + dr= Feb_Control_GetDynamicRange(); + + return dr; +} + + + +enum readOutFlags setReadOutFlags(enum readOutFlags val){ + + enum readOutFlags retval = GET_READOUT_FLAGS; + if(val!=GET_READOUT_FLAGS){ + + + if(val&0xF0000){ + switch(val){ + case PARALLEL: val=E_PARALLEL; printf(" Setting Read out Flag: Parallel\n"); break; + case NONPARALLEL: val=E_NON_PARALLEL; printf(" Setting Read out Flag: Non Parallel\n"); break; + case SAFE: val=E_SAFE; printf(" Setting Read out Flag: Safe\n"); break; + + default: + cprintf(RED,"Cannot set unknown readout flag. 0x%x\n", val); + return -1; + } + printf(" Setting Read out Flag: %d\n",val); + if(Feb_Control_SetReadoutMode(val)) + eiger_readoutmode = val; + else return -1; + + }else{ + switch(val){ + case STORE_IN_RAM: val=1; printf(" Setting Read out Flag: Store in Ram\n"); break; + case CONTINOUS_RO: val=0; printf(" Setting Read out Flag: Continuous Readout\n"); break; + + default: + cprintf(RED,"Cannot set unknown readout flag. 0x%x\n", val); + return -1; + } + printf(" Setting store in ram variable: %d\n",val); + eiger_storeinmem = val; + + } + } + + switch(eiger_readoutmode){ + case E_PARALLEL: retval=PARALLEL; break; + case E_NON_PARALLEL: retval=NONPARALLEL; break; + case E_SAFE: retval=SAFE; break; + } + + switch(eiger_storeinmem){ + case 0: retval|=CONTINOUS_RO; break; + case 1: retval|=STORE_IN_RAM; break; + } + printf("Read out Flag: 0x%x\n",retval); + return retval; +} + + + + +int setROI(int n, ROI arg[], int *retvalsize, int *ret){ + return FAIL; +} + + + +int setSpeed(enum speedVariable arg, int val){ + if(val != -1){ + printf(" Setting Read out Speed: %d\n",val); + if(Feb_Control_SetReadoutSpeed(val)) + eiger_readoutspeed = val; + } + return eiger_readoutspeed; +} + + + +int executeTrimming(enum trimMode mode, int par1, int par2, int imod){ + return FAIL; +} + + +int configureMAC(int ipad, long long int macad, long long int detectormacadd, int detipad, int udpport, int udpport2, int ival){ + if (detectormacadd != getDetectorMAC()){ + printf("*************************************************\n"); + printf("WARNING: actual detector mac address %llx does not match the one from client %llx\n",getDetectorMAC(),detectormacadd); + detectormacadd = getDetectorMAC(); + printf("WARNING: Matched detectormac to the hardware mac now\n"); + printf("*************************************************\n"); + } + //only for 1Gbe + if(!send_to_ten_gig){ + if (detipad != getDetectorIP()){ + printf("*************************************************\n"); + printf("WARNING: actual detector ip address %x does not match the one from client %x\n",getDetectorIP(),detipad); + detipad = getDetectorIP(); + printf("WARNING: Matched detector ip to the hardware ip now\n"); + printf("*************************************************\n"); + } + } + + char src_mac[50], src_ip[50],dst_mac[50], dst_ip[50]; + int src_port = 0xE185; + sprintf(src_ip,"%d.%d.%d.%d",(detipad>>24)&0xff,(detipad>>16)&0xff,(detipad>>8)&0xff,(detipad)&0xff); + sprintf(dst_ip,"%d.%d.%d.%d",(ipad>>24)&0xff,(ipad>>16)&0xff,(ipad>>8)&0xff,(ipad)&0xff); + sprintf(src_mac,"%02x:%02x:%02x:%02x:%02x:%02x",(unsigned int)((detectormacadd>>40)&0xFF), + (unsigned int)((detectormacadd>>32)&0xFF), + (unsigned int)((detectormacadd>>24)&0xFF), + (unsigned int)((detectormacadd>>16)&0xFF), + (unsigned int)((detectormacadd>>8)&0xFF), + (unsigned int)((detectormacadd>>0)&0xFF)); + sprintf(dst_mac,"%02x:%02x:%02x:%02x:%02x:%02x",(unsigned int)((macad>>40)&0xFF), + (unsigned int)((macad>>32)&0xFF), + (unsigned int)((macad>>24)&0xFF), + (unsigned int)((macad>>16)&0xFF), + (unsigned int)((macad>>8)&0xFF), + (unsigned int)((macad>>0)&0xFF)); + + printf("src_port:%d\n",src_port); + printf("src_ip:%s\n",src_ip); + printf("dst_ip:%s\n",dst_ip); + printf("src_mac:%s\n",src_mac); + printf("dst_mac:%s\n",dst_mac); + + + int beb_num = BEB_NUM;//Feb_Control_GetModuleNumber(); + int header_number = 0; + int dst_port = udpport; + if(!top) + dst_port = udpport2; + + printf("dst_port:%d\n\n",dst_port); + + int i=0; + /* for(i=0;i<32;i++){ modified for Aldo*/ + if(Beb_SetBebSrcHeaderInfos(beb_num,send_to_ten_gig,src_mac,src_ip,src_port) && + Beb_SetUpUDPHeader(beb_num,send_to_ten_gig,header_number+i,dst_mac,dst_ip, dst_port)) + printf("set up left ok\n"); + else return -1; + /*}*/ + + header_number = 32; + dst_port = udpport2; + if(!top) + dst_port = udpport; + printf("dst_port:%d\n\n",dst_port); + + /*for(i=0;i<32;i++){*//** modified for Aldo*/ + if(Beb_SetBebSrcHeaderInfos(beb_num,send_to_ten_gig,src_mac,src_ip,src_port) && + Beb_SetUpUDPHeader(beb_num,send_to_ten_gig,header_number+i,dst_mac,dst_ip, dst_port)) + printf("set up right ok\n\n"); + else return -1; + /*}*/ + + on_dst = 0; + + for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested + nimages_per_request=eiger_nexposures * eiger_ncycles; + + return 0; +} + + +int calculateDataBytes(){ + if(send_to_ten_gig) + return setDynamicRange(-1)*16*TEN_GIGA_BUFFER_SIZE; + else + return setDynamicRange(-1)*16*ONE_GIGA_BUFFER_SIZE; +} + + +int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod){ + + int ichip, idac, ichan, iadc; + int ret=OK; + +#ifdef VERBOSE + printf("Copying module %x to module %x\n",srcMod,destMod); +#endif + + if (srcMod->module>=0) { +#ifdef VERBOSE + printf("Copying module number %d to module number %d\n",srcMod->module,destMod->module); +#endif + destMod->module=srcMod->module; + } + if (srcMod->serialnumber>=0){ + + destMod->serialnumber=srcMod->serialnumber; + } + if ((srcMod->nchip)>(destMod->nchip)) { + printf("Number of chip of source is larger than number of chips of destination\n"); + return FAIL; + } + if ((srcMod->nchan)>(destMod->nchan)) { + printf("Number of channels of source is larger than number of channels of destination\n"); + return FAIL; + } + if ((srcMod->ndac)>(destMod->ndac)) { + printf("Number of dacs of source is larger than number of dacs of destination\n"); + return FAIL; + } + if ((srcMod->nadc)>(destMod->nadc)) { + printf("Number of dacs of source is larger than number of dacs of destination\n"); + return FAIL; + } + +#ifdef VERBOSE + printf("DACs: src %d, dest %d\n",srcMod->ndac,destMod->ndac); + printf("ADCs: src %d, dest %d\n",srcMod->nadc,destMod->nadc); + printf("Chips: src %d, dest %d\n",srcMod->nchip,destMod->nchip); + printf("Chans: src %d, dest %d\n",srcMod->nchan,destMod->nchan); + +#endif + destMod->ndac=srcMod->ndac; + destMod->nadc=srcMod->nadc; + destMod->nchip=srcMod->nchip; + destMod->nchan=srcMod->nchan; + if (srcMod->reg>=0) + destMod->reg=srcMod->reg; +#ifdef VERBOSE + printf("Copying register %x (%x)\n",destMod->reg,srcMod->reg ); +#endif + if (srcMod->gain>=0) + destMod->gain=srcMod->gain; + if (srcMod->offset>=0) + destMod->offset=srcMod->offset; + + for (ichip=0; ichip<(srcMod->nchip); ichip++) { + if (*((srcMod->chipregs)+ichip)>=0) + *((destMod->chipregs)+ichip)=*((srcMod->chipregs)+ichip); + } + for (ichan=0; ichan<(srcMod->nchan); ichan++) { + if (*((srcMod->chanregs)+ichan)>=0) + *((destMod->chanregs)+ichan)=*((srcMod->chanregs)+ichan); + } + for (idac=0; idac<(srcMod->ndac); idac++) { + if (*((srcMod->dacs)+idac)>=0) + *((destMod->dacs)+idac)=*((srcMod->dacs)+idac); + } + for (iadc=0; iadc<(srcMod->nadc); iadc++) { + if (*((srcMod->adcs)+iadc)>=0) + *((destMod->adcs)+iadc)=*((srcMod->adcs)+iadc); + } + return ret; +} + + + +int getTotalNumberOfChannels(){return getNumberOfChannelsPerModule();} +int getTotalNumberOfChips(){return NCHIP;} +int getTotalNumberOfModules(){return 1;} +int getNumberOfChannelsPerChip(){return NCHAN;} +int getNumberOfChannelsPerModule(){return getNumberOfChannelsPerChip() * getTotalNumberOfChips();} +int getNumberOfChipsPerModule(){return NCHIP;} +int getNumberOfDACsPerModule(){return NDAC;} +int getNumberOfADCsPerModule(){return NADC;} +int getNumberOfGainsPerModule(){return NGAIN;} +int getNumberOfOffsetsPerModule(){return NOFFSET;} + + + + + +enum externalSignalFlag getExtSignal(int signalindex){ + return GET_EXTERNAL_SIGNAL_FLAG; +} + + + + + +enum externalSignalFlag setExtSignal(int signalindex, enum externalSignalFlag flag){ + return getExtSignal(signalindex); +} + + + + + + +enum externalCommunicationMode setTiming( enum externalCommunicationMode arg){ + enum externalCommunicationMode ret=GET_EXTERNAL_COMMUNICATION_MODE; + if(arg != GET_EXTERNAL_COMMUNICATION_MODE){ + switch((int)arg){ + case AUTO_TIMING: ret = 0; break; + case TRIGGER_EXPOSURE: ret = 2; break; + case BURST_TRIGGER: ret = 1; break; + case GATE_FIX_NUMBER: ret = 3; break; + } + printf(" Setting Triggering Mode: %d\n",(int)ret); + if(Feb_Control_SetTriggerMode(ret,1)) + eiger_triggermode = ret; + } + + ret = eiger_triggermode; + switch((int)ret){ + case 0: ret = AUTO_TIMING; break; + case 2: ret = TRIGGER_EXPOSURE; break; + case 1: ret = BURST_TRIGGER; break; + case 3: ret = GATE_FIX_NUMBER; break; + default: + printf("Unknown trigger mode found %d\n",ret); + ret = 0; + } + return ret; +} + + +void setExternalGating(int enable[]){ + if(enable>=0){ + Feb_Control_SetExternalEnableMode(enable[0], enable[1]);//enable = 0 or 1, polarity = 0 or 1 , where 1 is positive + eiger_extgating = enable[0]; + eiger_extgatingpolarity = enable[1]; + } + enable[0] = eiger_extgating; + enable[1] = eiger_extgatingpolarity; +} + + +enum masterFlags setMaster(enum masterFlags arg){ + //if(arg != GET_MASTER) + // masterMode = arg; + + return NO_MASTER; +} + + + +enum synchronizationMode setSynchronization(enum synchronizationMode arg){ + return NO_SYNCHRONIZATION; +} + +int setAllTrimbits(int val){ + int ichan; + if(!Feb_Control_SaveAllTrimbitsTo(val)){ + cprintf(RED,"error in setting all trimbits to value\n"); + return FAIL; + }else{ +#ifdef VERBOSE + printf("Copying register %x value %d\n",destMod->reg,val); +#endif + if (detectorModules){ + for (ichan=0; ichan<(detectorModules->nchan); ichan++) { + *((detectorModules->chanregs)+ichan)=val; + } + } + } + return OK; +} + +int getAllTrimbits(){ + return *((detectorModules->chanregs)); +} + +int getBebFPGATemp(){ + return Beb_GetBebFPGATemp(); +} + + +int activate(int enable){ + int ret = Beb_Activate(enable); + Feb_Control_activate(ret); + return ret; +} + + +int setNetworkParameter(enum detNetworkParameter mode, int value){ + return Beb_SetNetworkParameter(mode, value); +} + +//#endif diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorFunctionList.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorFunctionList.h new file mode 120000 index 000000000..345b8c029 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorFunctionList.h @@ -0,0 +1 @@ +../slsDetectorServer/slsDetectorFunctionList.h \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer.c b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer.c new file mode 120000 index 000000000..a7eb59acb --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer.c @@ -0,0 +1 @@ +../slsDetectorServer/slsDetectorServer.c \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_defs.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_defs.h new file mode 100644 index 000000000..e5f524a52 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_defs.h @@ -0,0 +1,215 @@ +#ifndef SLSDETECTORSERVER_DEFS_H +#define SLSDETECTORSERVER_DEFS_H + +#include "sls_detector_defs.h" //default dynamicgain in settings +#include "registers_m.h" +#include + + + +#define GOODBYE (-200) +//#define REQUIRED_FIRMWARE_VERSION 16 +//#define FIRMWAREREV 0xcaba //temporary should be in firmware +enum clkspeed {FULL_SPEED, HALF_SPEED, QUARTER_SPEED}; +enum ADC_INDEX {TEMP_FPGA, TEMP_ADC}; +enum DAC_INDEX { VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF_DS, VREF_COMP }; +#define DEFAULT_DAC_VALS { 1220, /* VB_COMP */ \ + 3000, /* VDD_PROT */ \ + 1053, /* VIN_COM */ \ + 1450, /* VREF_PRECH */ \ + 750, /* VB_PIXBUF */ \ + 1000, /* VB_DS */ \ + 480, /* VREF_DS */ \ + 420 /* VREF_COMP */ \ + }; + + +/* Hardware Definitions */ +#define NMAXMODY (1) +#define NMAXMODX (1) +#define NMAXMOD (NMAXMODX * NMAXMODY) +//#define NMODY (1) +//#define NMODX (1) +//#define NMOD (NMODX * NMODY) +#define NCHAN (256 * 256) +#define NCHIP (8) +#define NADC (0) +#define NDAC (8) +#define NCHANS (NCHAN * NCHIP * NMAXMOD) +#define NDACS (NDAC * NMAXMOD) +#define DYNAMIC_RANGE (16) +#define DATA_BYTES (NMAXMOD * NCHIP * NCHAN * 2) +#define IP_PACKETSIZE (0x2052) +#define CLK_RUN (40) /* MHz */ +#define CLK_SYNC (20) /* MHz */ + + +/** Default Parameters */ +#define DEFAULT_NUM_FRAMES (100*1000*1000) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_EXPTIME (10*1000) //ns +#define DEFAULT_PERIOD (2*1000*1000) //ns +#define DEFAULT_DELAY (0) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_SETTINGS (DYNAMICGAIN) +#define DEFAULT_TX_UDP_PORT (0x7e9a) + +/* Defines in the Firmware */ +#define FIX_PATT_VAL (0xACDC2014) +#define ADC_PORT_INVERT_VAL (0x453b2a9c) + + +#define SAMPLE_ADC_HALF_SPEED (SAMPLE_DECMT_FACTOR_2_VAL + SAMPLE_DGTL_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x1000 */ +#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_DECMT_FACTOR_4_VAL + SAMPLE_DGTL_SAMPLE_8_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x2810 */ +#define CONFIG_HALF_SPEED (CONFIG_TDMA_TIMESLOT_0_VAL + CONFIG_TDMA_DISABLE_VAL + CONFIG_HALF_SPEED_20MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL) +#define CONFIG_QUARTER_SPEED (CONFIG_TDMA_TIMESLOT_0_VAL + CONFIG_TDMA_DISABLE_VAL + CONFIG_QUARTER_SPEED_10MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL) +#define ADC_OFST_HALF_SPEED_VAL (0x20) //adc pipeline +#define ADC_OFST_QUARTER_SPEED_VAL (0x0f) +#define ADC_PHASE_HALF_SPEED (0x41) +#define ADC_PHASE_QUARTER_SPEED (0x19) + +/* Maybe not required for jungfrau */ +#define NTRIMBITS (6) +#define NCOUNTBITS (24) +#define NCHIPS_PER_ADC (2) +#define TRIM_DR (((int)pow(2,NTRIMBITS))-1) +#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1) +#define ALLMOD (0xffff) +#define ALLFIFO (0xffff) + +/* LTC2620 DAC DEFINES */ +#define LTC2620_DAC_CMD_OFST (20) +#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_ADDR_OFST (16) +#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST) +#define LTC2620_DAC_DATA_OFST (4) +#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST) + +#define LTC2620_DAC_CMD_WRITE (0x00000000 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_CMD_SET (0x00000003 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_CMD_POWER_DOWN (0x00000004 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_NUMBITS (24) + + +/* MAX1932 HV DEFINES */ +#define MAX1932_HV_NUMBITS (8) +#define MAX1932_HV_DATA_OFST (0) +#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST) + +/* AD9257 ADC DEFINES */ +#define AD9257_ADC_NUMBITS (24) + +#define AD9257_DEV_IND_2_REG (0x04) +#define AD9257_CHAN_H_OFST (0) +#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST) +#define AD9257_CHAN_G_OFST (1) +#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST) +#define AD9257_CHAN_F_OFST (2) +#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST) +#define AD9257_CHAN_E_OFST (3) +#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST) + +#define AD9257_DEV_IND_1_REG (0x05) +#define AD9257_CHAN_D_OFST (0) +#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST) +#define AD9257_CHAN_C_OFST (1) +#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST) +#define AD9257_CHAN_B_OFST (2) +#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST) +#define AD9257_CHAN_A_OFST (3) +#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST) +#define AD9257_CLK_CH_DCO_OFST (4) +#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST) +#define AD9257_CLK_CH_IFCO_OFST (5) +#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST) + +#define AD9257_POWER_MODE_REG (0x08) +#define AD9257_POWER_INTERNAL_OFST (0) +#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST) +#define AD9257_INT_RESET_VAL (0x3) +#define AD9257_INT_CHIP_RUN_VAL (0x0) +#define AD9257_POWER_EXTERNAL_OFST (5) +#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST) +#define AD9257_EXT_FULL_POWER_VAL (0x0) +#define AD9257_EXT_STANDBY_VAL (0x1) + +#define AD9257_OUT_MODE_REG (0x14) +#define AD9257_OUT_FORMAT_OFST (0) +#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST) +#define AD9257_OUT_BINARY_OFST_VAL (0) +#define AD9257_OUT_TWOS_COMPL_VAL (1) +#define AD9257_OUT_LVDS_OPT_OFST (6) +#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST) +#define AD9257_OUT_LVDS_ANSI_VAL (0) +#define AD9257_OUT_LVDS_IEEE_VAL (1) + +#define AD9257_OUT_PHASE_REG (0x16) +#define AD9257_OUT_CLK_OFST (0) +#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST) +#define AD9257_OUT_CLK_60_VAL (0x1) +#define AD9257_IN_CLK_OFST (4) +#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST) +#define AD9257_IN_CLK_0_VAL (0x0) + +#define AD9257_VREF_REG (0x18) +#define AD9257_VREF_OFST (0) +#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST) +#define AD9257_VREF_1_33_VAL (0x2) + +#define AD9257_TEST_MODE_REG (0x0D) +#define AD9257_OUT_TEST_OFST (0) +#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST) +#define AD9257_NONE_VAL (0x0) +#define AD9257_MIXED_BIT_FREQ_VAL (0xC) +#define AD9257_TEST_RESET_SHORT_GEN (4) +#define AD9257_TEST_RESET_LONG_GEN (5) +#define AD9257_USER_IN_MODE_OFST (6) +#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST) + +/** PLL Reconfiguration Registers */ +//https://www.altera.com/documentation/mcn1424769382940.html +#define PLL_MODE_REG (0x00) +#define PLL_STATUS_REG (0x01) +#define PLL_START_REG (0x02) +#define PLL_N_COUNTER_REG (0x03) +#define PLL_M_COUNTER_REG (0x04) +#define PLL_C_COUNTER_REG (0x05) +#define PLL_PHASE_SHIFT_REG (0x06) + +#define PLL_SHIFT_NUM_SHIFTS_OFST (0) +#define PLL_SHIFT_NUM_SHIFTS_MSK (0x0000FFFF << PLL_SHIFT_NUM_SHIFTS_OFST) + +#define PLL_SHIFT_CNT_SELECT_OFST (16) +#define PLL_SHIFT_CNT_SELECT_MSK (0x0000001F << PLL_SHIFT_CNT_SELECT_OFST) +#define PLL_SHIFT_CNT_SLCT_C0_VAL (0x0 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C1_VAL (0x1 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C2_VAL (0x2 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C3_VAL (0x3 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C4_VAL (0x4 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C5_VAL (0x5 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C6_VAL (0x6 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C7_VAL (0x7 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C8_VAL (0x8 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C9_VAL (0x9 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C10_VAL (0x10 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C11_VAL (0x11 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C12_VAL (0x12 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C13_VAL (0x13 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C14_VAL (0x14 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C15_VAL (0x15 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C16_VAL (0x16 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C17_VAL (0x17 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) + +#define PLL_SHIFT_UP_DOWN_OFST (21) +#define PLL_SHIFT_UP_DOWN_MSK (0x00000001 << PLL_SHIFT_UP_DOWN_OFST) +#define PLL_SHIFT_UP_DOWN_NEG_VAL ((0x0 << PLL_SHIFT_UP_DOWN_OFST) & PLL_SHIFT_UP_DOWN_MSK) +#define PLL_SHIFT_UP_DOWN_POS_VAL ((0x1 << PLL_SHIFT_UP_DOWN_OFST) & PLL_SHIFT_UP_DOWN_MSK) + +#define PLL_K_COUNTER_REG (0x07) +#define PLL_BANDWIDTH_REG (0x08) +#define PLL_CHARGEPUMP_REG (0x09) +#define PLL_VCO_DIV_REG (0x1c) +#define PLL_MIF_REG (0x1f) + + +#endif /* SLSDETECTORSERVER_DEFS_H */ diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_funcs.c b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_funcs.c new file mode 120000 index 000000000..a7532ccd4 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_funcs.c @@ -0,0 +1 @@ +../slsDetectorServer/slsDetectorServer_funcs.c \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_funcs.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_funcs.h new file mode 120000 index 000000000..7569daf47 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/slsDetectorServer_funcs.h @@ -0,0 +1 @@ +../slsDetectorServer/slsDetectorServer_funcs.h \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_detector_defs.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_detector_defs.h new file mode 120000 index 000000000..c5062e03f --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_detector_defs.h @@ -0,0 +1 @@ +../commonFiles/sls_detector_defs.h \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_detector_funcs.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_detector_funcs.h new file mode 120000 index 000000000..844b67129 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_detector_funcs.h @@ -0,0 +1 @@ +../commonFiles/sls_detector_funcs.h \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_receiver_defs.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_receiver_defs.h new file mode 120000 index 000000000..1de31caf5 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_receiver_defs.h @@ -0,0 +1 @@ +../../slsReceiverSoftware/include/sls_receiver_defs.h \ No newline at end of file diff --git a/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_receiver_funcs.h b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_receiver_funcs.h new file mode 120000 index 000000000..c2ea4ded9 --- /dev/null +++ b/slsDetectorSoftware/jungfrauDetectorServerNewStructure/sls_receiver_funcs.h @@ -0,0 +1 @@ +../../slsReceiverSoftware/include/sls_receiver_funcs.h \ No newline at end of file diff --git a/slsDetectorSoftware/slsDetectorServer/slsDetectorFunctionList.h b/slsDetectorSoftware/slsDetectorServer/slsDetectorFunctionList.h index a4aa73c2b..b418e9092 100644 --- a/slsDetectorSoftware/slsDetectorServer/slsDetectorFunctionList.h +++ b/slsDetectorSoftware/slsDetectorServer/slsDetectorFunctionList.h @@ -18,22 +18,46 @@ Here are the definitions, but the actual implementation should be done for each ****************************************************/ +//basic tests +void checkFirmwareCompatibility(); +#ifdef JUNGFRAUD +int checkType(); +u_int32_t testFpga(void); +int testBus(void); +#endif +int moduleTest( enum digitalTestMode arg, int imod); +int detectorTest( enum digitalTestMode arg); + + +//Ids +int64_t getDetectorId(enum idMode arg); +u_int64_t getFirmwareVersion(); +int64_t getModuleId(enum idMode arg, int imod); +int getDetectorNumber(); +u_int64_t getDetectorMAC(); +int getDetectorIP(); + + +//initialization +int initDetector(); +#ifdef EIGERD +int initDetectorStop(); +void getModuleConfiguration(); +#endif + +#ifdef JUNGFRAUD +int mapCSP0(void); +u_int16_t bus_w16(u_int32_t offset, u_int16_t data); +u_int16_t bus_r16(u_int32_t offset); +u_int32_t bus_w(u_int32_t offset, u_int32_t data); +u_int32_t bus_r(u_int32_t offset); +#endif -void getModuleConfiguration(); -int initDetector(); -int initDetectorStop(); int setNMod(int nm, enum dimension dim); int getNModBoard(enum dimension arg); -int64_t getModuleId(enum idMode arg, int imod); -int64_t getDetectorId(enum idMode arg); -int getDetectorNumber(); -u_int64_t getDetectorMAC(); -int getDetectorIP(); -int moduleTest( enum digitalTestMode arg, int imod); -int detectorTest( enum digitalTestMode arg); void setDAC(enum detDacIndex ind, int val, int imod, int mV, int retval[]); diff --git a/slsDetectorSoftware/slsDetectorServer/slsDetectorServer.c b/slsDetectorSoftware/slsDetectorServer/slsDetectorServer.c index f3f9b2631..df066f59c 100755 --- a/slsDetectorSoftware/slsDetectorServer/slsDetectorServer.c +++ b/slsDetectorSoftware/slsDetectorServer/slsDetectorServer.c @@ -28,7 +28,7 @@ int main(int argc, char *argv[]){ #endif if (argc==1) { - checkFirmwareCompatibility(); + basictests(); //#endif portno = DEFAULT_PORTNO; printf("opening control server on port %d\n",portno ); diff --git a/slsDetectorSoftware/slsDetectorServer/slsDetectorServer_funcs.c b/slsDetectorSoftware/slsDetectorServer/slsDetectorServer_funcs.c index d032c4ab4..142fdd198 100755 --- a/slsDetectorSoftware/slsDetectorServer/slsDetectorServer_funcs.c +++ b/slsDetectorSoftware/slsDetectorServer/slsDetectorServer_funcs.c @@ -7,19 +7,17 @@ #include #include - #include -int sockfd; + + +// Global variables + extern int lockStatus; extern char lastClientIP[INET_ADDRSTRLEN]; extern char thisClientIP[INET_ADDRSTRLEN]; extern int differentClients; - - -// Global variables -int (*flist[256])(int); -//defined in the detector specific file +//defined in the detector specific Makefile #ifdef MYTHEND const enum detectorType myDetectorType=MYTHEN; #elif GOTTHARDD @@ -28,58 +26,25 @@ const enum detectorType myDetectorType=GOTTHARD; const enum detectorType myDetectorType=EIGER; #elif PICASSOD const enum detectorType myDetectorType=PICASSO; +#elif MOENCHD +const enum detectorType myDetectorType=MOENCH; +#elif JUNGFRAUD +const enum detectorType myDetectorType=JUNGFRAU; #else const enum detectorType myDetectorType=GENERIC; #endif -extern enum detectorSettings thisSettings; - -//global variables for optimized readout +int sockfd; //updated in slsDetectorServer (extern) +int (*flist[256])(int); char mess[MAX_STR_LENGTH]; -int dataret; -//extern int dataBytes = 10; -void checkFirmwareCompatibility(){ - int64_t fwversion = getDetectorId(DETECTOR_FIRMWARE_VERSION); - int64_t swversion = getDetectorId(DETECTOR_SOFTWARE_VERSION); - int64_t sw_fw_apiversion = getDetectorId(SOFTWARE_FIRMWARE_API_VERSION); - - cprintf(BLUE,"\n\n********************************************************\n" - "**********************EIGER Server**********************\n" - "********************************************************\n"); - cprintf(BLUE,"\n" - "Firmware Version:\t\t %lld\n" - "Software Version:\t\t %llx\n" - "F/w-S/w API Version:\t\t %lld\n" - "Required Firmware Version:\t %d\n" - "\n********************************************************\n", - fwversion,swversion,sw_fw_apiversion,REQUIRED_FIRMWARE_VERSION); - - //cant read versions - if(!fwversion || !sw_fw_apiversion){ - cprintf(RED,"FATAL ERROR: Cant read versions from FPGA. Please update firmware\n"); - cprintf(RED,"Exiting Server. Goodbye!\n\n"); - exit(-1); - } - - //check for API compatibility - old server - if(sw_fw_apiversion > REQUIRED_FIRMWARE_VERSION){ - cprintf(RED,"FATAL ERROR: This software version is incompatible.\n" - "Please update it to be compatible with this firmware\n\n"); - cprintf(RED,"Exiting Server. Goodbye!\n\n"); - exit(-1); - } - - //check for firmware compatibility - old firmware - if( REQUIRED_FIRMWARE_VERSION > fwversion){ - cprintf(RED,"FATAL ERROR: This firmware version is incompatible.\n" - "Please update it to v%d to be compatible with this server\n\n", REQUIRED_FIRMWARE_VERSION); - cprintf(RED,"Exiting Server. Goodbye!\n\n"); - exit(-1); - } +void basictests() { +#ifdef SLS_DETECTOR_FUNCTION_LIST + checkFirmwareCompatibility(); +#endif } @@ -431,8 +396,10 @@ int send_update(int file_des) { nm=setDynamicRange(GET_FLAG); #endif n += sendData(file_des,&nm,sizeof(nm),INT32); - nm = dataBytes; - n += sendData(file_des,&nm,sizeof(nm),INT32); +#ifdef SLS_DETECTOR_FUNCTION_LIST + dataBytes=calculateDataBytes(); +#endif + n += sendData(file_des,&dataBytes,sizeof(dataBytes),INT32); #ifdef SLS_DETECTOR_FUNCTION_LIST t=setSettings(GET_SETTINGS, GET_FLAG); #endif @@ -1016,10 +983,6 @@ int digital_test(int file_des) { #ifdef VERBOSE printf("of module %d\n", imod); #endif -#ifndef MYTHEND - ret = FAIL; - strcpy(mess,"Not applicable/implemented for this detector\n"); -#else #ifdef SLS_DETECTOR_FUNCTION_LIST if (imod>=0 && imod