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minor print in temp_Fpgafl in eiger
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0906efaf31
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@ -1313,9 +1313,9 @@ int getADC(enum ADCINDEX ind) {
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return 0;
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#else
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int retval = -1;
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char tempnames[6][20] = {"FPGA EXT", "10GE", "DCDC",
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"SODL", "SODR", "FPGA"};
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char *adc_names[] = {ADC_NAMES};
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char cstore[255];
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memset(cstore, 0, 255);
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switch (ind) {
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case TEMP_FPGA:
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@ -1348,7 +1348,7 @@ int getADC(enum ADCINDEX ind) {
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}
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LOG(logINFO,
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("Temperature %s: %f°C\n", tempnames[ind], (double)retval / 1000.00));
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("Temperature %s: %f°C\n", adc_names[ind], (double)retval / 1000.00));
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return retval;
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#endif
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@ -63,6 +63,10 @@ enum ADCINDEX {
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TEMP_FPGAFEBL,
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TEMP_FPGAFEBR
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};
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#define ADC_NAMES \
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"FPGA EXT", "10GE", "DCDC", "SODL", "SODR", "FPGA", "FPGA_FL", "FPGA_FR"
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enum NETWORKINDEX { TXN_LEFT, TXN_RIGHT, TXN_FRAME, FLOWCTRL_10G };
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enum ROINDEX { E_PARALLEL, E_NON_PARALLEL };
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enum CLKINDEX { RUN_CLK, NUM_CLOCKS };
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@ -130,7 +134,7 @@ enum MASTERINDEX { MASTER_HARDWARE, OW_MASTER, OW_SLAVE };
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#define DAC_MAX_STEPS (4096)
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#define MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS \
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(0x1FFFFFFF) // 29 bit register for max subframe exposure value
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(0x1FFFFFFF) // 29 bit register for max subframe exposure value
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#define SLAVE_HIGH_VOLTAGE_READ_VAL (-999)
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#define HIGH_VOLTAGE_TOLERANCE (5)
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